2 * XLP8XX Device Tree Source for EVP boards
7 model = "netlogic,XLP-EVP";
8 compatible = "netlogic,xlp";
15 compatible = "simple-bus";
16 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
17 1 0 0 0x16000000 0x02000000>; // GBU chipselects
19 serial0: serial@30000 {
20 device_type = "serial";
21 compatible = "ns16550";
22 reg = <0 0x30100 0xa00>;
25 clock-frequency = <133333333>;
26 interrupt-parent = <&pic>;
29 serial1: serial@31000 {
30 device_type = "serial";
31 compatible = "ns16550";
32 reg = <0 0x31100 0xa00>;
35 clock-frequency = <133333333>;
36 interrupt-parent = <&pic>;
40 compatible = "opencores,i2c-ocores";
43 reg = <0 0x32100 0xa00>;
46 clock-frequency = <32000000>;
47 interrupt-parent = <&pic>;
51 compatible = "opencores,i2c-ocores";
54 reg = <0 0x33100 0xa00>;
57 clock-frequency = <32000000>;
58 interrupt-parent = <&pic>;
62 compatible = "dallas,ds1374";
67 compatible = "national,lm90";
72 compatible = "netlogic,xlp-pic";
74 #interrupt-cells = <1>;
75 reg = <0 0x4000 0x200>;
80 compatible = "cfi-flash";
84 reg = <1 0 0x1000000>;
88 reg = <0x0 0x100000>; /* 1M */
94 reg = <0x100000 0x100000>; /* 1M */
99 reg = <0x200000 0x500000>; /* 5M */
104 reg = <0x700000 0x800000>; /* 8M */
109 reg = <0xf00000 0x100000>; /* 1M */
114 gpio: xlp_gpio@34100 {
115 compatible = "netlogic,xlp832-gpio";
116 reg = <0 0x34100 0x1000>;
120 #interrupt-cells = <2>;
121 interrupt-parent = <&pic>;
123 interrupt-controller;
128 bootargs = "console=ttyS0,115200 rdinit=/sbin/init";