1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
8 compatible = "loongson,loongson2k1000";
19 compatible = "loongson,gs264";
27 compatible = "memory";
28 device_type = "memory";
29 reg = <0x00000000 0x00200000 0x00000000 0x0ee00000>, /* 238 MB at 2 MB */
30 <0x00000000 0x20000000 0x00000000 0x1f000000>, /* 496 MB at 512 MB */
31 <0x00000001 0x10000000 0x00000001 0xb0000000>; /* 6912 MB at 4352MB */
36 compatible = "fixed-clock";
37 clock-frequency = <800000000>;
40 cpuintc: interrupt-controller {
42 #interrupt-cells = <1>;
44 compatible = "mti,cpu-interrupt-controller";
47 package0: bus@10000000 {
48 compatible = "simple-bus";
51 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* ioports */
52 0 0x40000000 0 0x40000000 0 0x40000000
53 0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>;
55 pm: reset-controller@1fe07000 {
56 compatible = "loongson,ls2k-pm";
57 reg = <0 0x1fe07000 0 0x422>;
60 liointc0: interrupt-controller@1fe11400 {
61 compatible = "loongson,liointc-2.0";
62 reg = <0 0x1fe11400 0 0x40>,
65 reg-names = "main", "isr0", "isr1";
68 #interrupt-cells = <2>;
70 interrupt-parent = <&cpuintc>;
72 interrupt-names = "int0";
74 loongson,parent_int_map = <0xffffffff>, /* int0 */
75 <0x00000000>, /* int1 */
76 <0x00000000>, /* int2 */
77 <0x00000000>; /* int3 */
80 liointc1: interrupt-controller@1fe11440 {
81 compatible = "loongson,liointc-2.0";
82 reg = <0 0x1fe11440 0 0x40>,
85 reg-names = "main", "isr0", "isr1";
88 #interrupt-cells = <2>;
90 interrupt-parent = <&cpuintc>;
92 interrupt-names = "int1";
94 loongson,parent_int_map = <0x00000000>, /* int0 */
95 <0xffffffff>, /* int1 */
96 <0x00000000>, /* int2 */
97 <0x00000000>; /* int3 */
100 uart0: serial@1fe00000 {
101 compatible = "ns16550a";
102 reg = <0 0x1fe00000 0 0x8>;
103 clock-frequency = <125000000>;
104 interrupt-parent = <&liointc0>;
105 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
110 compatible = "loongson,ls2k-pci";
112 #address-cells = <3>;
114 #interrupt-cells = <2>;
116 reg = <0 0x1a000000 0 0x02000000>,
117 <0xfe 0x00000000 0 0x20000000>;
119 ranges = <0x01000000 0x0 0x00000000 0x0 0x18000000 0x0 0x00010000>,
120 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
123 compatible = "pci0014,7a03.0",
128 reg = <0x1800 0x0 0x0 0x0 0x0>;
129 interrupts = <12 IRQ_TYPE_LEVEL_LOW>,
130 <13 IRQ_TYPE_LEVEL_LOW>;
131 interrupt-names = "macirq", "eth_lpi";
132 interrupt-parent = <&liointc0>;
135 #address-cells = <1>;
137 compatible = "snps,dwmac-mdio";
138 phy0: ethernet-phy@0 {
145 compatible = "pci0014,7a03.0",
149 "loongson, pci-gmac";
151 reg = <0x1900 0x0 0x0 0x0 0x0>;
152 interrupts = <14 IRQ_TYPE_LEVEL_LOW>,
153 <15 IRQ_TYPE_LEVEL_LOW>;
154 interrupt-names = "macirq", "eth_lpi";
155 interrupt-parent = <&liointc0>;
158 #address-cells = <1>;
160 compatible = "snps,dwmac-mdio";
161 phy1: ethernet-phy@1 {
168 compatible = "pci0014,7a14.0",
173 reg = <0x2100 0x0 0x0 0x0 0x0>;
174 interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
175 interrupt-parent = <&liointc1>;
179 compatible = "pci0014,7a24.0",
184 reg = <0x2200 0x0 0x0 0x0 0x0>;
185 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
186 interrupt-parent = <&liointc1>;
190 compatible = "pci0014,7a08.0",
195 reg = <0x4000 0x0 0x0 0x0 0x0>;
196 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
197 interrupt-parent = <&liointc0>;
201 compatible = "pci0014,7a19.0",
206 reg = <0x4800 0x0 0x0 0x0 0x0>;
207 #interrupt-cells = <1>;
208 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
209 interrupt-parent = <&liointc1>;
210 interrupt-map-mask = <0 0 0 0>;
211 interrupt-map = <0 0 0 0 &liointc1 0 IRQ_TYPE_LEVEL_LOW>;
216 compatible = "pci0014,7a09.0",
221 reg = <0x5000 0x0 0x0 0x0 0x0>;
222 #interrupt-cells = <1>;
223 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
224 interrupt-parent = <&liointc1>;
225 interrupt-map-mask = <0 0 0 0>;
226 interrupt-map = <0 0 0 0 &liointc1 1 IRQ_TYPE_LEVEL_LOW>;
231 compatible = "pci0014,7a09.0",
236 reg = <0x5800 0x0 0x0 0x0 0x0>;
237 #interrupt-cells = <1>;
238 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
239 interrupt-parent = <&liointc1>;
240 interrupt-map-mask = <0 0 0 0>;
241 interrupt-map = <0 0 0 0 &liointc1 2 IRQ_TYPE_LEVEL_LOW>;
246 compatible = "pci0014,7a09.0",
251 reg = <0x6000 0x0 0x0 0x0 0x0>;
252 #interrupt-cells = <1>;
253 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
254 interrupt-parent = <&liointc1>;
255 interrupt-map-mask = <0 0 0 0>;
256 interrupt-map = <0 0 0 0 &liointc1 3 IRQ_TYPE_LEVEL_LOW>;
261 compatible = "pci0014,7a19.0",
266 reg = <0x6800 0x0 0x0 0x0 0x0>;
267 #interrupt-cells = <1>;
268 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
269 interrupt-parent = <&liointc1>;
270 interrupt-map-mask = <0 0 0 0>;
271 interrupt-map = <0 0 0 0 &liointc1 4 IRQ_TYPE_LEVEL_LOW>;
276 compatible = "pci0014,7a09.0",
281 reg = <0x7000 0x0 0x0 0x0 0x0>;
282 #interrupt-cells = <1>;
283 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
284 interrupt-parent = <&liointc1>;
285 interrupt-map-mask = <0 0 0 0>;
286 interrupt-map = <0 0 0 0 &liointc1 5 IRQ_TYPE_LEVEL_LOW>;