arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 /dts-v1/;
   4
   5 #include <dt-bindings/interrupt-controller/irq.h>
   6
   7 / {
   8         compatible = "loongson,loongson2k1000";
   9
  10         #address-cells = <2>;
  11         #size-cells = <2>;
  12
  13         cpus {
  14                 #address-cells = <1>;
  15                 #size-cells = <0>;
  16
  17                 cpu0: cpu@0 {
  18                         device_type = "cpu";
  19                         compatible = "loongson,gs264";
  20                         reg = <0x0>;
  21                         #clock-cells = <1>;
  22                         clocks = <&cpu_clk>;
  23                 };
  24         };
  25
  26         memory@200000 {
  27                 compatible = "memory";
  28                 device_type = "memory";
  29                 reg = <0x00000000 0x00200000 0x00000000 0x0ee00000>, /* 238 MB at 2 MB */
  30                         <0x00000000 0x20000000 0x00000000 0x1f000000>, /* 496 MB at 512 MB */
  31                         <0x00000001 0x10000000 0x00000001 0xb0000000>; /* 6912 MB at 4352MB */
  32         };
  33
  34         cpu_clk: cpu_clk {
  35                 #clock-cells = <0>;
  36                 compatible = "fixed-clock";
  37                 clock-frequency = <800000000>;
  38         };
  39
  40         cpuintc: interrupt-controller {
  41                 #address-cells = <0>;
  42                 #interrupt-cells = <1>;
  43                 interrupt-controller;
  44                 compatible = "mti,cpu-interrupt-controller";
  45         };
  46
  47         package0: bus@10000000 {
  48                 compatible = "simple-bus";
  49                 #address-cells = <2>;
  50                 #size-cells = <2>;
  51                 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* ioports */
  52                         0 0x40000000 0 0x40000000 0 0x40000000
  53                         0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>;
  54
  55                 pm: reset-controller@1fe07000 {
  56                         compatible = "loongson,ls2k-pm";
  57                         reg = <0 0x1fe07000 0 0x422>;
  58                 };
  59
  60                 liointc0: interrupt-controller@1fe11400 {
  61                         compatible = "loongson,liointc-2.0";
  62                         reg = <0 0x1fe11400 0 0x40>,
  63                                 <0 0x1fe11040 0 0x8>,
  64                                 <0 0x1fe11140 0 0x8>;
  65                         reg-names = "main", "isr0", "isr1";
  66
  67                         interrupt-controller;
  68                         #interrupt-cells = <2>;
  69
  70                         interrupt-parent = <&cpuintc>;
  71                         interrupts = <2>;
  72                         interrupt-names = "int0";
  73
  74                         loongson,parent_int_map = <0xffffffff>, /* int0 */
  75                                                 <0x00000000>, /* int1 */
  76                                                 <0x00000000>, /* int2 */
  77                                                 <0x00000000>; /* int3 */
  78                 };
  79
  80                 liointc1: interrupt-controller@1fe11440 {
  81                         compatible = "loongson,liointc-2.0";
  82                         reg = <0 0x1fe11440 0 0x40>,
  83                                 <0 0x1fe11048 0 0x8>,
  84                                 <0 0x1fe11148 0 0x8>;
  85                         reg-names = "main", "isr0", "isr1";
  86
  87                         interrupt-controller;
  88                         #interrupt-cells = <2>;
  89
  90                         interrupt-parent = <&cpuintc>;
  91                         interrupts = <3>;
  92                         interrupt-names = "int1";
  93
  94                         loongson,parent_int_map = <0x00000000>, /* int0 */
  95                                                 <0xffffffff>, /* int1 */
  96                                                 <0x00000000>, /* int2 */
  97                                                 <0x00000000>; /* int3 */
  98                 };
  99
 100                 rtc0: rtc@1fe07800 {
 101                         compatible = "loongson,ls2k1000-rtc";
 102                         reg = <0 0x1fe07800 0 0x78>;
 103                         interrupt-parent = <&liointc0>;
 104                         interrupts = <60 IRQ_TYPE_LEVEL_LOW>;
 105                 };
 106
 107                 uart0: serial@1fe00000 {
 108                         compatible = "ns16550a";
 109                         reg = <0 0x1fe00000 0 0x8>;
 110                         clock-frequency = <125000000>;
 111                         interrupt-parent = <&liointc0>;
 112                         interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 113                         no-loopback-test;
 114                 };
 115
 116                 pci@1a000000 {
 117                         compatible = "loongson,ls2k-pci";
 118                         device_type = "pci";
 119                         #address-cells = <3>;
 120                         #size-cells = <2>;
 121                         #interrupt-cells = <2>;
 122
 123                         reg = <0 0x1a000000 0 0x02000000>,
 124                                 <0xfe 0x00000000 0 0x20000000>;
 125
 126                         ranges = <0x01000000 0x0 0x00000000 0x0 0x18000000  0x0 0x00010000>,
 127                                  <0x02000000 0x0 0x40000000 0x0 0x40000000  0x0 0x40000000>;
 128
 129                         gmac@3,0 {
 130                                 compatible = "pci0014,7a03.0",
 131                                                    "pci0014,7a03",
 132                                                    "pciclass0c0320",
 133                                                    "pciclass0c03";
 134
 135                                 reg = <0x1800 0x0 0x0 0x0 0x0>;
 136                                 interrupts = <12 IRQ_TYPE_LEVEL_LOW>,
 137                                              <13 IRQ_TYPE_LEVEL_LOW>;
 138                                 interrupt-names = "macirq", "eth_lpi";
 139                                 interrupt-parent = <&liointc0>;
 140                                 phy-mode = "rgmii";
 141                                 mdio {
 142                                         #address-cells = <1>;
 143                                         #size-cells = <0>;
 144                                         compatible = "snps,dwmac-mdio";
 145                                         phy0: ethernet-phy@0 {
 146                                                 reg = <0>;
 147                                         };
 148                                 };
 149                         };
 150
 151                         gmac@3,1 {
 152                                 compatible = "pci0014,7a03.0",
 153                                                    "pci0014,7a03",
 154                                                    "pciclass0c0320",
 155                                                    "pciclass0c03",
 156                                                    "loongson, pci-gmac";
 157
 158                                 reg = <0x1900 0x0 0x0 0x0 0x0>;
 159                                 interrupts = <14 IRQ_TYPE_LEVEL_LOW>,
 160                                              <15 IRQ_TYPE_LEVEL_LOW>;
 161                                 interrupt-names = "macirq", "eth_lpi";
 162                                 interrupt-parent = <&liointc0>;
 163                                 phy-mode = "rgmii";
 164                                 mdio {
 165                                         #address-cells = <1>;
 166                                         #size-cells = <0>;
 167                                         compatible = "snps,dwmac-mdio";
 168                                         phy1: ethernet-phy@1 {
 169                                                 reg = <0>;
 170                                         };
 171                                 };
 172                         };
 173
 174                         ehci@4,1 {
 175                                 compatible = "pci0014,7a14.0",
 176                                                    "pci0014,7a14",
 177                                                    "pciclass0c0320",
 178                                                    "pciclass0c03";
 179
 180                                 reg = <0x2100 0x0 0x0 0x0 0x0>;
 181                                 interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
 182                                 interrupt-parent = <&liointc1>;
 183                         };
 184
 185                         ohci@4,2 {
 186                                 compatible = "pci0014,7a24.0",
 187                                                    "pci0014,7a24",
 188                                                    "pciclass0c0310",
 189                                                    "pciclass0c03";
 190
 191                                 reg = <0x2200 0x0 0x0 0x0 0x0>;
 192                                 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
 193                                 interrupt-parent = <&liointc1>;
 194                         };
 195
 196                         sata@8,0 {
 197                                 compatible = "pci0014,7a08.0",
 198                                                    "pci0014,7a08",
 199                                                    "pciclass010601",
 200                                                    "pciclass0106";
 201
 202                                 reg = <0x4000 0x0 0x0 0x0 0x0>;
 203                                 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
 204                                 interrupt-parent = <&liointc0>;
 205                         };
 206
 207                         pci_bridge@9,0 {
 208                                 compatible = "pci0014,7a19.0",
 209                                                    "pci0014,7a19",
 210                                                    "pciclass060400",
 211                                                    "pciclass0604";
 212
 213                                 reg = <0x4800 0x0 0x0 0x0 0x0>;
 214                                 #interrupt-cells = <1>;
 215                                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 216                                 interrupt-parent = <&liointc1>;
 217                                 interrupt-map-mask = <0 0 0 0>;
 218                                 interrupt-map = <0 0 0 0 &liointc1 0 IRQ_TYPE_LEVEL_LOW>;
 219                                 external-facing;
 220                         };
 221
 222                         pci_bridge@a,0 {
 223                                 compatible = "pci0014,7a09.0",
 224                                                    "pci0014,7a09",
 225                                                    "pciclass060400",
 226                                                    "pciclass0604";
 227
 228                                 reg = <0x5000 0x0 0x0 0x0 0x0>;
 229                                 #interrupt-cells = <1>;
 230                                 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
 231                                 interrupt-parent = <&liointc1>;
 232                                 interrupt-map-mask = <0 0 0 0>;
 233                                 interrupt-map = <0 0 0 0 &liointc1 1 IRQ_TYPE_LEVEL_LOW>;
 234                                 external-facing;
 235                         };
 236
 237                         pci_bridge@b,0 {
 238                                 compatible = "pci0014,7a09.0",
 239                                                    "pci0014,7a09",
 240                                                    "pciclass060400",
 241                                                    "pciclass0604";
 242
 243                                 reg = <0x5800 0x0 0x0 0x0 0x0>;
 244                                 #interrupt-cells = <1>;
 245                                 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
 246                                 interrupt-parent = <&liointc1>;
 247                                 interrupt-map-mask = <0 0 0 0>;
 248                                 interrupt-map = <0 0 0 0 &liointc1 2 IRQ_TYPE_LEVEL_LOW>;
 249                                 external-facing;
 250                         };
 251
 252                         pci_bridge@c,0 {
 253                                 compatible = "pci0014,7a09.0",
 254                                                    "pci0014,7a09",
 255                                                    "pciclass060400",
 256                                                    "pciclass0604";
 257
 258                                 reg = <0x6000 0x0 0x0 0x0 0x0>;
 259                                 #interrupt-cells = <1>;
 260                                 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
 261                                 interrupt-parent = <&liointc1>;
 262                                 interrupt-map-mask = <0 0 0 0>;
 263                                 interrupt-map = <0 0 0 0 &liointc1 3 IRQ_TYPE_LEVEL_LOW>;
 264                                 external-facing;
 265                         };
 266
 267                         pci_bridge@d,0 {
 268                                 compatible = "pci0014,7a19.0",
 269                                                    "pci0014,7a19",
 270                                                    "pciclass060400",
 271                                                    "pciclass0604";
 272
 273                                 reg = <0x6800 0x0 0x0 0x0 0x0>;
 274                                 #interrupt-cells = <1>;
 275                                 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
 276                                 interrupt-parent = <&liointc1>;
 277                                 interrupt-map-mask = <0 0 0 0>;
 278                                 interrupt-map = <0 0 0 0 &liointc1 4 IRQ_TYPE_LEVEL_LOW>;
 279                                 external-facing;
 280                         };
 281
 282                         pci_bridge@e,0 {
 283                                 compatible = "pci0014,7a09.0",
 284                                                    "pci0014,7a09",
 285                                                    "pciclass060400",
 286                                                    "pciclass0604";
 287
 288                                 reg = <0x7000 0x0 0x0 0x0 0x0>;
 289                                 #interrupt-cells = <1>;
 290                                 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
 291                                 interrupt-parent = <&liointc1>;
 292                                 interrupt-map-mask = <0 0 0 0>;
 293                                 interrupt-map = <0 0 0 0 &liointc1 5 IRQ_TYPE_LEVEL_LOW>;
 294                                 external-facing;
 295                         };
 296
 297                 };
 298         };
 299 };
 300