1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
8 compatible = "loongson,loongson2k1000";
19 compatible = "loongson,gs264";
27 compatible = "memory";
28 device_type = "memory";
29 reg = <0x00000000 0x00200000 0x00000000 0x0ee00000>, /* 238 MB at 2 MB */
30 <0x00000000 0x20000000 0x00000000 0x1f000000>, /* 496 MB at 512 MB */
31 <0x00000001 0x10000000 0x00000001 0xb0000000>; /* 6912 MB at 4352MB */
36 compatible = "fixed-clock";
37 clock-frequency = <800000000>;
40 cpuintc: interrupt-controller {
42 #interrupt-cells = <1>;
44 compatible = "mti,cpu-interrupt-controller";
47 package0: bus@10000000 {
48 compatible = "simple-bus";
51 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* ioports */
52 0 0x40000000 0 0x40000000 0 0x40000000
53 0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>;
55 pm: reset-controller@1fe07000 {
56 compatible = "loongson,ls2k-pm";
57 reg = <0 0x1fe07000 0 0x422>;
60 liointc0: interrupt-controller@1fe11400 {
61 compatible = "loongson,liointc-2.0";
62 reg = <0 0x1fe11400 0 0x40>,
65 reg-names = "main", "isr0", "isr1";
68 #interrupt-cells = <2>;
70 interrupt-parent = <&cpuintc>;
72 interrupt-names = "int0";
74 loongson,parent_int_map = <0xffffffff>, /* int0 */
75 <0x00000000>, /* int1 */
76 <0x00000000>, /* int2 */
77 <0x00000000>; /* int3 */
80 liointc1: interrupt-controller@1fe11440 {
81 compatible = "loongson,liointc-2.0";
82 reg = <0 0x1fe11440 0 0x40>,
85 reg-names = "main", "isr0", "isr1";
88 #interrupt-cells = <2>;
90 interrupt-parent = <&cpuintc>;
92 interrupt-names = "int1";
94 loongson,parent_int_map = <0x00000000>, /* int0 */
95 <0xffffffff>, /* int1 */
96 <0x00000000>, /* int2 */
97 <0x00000000>; /* int3 */
101 compatible = "loongson,ls2k1000-rtc";
102 reg = <0 0x1fe07800 0 0x78>;
103 interrupt-parent = <&liointc0>;
104 interrupts = <60 IRQ_TYPE_LEVEL_LOW>;
107 uart0: serial@1fe00000 {
108 compatible = "ns16550a";
109 reg = <0 0x1fe00000 0 0x8>;
110 clock-frequency = <125000000>;
111 interrupt-parent = <&liointc0>;
112 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
117 compatible = "loongson,ls2k-pci";
119 #address-cells = <3>;
121 #interrupt-cells = <2>;
123 reg = <0 0x1a000000 0 0x02000000>,
124 <0xfe 0x00000000 0 0x20000000>;
126 ranges = <0x01000000 0x0 0x00000000 0x0 0x18000000 0x0 0x00010000>,
127 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
130 compatible = "pci0014,7a03.0",
135 reg = <0x1800 0x0 0x0 0x0 0x0>;
136 interrupts = <12 IRQ_TYPE_LEVEL_LOW>,
137 <13 IRQ_TYPE_LEVEL_LOW>;
138 interrupt-names = "macirq", "eth_lpi";
139 interrupt-parent = <&liointc0>;
142 #address-cells = <1>;
144 compatible = "snps,dwmac-mdio";
145 phy0: ethernet-phy@0 {
152 compatible = "pci0014,7a03.0",
156 "loongson, pci-gmac";
158 reg = <0x1900 0x0 0x0 0x0 0x0>;
159 interrupts = <14 IRQ_TYPE_LEVEL_LOW>,
160 <15 IRQ_TYPE_LEVEL_LOW>;
161 interrupt-names = "macirq", "eth_lpi";
162 interrupt-parent = <&liointc0>;
165 #address-cells = <1>;
167 compatible = "snps,dwmac-mdio";
168 phy1: ethernet-phy@1 {
175 compatible = "pci0014,7a14.0",
180 reg = <0x2100 0x0 0x0 0x0 0x0>;
181 interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
182 interrupt-parent = <&liointc1>;
186 compatible = "pci0014,7a24.0",
191 reg = <0x2200 0x0 0x0 0x0 0x0>;
192 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
193 interrupt-parent = <&liointc1>;
197 compatible = "pci0014,7a08.0",
202 reg = <0x4000 0x0 0x0 0x0 0x0>;
203 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
204 interrupt-parent = <&liointc0>;
208 compatible = "pci0014,7a19.0",
213 reg = <0x4800 0x0 0x0 0x0 0x0>;
214 #interrupt-cells = <1>;
215 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
216 interrupt-parent = <&liointc1>;
217 interrupt-map-mask = <0 0 0 0>;
218 interrupt-map = <0 0 0 0 &liointc1 0 IRQ_TYPE_LEVEL_LOW>;
223 compatible = "pci0014,7a09.0",
228 reg = <0x5000 0x0 0x0 0x0 0x0>;
229 #interrupt-cells = <1>;
230 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
231 interrupt-parent = <&liointc1>;
232 interrupt-map-mask = <0 0 0 0>;
233 interrupt-map = <0 0 0 0 &liointc1 1 IRQ_TYPE_LEVEL_LOW>;
238 compatible = "pci0014,7a09.0",
243 reg = <0x5800 0x0 0x0 0x0 0x0>;
244 #interrupt-cells = <1>;
245 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
246 interrupt-parent = <&liointc1>;
247 interrupt-map-mask = <0 0 0 0>;
248 interrupt-map = <0 0 0 0 &liointc1 2 IRQ_TYPE_LEVEL_LOW>;
253 compatible = "pci0014,7a09.0",
258 reg = <0x6000 0x0 0x0 0x0 0x0>;
259 #interrupt-cells = <1>;
260 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
261 interrupt-parent = <&liointc1>;
262 interrupt-map-mask = <0 0 0 0>;
263 interrupt-map = <0 0 0 0 &liointc1 3 IRQ_TYPE_LEVEL_LOW>;
268 compatible = "pci0014,7a19.0",
273 reg = <0x6800 0x0 0x0 0x0 0x0>;
274 #interrupt-cells = <1>;
275 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
276 interrupt-parent = <&liointc1>;
277 interrupt-map-mask = <0 0 0 0>;
278 interrupt-map = <0 0 0 0 &liointc1 4 IRQ_TYPE_LEVEL_LOW>;
283 compatible = "pci0014,7a09.0",
288 reg = <0x7000 0x0 0x0 0x0 0x0>;
289 #interrupt-cells = <1>;
290 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
291 interrupt-parent = <&liointc1>;
292 interrupt-map-mask = <0 0 0 0>;
293 interrupt-map = <0 0 0 0 &liointc1 5 IRQ_TYPE_LEVEL_LOW>;