arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 /dts-v1/;
   4
   5 #include <dt-bindings/interrupt-controller/irq.h>
   6
   7 / {
   8         compatible = "loongson,loongson2k1000";
   9
  10         #address-cells = <2>;
  11         #size-cells = <2>;
  12
  13         cpus {
  14                 #address-cells = <1>;
  15                 #size-cells = <0>;
  16
  17                 cpu0: cpu@0 {
  18                         device_type = "cpu";
  19                         compatible = "loongson,gs264";
  20                         reg = <0x0>;
  21                         #clock-cells = <1>;
  22                         clocks = <&cpu_clk>;
  23                 };
  24         };
  25
  26         memory@200000 {
  27                 compatible = "memory";
  28                 device_type = "memory";
  29                 reg = <0x00000000 0x00200000 0x00000000 0x0ee00000>, /* 238 MB at 2 MB */
  30                         <0x00000000 0x20000000 0x00000000 0x1f000000>, /* 496 MB at 512 MB */
  31                         <0x00000001 0x10000000 0x00000001 0xb0000000>; /* 6912 MB at 4352MB */
  32         };
  33
  34         cpu_clk: cpu_clk {
  35                 #clock-cells = <0>;
  36                 compatible = "fixed-clock";
  37                 clock-frequency = <800000000>;
  38         };
  39
  40         cpuintc: interrupt-controller {
  41                 #address-cells = <0>;
  42                 #interrupt-cells = <1>;
  43                 interrupt-controller;
  44                 compatible = "mti,cpu-interrupt-controller";
  45         };
  46
  47         package0: bus@10000000 {
  48                 compatible = "simple-bus";
  49                 #address-cells = <2>;
  50                 #size-cells = <2>;
  51                 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* ioports */
  52                         0 0x40000000 0 0x40000000 0 0x40000000
  53                         0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>;
  54
  55                 pm: reset-controller@1fe07000 {
  56                         compatible = "loongson,ls2k-pm";
  57                         reg = <0 0x1fe07000 0 0x422>;
  58                 };
  59
  60                 liointc0: interrupt-controller@1fe11400 {
  61                         compatible = "loongson,liointc-2.0";
  62                         reg = <0 0x1fe11400 0 0x40>,
  63                                 <0 0x1fe11040 0 0x8>,
  64                                 <0 0x1fe11140 0 0x8>;
  65                         reg-names = "main", "isr0", "isr1";
  66
  67                         interrupt-controller;
  68                         #interrupt-cells = <2>;
  69
  70                         interrupt-parent = <&cpuintc>;
  71                         interrupts = <2>;
  72                         interrupt-names = "int0";
  73
  74                         loongson,parent_int_map = <0xffffffff>, /* int0 */
  75                                                 <0x00000000>, /* int1 */
  76                                                 <0x00000000>, /* int2 */
  77                                                 <0x00000000>; /* int3 */
  78                 };
  79
  80                 liointc1: interrupt-controller@1fe11440 {
  81                         compatible = "loongson,liointc-2.0";
  82                         reg = <0 0x1fe11440 0 0x40>,
  83                                 <0 0x1fe11048 0 0x8>,
  84                                 <0 0x1fe11148 0 0x8>;
  85                         reg-names = "main", "isr0", "isr1";
  86
  87                         interrupt-controller;
  88                         #interrupt-cells = <2>;
  89
  90                         interrupt-parent = <&cpuintc>;
  91                         interrupts = <3>;
  92                         interrupt-names = "int1";
  93
  94                         loongson,parent_int_map = <0x00000000>, /* int0 */
  95                                                 <0xffffffff>, /* int1 */
  96                                                 <0x00000000>, /* int2 */
  97                                                 <0x00000000>; /* int3 */
  98                 };
  99
 100                 uart0: serial@1fe00000 {
 101                         compatible = "ns16550a";
 102                         reg = <0 0x1fe00000 0 0x8>;
 103                         clock-frequency = <125000000>;
 104                         interrupt-parent = <&liointc0>;
 105                         interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 106                         no-loopback-test;
 107                 };
 108
 109                 pci@1a000000 {
 110                         compatible = "loongson,ls2k-pci";
 111                         device_type = "pci";
 112                         #address-cells = <3>;
 113                         #size-cells = <2>;
 114                         #interrupt-cells = <2>;
 115
 116                         reg = <0 0x1a000000 0 0x02000000>,
 117                                 <0xfe 0x00000000 0 0x20000000>;
 118
 119                         ranges = <0x01000000 0x0 0x00000000 0x0 0x18000000  0x0 0x00010000>,
 120                                  <0x02000000 0x0 0x40000000 0x0 0x40000000  0x0 0x40000000>;
 121
 122                         gmac@3,0 {
 123                                 compatible = "pci0014,7a03.0",
 124                                                    "pci0014,7a03",
 125                                                    "pciclass0c0320",
 126                                                    "pciclass0c03";
 127
 128                                 reg = <0x1800 0x0 0x0 0x0 0x0>;
 129                                 interrupts = <12 IRQ_TYPE_LEVEL_LOW>,
 130                                              <13 IRQ_TYPE_LEVEL_LOW>;
 131                                 interrupt-names = "macirq", "eth_lpi";
 132                                 interrupt-parent = <&liointc0>;
 133                                 phy-mode = "rgmii";
 134                                 mdio {
 135                                         #address-cells = <1>;
 136                                         #size-cells = <0>;
 137                                         compatible = "snps,dwmac-mdio";
 138                                         phy0: ethernet-phy@0 {
 139                                                 reg = <0>;
 140                                         };
 141                                 };
 142                         };
 143
 144                         gmac@3,1 {
 145                                 compatible = "pci0014,7a03.0",
 146                                                    "pci0014,7a03",
 147                                                    "pciclass0c0320",
 148                                                    "pciclass0c03",
 149                                                    "loongson, pci-gmac";
 150
 151                                 reg = <0x1900 0x0 0x0 0x0 0x0>;
 152                                 interrupts = <14 IRQ_TYPE_LEVEL_LOW>,
 153                                              <15 IRQ_TYPE_LEVEL_LOW>;
 154                                 interrupt-names = "macirq", "eth_lpi";
 155                                 interrupt-parent = <&liointc0>;
 156                                 phy-mode = "rgmii";
 157                                 mdio {
 158                                         #address-cells = <1>;
 159                                         #size-cells = <0>;
 160                                         compatible = "snps,dwmac-mdio";
 161                                         phy1: ethernet-phy@1 {
 162                                                 reg = <0>;
 163                                         };
 164                                 };
 165                         };
 166
 167                         ehci@4,1 {
 168                                 compatible = "pci0014,7a14.0",
 169                                                    "pci0014,7a14",
 170                                                    "pciclass0c0320",
 171                                                    "pciclass0c03";
 172
 173                                 reg = <0x2100 0x0 0x0 0x0 0x0>;
 174                                 interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
 175                                 interrupt-parent = <&liointc1>;
 176                         };
 177
 178                         ohci@4,2 {
 179                                 compatible = "pci0014,7a24.0",
 180                                                    "pci0014,7a24",
 181                                                    "pciclass0c0310",
 182                                                    "pciclass0c03";
 183
 184                                 reg = <0x2200 0x0 0x0 0x0 0x0>;
 185                                 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
 186                                 interrupt-parent = <&liointc1>;
 187                         };
 188
 189                         sata@8,0 {
 190                                 compatible = "pci0014,7a08.0",
 191                                                    "pci0014,7a08",
 192                                                    "pciclass010601",
 193                                                    "pciclass0106";
 194
 195                                 reg = <0x4000 0x0 0x0 0x0 0x0>;
 196                                 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
 197                                 interrupt-parent = <&liointc0>;
 198                         };
 199
 200                         pci_bridge@9,0 {
 201                                 compatible = "pci0014,7a19.0",
 202                                                    "pci0014,7a19",
 203                                                    "pciclass060400",
 204                                                    "pciclass0604";
 205
 206                                 reg = <0x4800 0x0 0x0 0x0 0x0>;
 207                                 #interrupt-cells = <1>;
 208                                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 209                                 interrupt-parent = <&liointc1>;
 210                                 interrupt-map-mask = <0 0 0 0>;
 211                                 interrupt-map = <0 0 0 0 &liointc1 0 IRQ_TYPE_LEVEL_LOW>;
 212                                 external-facing;
 213                         };
 214
 215                         pci_bridge@a,0 {
 216                                 compatible = "pci0014,7a09.0",
 217                                                    "pci0014,7a09",
 218                                                    "pciclass060400",
 219                                                    "pciclass0604";
 220
 221                                 reg = <0x5000 0x0 0x0 0x0 0x0>;
 222                                 #interrupt-cells = <1>;
 223                                 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
 224                                 interrupt-parent = <&liointc1>;
 225                                 interrupt-map-mask = <0 0 0 0>;
 226                                 interrupt-map = <0 0 0 0 &liointc1 1 IRQ_TYPE_LEVEL_LOW>;
 227                                 external-facing;
 228                         };
 229
 230                         pci_bridge@b,0 {
 231                                 compatible = "pci0014,7a09.0",
 232                                                    "pci0014,7a09",
 233                                                    "pciclass060400",
 234                                                    "pciclass0604";
 235
 236                                 reg = <0x5800 0x0 0x0 0x0 0x0>;
 237                                 #interrupt-cells = <1>;
 238                                 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
 239                                 interrupt-parent = <&liointc1>;
 240                                 interrupt-map-mask = <0 0 0 0>;
 241                                 interrupt-map = <0 0 0 0 &liointc1 2 IRQ_TYPE_LEVEL_LOW>;
 242                                 external-facing;
 243                         };
 244
 245                         pci_bridge@c,0 {
 246                                 compatible = "pci0014,7a09.0",
 247                                                    "pci0014,7a09",
 248                                                    "pciclass060400",
 249                                                    "pciclass0604";
 250
 251                                 reg = <0x6000 0x0 0x0 0x0 0x0>;
 252                                 #interrupt-cells = <1>;
 253                                 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
 254                                 interrupt-parent = <&liointc1>;
 255                                 interrupt-map-mask = <0 0 0 0>;
 256                                 interrupt-map = <0 0 0 0 &liointc1 3 IRQ_TYPE_LEVEL_LOW>;
 257                                 external-facing;
 258                         };
 259
 260                         pci_bridge@d,0 {
 261                                 compatible = "pci0014,7a19.0",
 262                                                    "pci0014,7a19",
 263                                                    "pciclass060400",
 264                                                    "pciclass0604";
 265
 266                                 reg = <0x6800 0x0 0x0 0x0 0x0>;
 267                                 #interrupt-cells = <1>;
 268                                 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
 269                                 interrupt-parent = <&liointc1>;
 270                                 interrupt-map-mask = <0 0 0 0>;
 271                                 interrupt-map = <0 0 0 0 &liointc1 4 IRQ_TYPE_LEVEL_LOW>;
 272                                 external-facing;
 273                         };
 274
 275                         pci_bridge@e,0 {
 276                                 compatible = "pci0014,7a09.0",
 277                                                    "pci0014,7a09",
 278                                                    "pciclass060400",
 279                                                    "pciclass0604";
 280
 281                                 reg = <0x7000 0x0 0x0 0x0 0x0>;
 282                                 #interrupt-cells = <1>;
 283                                 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
 284                                 interrupt-parent = <&liointc1>;
 285                                 interrupt-map-mask = <0 0 0 0>;
 286                                 interrupt-map = <0 0 0 0 &liointc1 5 IRQ_TYPE_LEVEL_LOW>;
 287                                 external-facing;
 288                         };
 289
 290                 };
 291         };
 292 };
 293