1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4780-cgu.h>
3 #include <dt-bindings/dma/jz4780-dma.h>
8 compatible = "ingenic,jz4780";
10 cpuintc: interrupt-controller {
12 #interrupt-cells = <1>;
14 compatible = "mti,cpu-interrupt-controller";
17 intc: interrupt-controller@10001000 {
18 compatible = "ingenic,jz4780-intc";
19 reg = <0x10001000 0x50>;
22 #interrupt-cells = <1>;
24 interrupt-parent = <&cpuintc>;
29 compatible = "fixed-clock";
34 compatible = "fixed-clock";
36 clock-frequency = <32768>;
39 cgu: jz4780-cgu@10000000 {
40 compatible = "ingenic,jz4780-cgu";
41 reg = <0x10000000 0x100>;
43 clocks = <&ext>, <&rtc>;
44 clock-names = "ext", "rtc";
49 rtc_dev: rtc@10003000 {
50 compatible = "ingenic,jz4780-rtc";
51 reg = <0x10003000 0x4c>;
53 interrupt-parent = <&intc>;
56 clocks = <&cgu JZ4780_CLK_RTCLK>;
60 pinctrl: pin-controller@10010000 {
61 compatible = "ingenic,jz4780-pinctrl";
62 reg = <0x10010000 0x600>;
68 compatible = "ingenic,jz4780-gpio";
72 gpio-ranges = <&pinctrl 0 0 32>;
76 #interrupt-cells = <2>;
78 interrupt-parent = <&intc>;
83 compatible = "ingenic,jz4780-gpio";
87 gpio-ranges = <&pinctrl 0 32 32>;
91 #interrupt-cells = <2>;
93 interrupt-parent = <&intc>;
98 compatible = "ingenic,jz4780-gpio";
102 gpio-ranges = <&pinctrl 0 64 32>;
105 interrupt-controller;
106 #interrupt-cells = <2>;
108 interrupt-parent = <&intc>;
113 compatible = "ingenic,jz4780-gpio";
117 gpio-ranges = <&pinctrl 0 96 32>;
120 interrupt-controller;
121 #interrupt-cells = <2>;
123 interrupt-parent = <&intc>;
128 compatible = "ingenic,jz4780-gpio";
132 gpio-ranges = <&pinctrl 0 128 32>;
135 interrupt-controller;
136 #interrupt-cells = <2>;
138 interrupt-parent = <&intc>;
143 compatible = "ingenic,jz4780-gpio";
147 gpio-ranges = <&pinctrl 0 160 32>;
150 interrupt-controller;
151 #interrupt-cells = <2>;
153 interrupt-parent = <&intc>;
159 compatible = "spi-gpio";
160 #address-cells = <1>;
162 num-chipselects = <2>;
164 gpio-miso = <&gpe 14 0>;
165 gpio-sck = <&gpe 15 0>;
166 gpio-mosi = <&gpe 17 0>;
167 cs-gpios = <&gpe 16 0
171 compatible = "spidev";
173 spi-max-frequency = <1000000>;
177 uart0: serial@10030000 {
178 compatible = "ingenic,jz4780-uart";
179 reg = <0x10030000 0x100>;
181 interrupt-parent = <&intc>;
184 clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
185 clock-names = "baud", "module";
190 uart1: serial@10031000 {
191 compatible = "ingenic,jz4780-uart";
192 reg = <0x10031000 0x100>;
194 interrupt-parent = <&intc>;
197 clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
198 clock-names = "baud", "module";
203 uart2: serial@10032000 {
204 compatible = "ingenic,jz4780-uart";
205 reg = <0x10032000 0x100>;
207 interrupt-parent = <&intc>;
210 clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
211 clock-names = "baud", "module";
216 uart3: serial@10033000 {
217 compatible = "ingenic,jz4780-uart";
218 reg = <0x10033000 0x100>;
220 interrupt-parent = <&intc>;
223 clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
224 clock-names = "baud", "module";
229 uart4: serial@10034000 {
230 compatible = "ingenic,jz4780-uart";
231 reg = <0x10034000 0x100>;
233 interrupt-parent = <&intc>;
236 clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
237 clock-names = "baud", "module";
242 watchdog: watchdog@10002000 {
243 compatible = "ingenic,jz4780-watchdog";
244 reg = <0x10002000 0x10>;
246 clocks = <&cgu JZ4780_CLK_RTCLK>;
250 nemc: nemc@13410000 {
251 compatible = "ingenic,jz4780-nemc";
252 reg = <0x13410000 0x10000>;
253 #address-cells = <2>;
255 ranges = <1 0 0x1b000000 0x1000000
256 2 0 0x1a000000 0x1000000
257 3 0 0x19000000 0x1000000
258 4 0 0x18000000 0x1000000
259 5 0 0x17000000 0x1000000
260 6 0 0x16000000 0x1000000>;
262 clocks = <&cgu JZ4780_CLK_NEMC>;
268 compatible = "ingenic,jz4780-dma";
269 reg = <0x13420000 0x10000>;
272 interrupt-parent = <&intc>;
275 clocks = <&cgu JZ4780_CLK_PDMA>;
279 compatible = "ingenic,jz4780-mmc";
280 reg = <0x13450000 0x1000>;
282 interrupt-parent = <&intc>;
285 clocks = <&cgu JZ4780_CLK_MSC0>;
291 dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
292 <&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
293 dma-names = "rx", "tx";
299 compatible = "ingenic,jz4780-mmc";
300 reg = <0x13460000 0x1000>;
302 interrupt-parent = <&intc>;
305 clocks = <&cgu JZ4780_CLK_MSC1>;
311 dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
312 <&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
313 dma-names = "rx", "tx";
319 compatible = "ingenic,jz4780-bch";
320 reg = <0x134d0000 0x10000>;
322 clocks = <&cgu JZ4780_CLK_BCH>;