1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
9 compatible = "ingenic,jz4780";
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
20 clocks = <&cgu JZ4780_CLK_CPU>;
26 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
29 clocks = <&cgu JZ4780_CLK_CORE1>;
34 cpuintc: interrupt-controller {
36 #interrupt-cells = <1>;
38 compatible = "mti,cpu-interrupt-controller";
41 intc: interrupt-controller@10001000 {
42 compatible = "ingenic,jz4780-intc";
43 reg = <0x10001000 0x50>;
46 #interrupt-cells = <1>;
48 interrupt-parent = <&cpuintc>;
53 compatible = "fixed-clock";
58 compatible = "fixed-clock";
60 clock-frequency = <32768>;
63 cgu: jz4780-cgu@10000000 {
64 compatible = "ingenic,jz4780-cgu", "simple-mfd";
65 reg = <0x10000000 0x100>;
68 ranges = <0x0 0x10000000 0x100>;
72 clocks = <&ext>, <&rtc>;
73 clock-names = "ext", "rtc";
76 compatible = "ingenic,jz4780-phy";
79 clocks = <&cgu JZ4780_CLK_OTG1>;
87 compatible = "ingenic,jz4780-rng";
95 compatible = "ingenic,jz4780-tcu",
98 reg = <0x10002000 0x1000>;
101 ranges = <0x0 0x10002000 0x1000>;
105 clocks = <&cgu JZ4780_CLK_RTCLK>,
106 <&cgu JZ4780_CLK_EXCLK>,
107 <&cgu JZ4780_CLK_PCLK>;
108 clock-names = "rtc", "ext", "pclk";
110 interrupt-controller;
111 #interrupt-cells = <1>;
113 interrupt-parent = <&intc>;
114 interrupts = <27 26 25>;
116 watchdog: watchdog@0 {
117 compatible = "ingenic,jz4780-watchdog";
120 clocks = <&tcu TCU_CLK_WDT>;
125 compatible = "ingenic,jz4780-pwm", "ingenic,jz4740-pwm";
130 clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
131 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
132 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
133 <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
134 clock-names = "timer0", "timer1", "timer2", "timer3",
135 "timer4", "timer5", "timer6", "timer7";
139 compatible = "ingenic,jz4780-ost", "ingenic,jz4770-ost";
142 clocks = <&tcu TCU_CLK_OST>;
149 rtc_dev: rtc@10003000 {
150 compatible = "ingenic,jz4780-rtc";
151 reg = <0x10003000 0x4c>;
153 interrupt-parent = <&intc>;
156 clocks = <&cgu JZ4780_CLK_RTCLK>;
162 pinctrl: pin-controller@10010000 {
163 compatible = "ingenic,jz4780-pinctrl";
164 reg = <0x10010000 0x600>;
166 #address-cells = <1>;
170 compatible = "ingenic,jz4780-gpio";
174 gpio-ranges = <&pinctrl 0 0 32>;
177 interrupt-controller;
178 #interrupt-cells = <2>;
180 interrupt-parent = <&intc>;
185 compatible = "ingenic,jz4780-gpio";
189 gpio-ranges = <&pinctrl 0 32 32>;
192 interrupt-controller;
193 #interrupt-cells = <2>;
195 interrupt-parent = <&intc>;
200 compatible = "ingenic,jz4780-gpio";
204 gpio-ranges = <&pinctrl 0 64 32>;
207 interrupt-controller;
208 #interrupt-cells = <2>;
210 interrupt-parent = <&intc>;
215 compatible = "ingenic,jz4780-gpio";
219 gpio-ranges = <&pinctrl 0 96 32>;
222 interrupt-controller;
223 #interrupt-cells = <2>;
225 interrupt-parent = <&intc>;
230 compatible = "ingenic,jz4780-gpio";
234 gpio-ranges = <&pinctrl 0 128 32>;
237 interrupt-controller;
238 #interrupt-cells = <2>;
240 interrupt-parent = <&intc>;
245 compatible = "ingenic,jz4780-gpio";
249 gpio-ranges = <&pinctrl 0 160 32>;
252 interrupt-controller;
253 #interrupt-cells = <2>;
255 interrupt-parent = <&intc>;
261 compatible = "ingenic,jz4780-spi";
262 reg = <0x10043000 0x1c>;
263 #address-cells = <1>;
266 interrupt-parent = <&intc>;
269 clocks = <&cgu JZ4780_CLK_SSI0>;
272 dmas = <&dma JZ4780_DMA_SSI0_RX 0xffffffff>,
273 <&dma JZ4780_DMA_SSI0_TX 0xffffffff>;
274 dma-names = "rx", "tx";
279 uart0: serial@10030000 {
280 compatible = "ingenic,jz4780-uart";
281 reg = <0x10030000 0x100>;
283 interrupt-parent = <&intc>;
286 clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
287 clock-names = "baud", "module";
292 uart1: serial@10031000 {
293 compatible = "ingenic,jz4780-uart";
294 reg = <0x10031000 0x100>;
296 interrupt-parent = <&intc>;
299 clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
300 clock-names = "baud", "module";
305 uart2: serial@10032000 {
306 compatible = "ingenic,jz4780-uart";
307 reg = <0x10032000 0x100>;
309 interrupt-parent = <&intc>;
312 clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
313 clock-names = "baud", "module";
318 uart3: serial@10033000 {
319 compatible = "ingenic,jz4780-uart";
320 reg = <0x10033000 0x100>;
322 interrupt-parent = <&intc>;
325 clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
326 clock-names = "baud", "module";
331 uart4: serial@10034000 {
332 compatible = "ingenic,jz4780-uart";
333 reg = <0x10034000 0x100>;
335 interrupt-parent = <&intc>;
338 clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
339 clock-names = "baud", "module";
345 compatible = "ingenic,jz4780-spi";
346 reg = <0x10044000 0x1c>;
347 #address-cells = <1>;
350 interrupt-parent = <&intc>;
353 clocks = <&cgu JZ4780_CLK_SSI1>;
356 dmas = <&dma JZ4780_DMA_SSI1_RX 0xffffffff>,
357 <&dma JZ4780_DMA_SSI1_TX 0xffffffff>;
358 dma-names = "rx", "tx";
364 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
365 #address-cells = <1>;
368 reg = <0x10050000 0x1000>;
370 interrupt-parent = <&intc>;
373 clocks = <&cgu JZ4780_CLK_SMB0>;
374 clock-frequency = <100000>;
375 pinctrl-names = "default";
376 pinctrl-0 = <&pins_i2c0_data>;
382 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
383 #address-cells = <1>;
385 reg = <0x10051000 0x1000>;
387 interrupt-parent = <&intc>;
390 clocks = <&cgu JZ4780_CLK_SMB1>;
391 clock-frequency = <100000>;
392 pinctrl-names = "default";
393 pinctrl-0 = <&pins_i2c1_data>;
399 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
400 #address-cells = <1>;
402 reg = <0x10052000 0x1000>;
404 interrupt-parent = <&intc>;
407 clocks = <&cgu JZ4780_CLK_SMB2>;
408 clock-frequency = <100000>;
409 pinctrl-names = "default";
410 pinctrl-0 = <&pins_i2c2_data>;
416 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
417 #address-cells = <1>;
419 reg = <0x10053000 0x1000>;
421 interrupt-parent = <&intc>;
424 clocks = <&cgu JZ4780_CLK_SMB3>;
425 clock-frequency = <100000>;
426 pinctrl-names = "default";
427 pinctrl-0 = <&pins_i2c3_data>;
433 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
434 #address-cells = <1>;
436 reg = <0x10054000 0x1000>;
438 interrupt-parent = <&intc>;
441 clocks = <&cgu JZ4780_CLK_SMB4>;
442 clock-frequency = <100000>;
443 pinctrl-names = "default";
444 pinctrl-0 = <&pins_i2c4_data>;
449 hdmi: hdmi@10180000 {
450 compatible = "ingenic,jz4780-dw-hdmi";
451 reg = <0x10180000 0x8000>;
454 clocks = <&cgu JZ4780_CLK_AHB0>, <&cgu JZ4780_CLK_HDMI>;
455 clock-names = "iahb", "isfr";
457 interrupt-parent = <&intc>;
463 lcdc0: lcdc0@13050000 {
464 compatible = "ingenic,jz4780-lcd";
465 reg = <0x13050000 0x1800>;
467 clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD0PIXCLK>;
468 clock-names = "lcd", "lcd_pclk";
470 interrupt-parent = <&intc>;
476 lcdc1: lcdc1@130a0000 {
477 compatible = "ingenic,jz4780-lcd";
478 reg = <0x130a0000 0x1800>;
480 clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD1PIXCLK>;
481 clock-names = "lcd", "lcd_pclk";
483 interrupt-parent = <&intc>;
489 nemc: nemc@13410000 {
490 compatible = "ingenic,jz4780-nemc", "simple-mfd";
491 reg = <0x13410000 0x10000>;
492 #address-cells = <2>;
494 ranges = <0 0 0x13410000 0x10000>,
495 <1 0 0x1b000000 0x1000000>,
496 <2 0 0x1a000000 0x1000000>,
497 <3 0 0x19000000 0x1000000>,
498 <4 0 0x18000000 0x1000000>,
499 <5 0 0x17000000 0x1000000>,
500 <6 0 0x16000000 0x1000000>;
502 clocks = <&cgu JZ4780_CLK_NEMC>;
508 compatible = "ingenic,jz4780-efuse";
510 clocks = <&cgu JZ4780_CLK_AHB2>;
512 #address-cells = <1>;
515 eth0_addr: eth-mac-addr@22 {
522 compatible = "ingenic,jz4780-dma";
523 reg = <0x13420000 0x400>, <0x13421000 0x40>;
526 interrupt-parent = <&intc>;
529 clocks = <&cgu JZ4780_CLK_PDMA>;
533 compatible = "ingenic,jz4780-mmc";
534 reg = <0x13450000 0x1000>;
536 interrupt-parent = <&intc>;
539 clocks = <&cgu JZ4780_CLK_MSC0>;
545 dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
546 <&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
547 dma-names = "rx", "tx";
553 compatible = "ingenic,jz4780-mmc";
554 reg = <0x13460000 0x1000>;
556 interrupt-parent = <&intc>;
559 clocks = <&cgu JZ4780_CLK_MSC1>;
565 dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
566 <&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
567 dma-names = "rx", "tx";
573 compatible = "ingenic,jz4780-bch";
574 reg = <0x134d0000 0x10000>;
576 clocks = <&cgu JZ4780_CLK_BCH>;
582 compatible = "ingenic,jz4780-otg";
583 reg = <0x13500000 0x40000>;
585 interrupt-parent = <&intc>;
588 clocks = <&cgu JZ4780_CLK_UHC>;
592 phy-names = "usb2-phy";
594 g-rx-fifo-size = <768>;
595 g-np-tx-fifo-size = <256>;
596 g-tx-fifo-size = <256 256 256 256 256 256 256 512>;