1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
9 compatible = "ingenic,jz4780";
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
20 clocks = <&cgu JZ4780_CLK_CPU>;
26 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
29 clocks = <&cgu JZ4780_CLK_CORE1>;
34 cpuintc: interrupt-controller {
36 #interrupt-cells = <1>;
38 compatible = "mti,cpu-interrupt-controller";
41 intc: interrupt-controller@10001000 {
42 compatible = "ingenic,jz4780-intc";
43 reg = <0x10001000 0x50>;
46 #interrupt-cells = <1>;
48 interrupt-parent = <&cpuintc>;
53 compatible = "fixed-clock";
58 compatible = "fixed-clock";
60 clock-frequency = <32768>;
63 cgu: jz4780-cgu@10000000 {
64 compatible = "ingenic,jz4780-cgu", "simple-mfd";
65 reg = <0x10000000 0x100>;
68 ranges = <0x0 0x10000000 0x100>;
72 clocks = <&ext>, <&rtc>;
73 clock-names = "ext", "rtc";
76 compatible = "ingenic,jz4780-phy";
79 clocks = <&cgu JZ4780_CLK_OTG1>;
87 compatible = "ingenic,jz4780-rng";
95 compatible = "ingenic,jz4780-tcu",
98 reg = <0x10002000 0x1000>;
101 ranges = <0x0 0x10002000 0x1000>;
105 clocks = <&cgu JZ4780_CLK_RTCLK>,
106 <&cgu JZ4780_CLK_EXCLK>,
107 <&cgu JZ4780_CLK_PCLK>;
108 clock-names = "rtc", "ext", "pclk";
110 interrupt-controller;
111 #interrupt-cells = <1>;
113 interrupt-parent = <&intc>;
114 interrupts = <27 26 25>;
116 watchdog: watchdog@0 {
117 compatible = "ingenic,jz4780-watchdog";
120 clocks = <&tcu TCU_CLK_WDT>;
125 compatible = "ingenic,jz4780-pwm", "ingenic,jz4740-pwm";
130 clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
131 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
132 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
133 <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
134 clock-names = "timer0", "timer1", "timer2", "timer3",
135 "timer4", "timer5", "timer6", "timer7";
139 compatible = "ingenic,jz4780-ost", "ingenic,jz4770-ost";
142 clocks = <&tcu TCU_CLK_OST>;
149 rtc_dev: rtc@10003000 {
150 compatible = "ingenic,jz4780-rtc";
151 reg = <0x10003000 0x4c>;
153 interrupt-parent = <&intc>;
156 clocks = <&cgu JZ4780_CLK_RTCLK>;
160 pinctrl: pin-controller@10010000 {
161 compatible = "ingenic,jz4780-pinctrl";
162 reg = <0x10010000 0x600>;
164 #address-cells = <1>;
168 compatible = "ingenic,jz4780-gpio";
172 gpio-ranges = <&pinctrl 0 0 32>;
175 interrupt-controller;
176 #interrupt-cells = <2>;
178 interrupt-parent = <&intc>;
183 compatible = "ingenic,jz4780-gpio";
187 gpio-ranges = <&pinctrl 0 32 32>;
190 interrupt-controller;
191 #interrupt-cells = <2>;
193 interrupt-parent = <&intc>;
198 compatible = "ingenic,jz4780-gpio";
202 gpio-ranges = <&pinctrl 0 64 32>;
205 interrupt-controller;
206 #interrupt-cells = <2>;
208 interrupt-parent = <&intc>;
213 compatible = "ingenic,jz4780-gpio";
217 gpio-ranges = <&pinctrl 0 96 32>;
220 interrupt-controller;
221 #interrupt-cells = <2>;
223 interrupt-parent = <&intc>;
228 compatible = "ingenic,jz4780-gpio";
232 gpio-ranges = <&pinctrl 0 128 32>;
235 interrupt-controller;
236 #interrupt-cells = <2>;
238 interrupt-parent = <&intc>;
243 compatible = "ingenic,jz4780-gpio";
247 gpio-ranges = <&pinctrl 0 160 32>;
250 interrupt-controller;
251 #interrupt-cells = <2>;
253 interrupt-parent = <&intc>;
259 compatible = "ingenic,jz4780-spi";
260 reg = <0x10043000 0x1c>;
261 #address-cells = <1>;
264 interrupt-parent = <&intc>;
267 clocks = <&cgu JZ4780_CLK_SSI0>;
270 dmas = <&dma JZ4780_DMA_SSI0_RX 0xffffffff>,
271 <&dma JZ4780_DMA_SSI0_TX 0xffffffff>;
272 dma-names = "rx", "tx";
277 uart0: serial@10030000 {
278 compatible = "ingenic,jz4780-uart";
279 reg = <0x10030000 0x100>;
281 interrupt-parent = <&intc>;
284 clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
285 clock-names = "baud", "module";
290 uart1: serial@10031000 {
291 compatible = "ingenic,jz4780-uart";
292 reg = <0x10031000 0x100>;
294 interrupt-parent = <&intc>;
297 clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
298 clock-names = "baud", "module";
303 uart2: serial@10032000 {
304 compatible = "ingenic,jz4780-uart";
305 reg = <0x10032000 0x100>;
307 interrupt-parent = <&intc>;
310 clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
311 clock-names = "baud", "module";
316 uart3: serial@10033000 {
317 compatible = "ingenic,jz4780-uart";
318 reg = <0x10033000 0x100>;
320 interrupt-parent = <&intc>;
323 clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
324 clock-names = "baud", "module";
329 uart4: serial@10034000 {
330 compatible = "ingenic,jz4780-uart";
331 reg = <0x10034000 0x100>;
333 interrupt-parent = <&intc>;
336 clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
337 clock-names = "baud", "module";
343 compatible = "ingenic,jz4780-spi";
344 reg = <0x10044000 0x1c>;
345 #address-cells = <1>;
348 interrupt-parent = <&intc>;
351 clocks = <&cgu JZ4780_CLK_SSI1>;
354 dmas = <&dma JZ4780_DMA_SSI1_RX 0xffffffff>,
355 <&dma JZ4780_DMA_SSI1_TX 0xffffffff>;
356 dma-names = "rx", "tx";
362 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
363 #address-cells = <1>;
366 reg = <0x10050000 0x1000>;
368 interrupt-parent = <&intc>;
371 clocks = <&cgu JZ4780_CLK_SMB0>;
372 clock-frequency = <100000>;
373 pinctrl-names = "default";
374 pinctrl-0 = <&pins_i2c0_data>;
380 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
381 #address-cells = <1>;
383 reg = <0x10051000 0x1000>;
385 interrupt-parent = <&intc>;
388 clocks = <&cgu JZ4780_CLK_SMB1>;
389 clock-frequency = <100000>;
390 pinctrl-names = "default";
391 pinctrl-0 = <&pins_i2c1_data>;
397 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
398 #address-cells = <1>;
400 reg = <0x10052000 0x1000>;
402 interrupt-parent = <&intc>;
405 clocks = <&cgu JZ4780_CLK_SMB2>;
406 clock-frequency = <100000>;
407 pinctrl-names = "default";
408 pinctrl-0 = <&pins_i2c2_data>;
414 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
415 #address-cells = <1>;
417 reg = <0x10053000 0x1000>;
419 interrupt-parent = <&intc>;
422 clocks = <&cgu JZ4780_CLK_SMB3>;
423 clock-frequency = <100000>;
424 pinctrl-names = "default";
425 pinctrl-0 = <&pins_i2c3_data>;
431 compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
432 #address-cells = <1>;
434 reg = <0x10054000 0x1000>;
436 interrupt-parent = <&intc>;
439 clocks = <&cgu JZ4780_CLK_SMB4>;
440 clock-frequency = <100000>;
441 pinctrl-names = "default";
442 pinctrl-0 = <&pins_i2c4_data>;
447 hdmi: hdmi@10180000 {
448 compatible = "ingenic,jz4780-dw-hdmi";
449 reg = <0x10180000 0x8000>;
452 clocks = <&cgu JZ4780_CLK_AHB0>, <&cgu JZ4780_CLK_HDMI>;
453 clock-names = "iahb", "isfr";
455 interrupt-parent = <&intc>;
461 lcdc0: lcdc0@13050000 {
462 compatible = "ingenic,jz4780-lcd";
463 reg = <0x13050000 0x1800>;
465 clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD0PIXCLK>;
466 clock-names = "lcd", "lcd_pclk";
468 interrupt-parent = <&intc>;
474 lcdc1: lcdc1@130a0000 {
475 compatible = "ingenic,jz4780-lcd";
476 reg = <0x130a0000 0x1800>;
478 clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD1PIXCLK>;
479 clock-names = "lcd", "lcd_pclk";
481 interrupt-parent = <&intc>;
487 nemc: nemc@13410000 {
488 compatible = "ingenic,jz4780-nemc", "simple-mfd";
489 reg = <0x13410000 0x10000>;
490 #address-cells = <2>;
492 ranges = <0 0 0x13410000 0x10000>,
493 <1 0 0x1b000000 0x1000000>,
494 <2 0 0x1a000000 0x1000000>,
495 <3 0 0x19000000 0x1000000>,
496 <4 0 0x18000000 0x1000000>,
497 <5 0 0x17000000 0x1000000>,
498 <6 0 0x16000000 0x1000000>;
500 clocks = <&cgu JZ4780_CLK_NEMC>;
506 compatible = "ingenic,jz4780-efuse";
508 clocks = <&cgu JZ4780_CLK_AHB2>;
510 #address-cells = <1>;
513 eth0_addr: eth-mac-addr@22 {
520 compatible = "ingenic,jz4780-dma";
521 reg = <0x13420000 0x400>, <0x13421000 0x40>;
524 interrupt-parent = <&intc>;
527 clocks = <&cgu JZ4780_CLK_PDMA>;
531 compatible = "ingenic,jz4780-mmc";
532 reg = <0x13450000 0x1000>;
534 interrupt-parent = <&intc>;
537 clocks = <&cgu JZ4780_CLK_MSC0>;
543 dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
544 <&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
545 dma-names = "rx", "tx";
551 compatible = "ingenic,jz4780-mmc";
552 reg = <0x13460000 0x1000>;
554 interrupt-parent = <&intc>;
557 clocks = <&cgu JZ4780_CLK_MSC1>;
563 dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
564 <&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
565 dma-names = "rx", "tx";
571 compatible = "ingenic,jz4780-bch";
572 reg = <0x134d0000 0x10000>;
574 clocks = <&cgu JZ4780_CLK_BCH>;
580 compatible = "ingenic,jz4780-otg";
581 reg = <0x13500000 0x40000>;
583 interrupt-parent = <&intc>;
586 clocks = <&cgu JZ4780_CLK_UHC>;
590 phy-names = "usb2-phy";
592 g-rx-fifo-size = <768>;
593 g-np-tx-fifo-size = <256>;
594 g-tx-fifo-size = <256 256 256 256 256 256 256 512>;