1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4725b-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
8 compatible = "ingenic,jz4725b";
16 compatible = "ingenic,xburst-mxu1.0";
19 clocks = <&cgu JZ4725B_CLK_CCLK>;
24 cpuintc: interrupt-controller {
26 #interrupt-cells = <1>;
28 compatible = "mti,cpu-interrupt-controller";
31 intc: interrupt-controller@10001000 {
32 compatible = "ingenic,jz4725b-intc", "ingenic,jz4740-intc";
33 reg = <0x10001000 0x14>;
36 #interrupt-cells = <1>;
38 interrupt-parent = <&cpuintc>;
43 compatible = "fixed-clock";
48 compatible = "fixed-clock";
50 clock-frequency = <32768>;
53 cgu: clock-controller@10000000 {
54 compatible = "ingenic,jz4725b-cgu";
55 reg = <0x10000000 0x100>;
57 clocks = <&ext>, <&osc32k>;
58 clock-names = "ext", "osc32k";
64 compatible = "ingenic,jz4725b-tcu", "simple-mfd";
65 reg = <0x10002000 0x1000>;
68 ranges = <0x0 0x10002000 0x1000>;
72 clocks = <&cgu JZ4725B_CLK_RTC>,
73 <&cgu JZ4725B_CLK_EXT>,
74 <&cgu JZ4725B_CLK_PCLK>,
75 <&cgu JZ4725B_CLK_TCU>;
76 clock-names = "rtc", "ext", "pclk", "tcu";
79 #interrupt-cells = <1>;
81 interrupt-parent = <&intc>;
82 interrupts = <23>, <22>, <21>;
84 watchdog: watchdog@0 {
85 compatible = "ingenic,jz4725b-watchdog", "ingenic,jz4740-watchdog";
88 clocks = <&tcu TCU_CLK_WDT>;
93 compatible = "ingenic,jz4725b-pwm";
98 clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
99 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
100 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>;
101 clock-names = "timer0", "timer1", "timer2",
102 "timer3", "timer4", "timer5";
106 compatible = "ingenic,jz4725b-ost";
109 clocks = <&tcu TCU_CLK_OST>;
116 rtc_dev: rtc@10003000 {
117 compatible = "ingenic,jz4725b-rtc", "ingenic,jz4740-rtc";
118 reg = <0x10003000 0x40>;
120 interrupt-parent = <&intc>;
123 clocks = <&cgu JZ4725B_CLK_RTC>;
127 pinctrl: pinctrl@10010000 {
128 compatible = "ingenic,jz4725b-pinctrl";
129 reg = <0x10010000 0x400>;
131 #address-cells = <1>;
135 compatible = "ingenic,jz4725b-gpio";
139 gpio-ranges = <&pinctrl 0 0 32>;
142 interrupt-controller;
143 #interrupt-cells = <2>;
145 interrupt-parent = <&intc>;
150 compatible = "ingenic,jz4725b-gpio";
154 gpio-ranges = <&pinctrl 0 32 32>;
157 interrupt-controller;
158 #interrupt-cells = <2>;
160 interrupt-parent = <&intc>;
165 compatible = "ingenic,jz4725b-gpio";
169 gpio-ranges = <&pinctrl 0 64 32>;
172 interrupt-controller;
173 #interrupt-cells = <2>;
175 interrupt-parent = <&intc>;
180 compatible = "ingenic,jz4725b-gpio";
184 gpio-ranges = <&pinctrl 0 96 32>;
187 interrupt-controller;
188 #interrupt-cells = <2>;
190 interrupt-parent = <&intc>;
195 aic: audio-controller@10020000 {
196 compatible = "ingenic,jz4725b-i2s", "ingenic,jz4740-i2s";
197 reg = <0x10020000 0x38>;
199 #sound-dai-cells = <0>;
201 clocks = <&cgu JZ4725B_CLK_AIC>, <&cgu JZ4725B_CLK_I2S>;
202 clock-names = "aic", "i2s";
204 interrupt-parent = <&intc>;
207 dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>;
208 dma-names = "rx", "tx";
211 codec: audio-codec@100200a4 {
212 compatible = "ingenic,jz4725b-codec";
213 reg = <0x100200a4 0x8>;
215 #sound-dai-cells = <0>;
217 clocks = <&cgu JZ4725B_CLK_AIC>;
222 compatible = "ingenic,jz4725b-mmc";
223 reg = <0x10021000 0x1000>;
225 clocks = <&cgu JZ4725B_CLK_MMC0>;
228 interrupt-parent = <&intc>;
231 dmas = <&dmac 27 0xffffffff>, <&dmac 26 0xffffffff>;
232 dma-names = "rx", "tx";
240 compatible = "ingenic,jz4725b-mmc";
241 reg = <0x10022000 0x1000>;
243 clocks = <&cgu JZ4725B_CLK_MMC1>;
246 interrupt-parent = <&intc>;
249 dmas = <&dmac 31 0xffffffff>, <&dmac 30 0xffffffff>;
250 dma-names = "rx", "tx";
257 uart: serial@10030000 {
258 compatible = "ingenic,jz4725b-uart", "ingenic,jz4740-uart";
259 reg = <0x10030000 0x100>;
261 interrupt-parent = <&intc>;
264 clocks = <&ext>, <&cgu JZ4725B_CLK_UART>;
265 clock-names = "baud", "module";
269 compatible = "ingenic,jz4725b-adc";
270 #io-channel-cells = <1>;
272 reg = <0x10070000 0x30>;
273 #address-cells = <1>;
275 ranges = <0x0 0x10070000 0x30>;
277 clocks = <&cgu JZ4725B_CLK_ADC>;
280 interrupt-parent = <&intc>;
284 nemc: memory-controller@13010000 {
285 compatible = "ingenic,jz4725b-nemc", "ingenic,jz4740-nemc";
286 reg = <0x13010000 0x10000>;
287 #address-cells = <2>;
289 ranges = <1 0 0x18000000 0x4000000>, <2 0 0x14000000 0x4000000>,
290 <3 0 0x0c000000 0x4000000>, <4 0 0x08000000 0x4000000>;
292 clocks = <&cgu JZ4725B_CLK_MCLK>;
295 dmac: dma-controller@13020000 {
296 compatible = "ingenic,jz4725b-dma";
297 reg = <0x13020000 0xd8>, <0x13020300 0x14>;
301 interrupt-parent = <&intc>;
304 clocks = <&cgu JZ4725B_CLK_DMA>;
308 compatible = "ingenic,jz4725b-musb", "ingenic,jz4740-musb";
309 reg = <0x13040000 0x10000>;
311 interrupt-parent = <&intc>;
313 interrupt-names = "mc";
315 clocks = <&cgu JZ4725B_CLK_UDC>;
319 lcd: lcd-controller@13050000 {
320 compatible = "ingenic,jz4725b-lcd";
321 reg = <0x13050000 0x130>; /* tbc */
323 interrupt-parent = <&intc>;
326 clocks = <&cgu JZ4725B_CLK_LCD>;
327 clock-names = "lcd_pclk";
330 #address-cells = <1>;
336 ipu_output: endpoint {
337 remote-endpoint = <&ipu_input>;
344 compatible = "ingenic,jz4725b-ipu";
345 reg = <0x13080000 0x64>;
347 interrupt-parent = <&intc>;
350 clocks = <&cgu JZ4725B_CLK_IPU>;
354 ipu_input: endpoint {
355 remote-endpoint = <&ipu_output>;
360 bch: ecc-controller@130d0000 {
361 compatible = "ingenic,jz4725b-bch";
362 reg = <0x130d0000 0x44>;
364 clocks = <&cgu JZ4725B_CLK_BCH>;
367 rom: memory@1fc00000 {
368 compatible = "mtd-rom";
369 reg = <0x1fc00000 0x2000>;