arm64: dts: qcom: sm8550: add TRNG node
[linux-modified.git] / arch / mips / boot / dts / ingenic / cu1000-neo.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3
4 #include "x1000.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/clock/ingenic,sysost.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8
9 / {
10         compatible = "yna,cu1000-neo", "ingenic,x1000e";
11         model = "YSH & ATIL General Board CU1000-Neo";
12
13         aliases {
14                 serial2 = &uart2;
15         };
16
17         chosen {
18                 stdout-path = "serial2:115200n8";
19         };
20
21         memory {
22                 device_type = "memory";
23                 reg = <0x0 0x04000000>;
24         };
25
26         leds {
27                 compatible = "gpio-leds";
28                 led-0 {
29                         gpios = <&gpb 21 GPIO_ACTIVE_HIGH>;
30                         linux,default-trigger = "mmc0";
31                 };
32         };
33
34         wlan_pwrseq: msc1-pwrseq {
35                 compatible = "mmc-pwrseq-simple";
36
37                 reset-gpios = <&gpc 17 GPIO_ACTIVE_LOW>;
38                 post-power-on-delay-ms = <200>;
39         };
40 };
41
42 &exclk {
43         clock-frequency = <24000000>;
44 };
45
46 &cgu {
47         /*
48          * Use the 32.768 kHz oscillator as the parent of the RTC for a higher
49          * precision.
50          */
51         assigned-clocks = <&cgu X1000_CLK_RTC>;
52         assigned-clock-parents = <&cgu X1000_CLK_RTCLK>;
53 };
54
55 &ost {
56         /* 1500 kHz for the system timer and clocksource */
57         assigned-clocks = <&ost OST_CLK_EVENT_TIMER>, <&ost OST_CLK_GLOBAL_TIMER>;
58         assigned-clock-rates = <1500000>, <1500000>;
59 };
60
61 &uart2 {
62         status = "okay";
63
64         pinctrl-names = "default";
65         pinctrl-0 = <&pins_uart2>;
66 };
67
68 &ssi {
69         status = "okay";
70
71         num-cs = <2>;
72         cs-gpios = <0>, <&gpc 20 GPIO_ACTIVE_LOW>;
73
74         pinctrl-names = "default";
75         pinctrl-0 = <&pins_ssi>;
76
77         sc16is752: expander@0 {
78                 compatible = "nxp,sc16is752";
79                 reg = <0>; /* CE0 */
80
81                 spi-rx-bus-width = <1>;
82                 spi-tx-bus-width = <1>;
83                 spi-max-frequency = <4000000>;
84
85                 clocks = <&exclk_sc16is752>;
86
87                 interrupt-parent = <&gpc>;
88                 interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
89
90                 gpio-controller;
91                 #gpio-cells = <2>;
92
93                 exclk_sc16is752: sc16is752 {
94                         compatible = "fixed-clock";
95                         #clock-cells = <0>;
96                         clock-frequency = <48000000>;
97                 };
98         };
99 };
100
101 &i2c0 {
102         status = "okay";
103
104         clock-frequency = <400000>;
105
106         pinctrl-names = "default";
107         pinctrl-0 = <&pins_i2c0>;
108
109         ads7830: adc@48 {
110                 compatible = "ti,ads7830";
111                 reg = <0x48>;
112         };
113 };
114
115 &msc0 {
116         status = "okay";
117
118         bus-width = <8>;
119         max-frequency = <50000000>;
120
121         pinctrl-names = "default";
122         pinctrl-0 = <&pins_msc0>;
123
124         non-removable;
125 };
126
127 &msc1 {
128         status = "okay";
129
130         #address-cells = <1>;
131         #size-cells = <0>;
132         bus-width = <4>;
133         max-frequency = <50000000>;
134
135         pinctrl-names = "default";
136         pinctrl-0 = <&pins_msc1>;
137
138         non-removable;
139
140         mmc-pwrseq = <&wlan_pwrseq>;
141
142         ap6212a: wifi@1 {
143                 compatible = "brcm,bcm4329-fmac";
144                 reg = <1>;
145
146                 interrupt-parent = <&gpc>;
147                 interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
148                 interrupt-names = "host-wake";
149
150                 brcm,drive-strength = <10>;
151         };
152 };
153
154 &mac {
155         status = "okay";
156
157         phy-mode = "rmii";
158         phy-handle = <&lan8720a>;
159
160         pinctrl-names = "default";
161         pinctrl-0 = <&pins_mac>;
162
163         snps,reset-gpio = <&gpc 23 GPIO_ACTIVE_LOW>; /* PC23 */
164         snps,reset-active-low;
165         snps,reset-delays-us = <0 10000 30000>;
166 };
167
168 &mdio {
169         status = "okay";
170
171         lan8720a: ethernet-phy@0 {
172                 compatible = "ethernet-phy-id0007.c0f0", "ethernet-phy-ieee802.3-c22";
173                 reg = <0>;
174         };
175 };
176
177 &otg_phy {
178         status = "okay";
179 };
180
181 &otg {
182         status = "okay";
183 };
184
185 &pinctrl {
186         pins_uart2: uart2 {
187                 function = "uart2";
188                 groups = "uart2-data-d";
189                 bias-pull-up;
190         };
191
192         pins_ssi: ssi {
193                 function = "ssi";
194                 groups = "ssi-dt-d", "ssi-dr-d", "ssi-clk-d", "ssi-ce0-d";
195                 bias-disable;
196         };
197
198         pins_i2c0: i2c0 {
199                 function = "i2c0";
200                 groups = "i2c0-data";
201                 bias-pull-up;
202         };
203
204         pins_msc0: msc0 {
205                 function = "mmc0";
206                 groups = "mmc0-1bit", "mmc0-4bit", "mmc0-8bit";
207                 bias-disable;
208         };
209
210         pins_msc1: msc1 {
211                 function = "mmc1";
212                 groups = "mmc1-1bit", "mmc1-4bit";
213                 bias-disable;
214         };
215
216         pins_mac: mac {
217                 function = "mac";
218                 groups = "mac";
219                 bias-disable;
220         };
221 };