1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/ingenic,tcu.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/regulator/active-semi,8865-regulator.h>
12 compatible = "img,ci20", "ingenic,jz4780";
26 device_type = "memory";
28 0x30000000 0x30000000>;
32 compatible = "gpio-keys";
36 linux,code = <KEY_F13>;
37 gpios = <&gpd 17 GPIO_ACTIVE_HIGH>;
43 compatible = "gpio-leds";
46 label = "ci20:red:led0";
47 gpios = <&gpc 3 GPIO_ACTIVE_HIGH>;
48 linux,default-trigger = "none";
52 label = "ci20:red:led1";
53 gpios = <&gpc 2 GPIO_ACTIVE_HIGH>;
54 linux,default-trigger = "nand-disk";
58 label = "ci20:red:led2";
59 gpios = <&gpc 1 GPIO_ACTIVE_HIGH>;
60 linux,default-trigger = "cpu1";
64 label = "ci20:red:led3";
65 gpios = <&gpc 0 GPIO_ACTIVE_HIGH>;
66 linux,default-trigger = "cpu0";
70 eth0_power: fixedregulator@0 {
71 compatible = "regulator-fixed";
73 regulator-name = "eth0_power";
74 regulator-min-microvolt = <3300000>;
75 regulator-max-microvolt = <3300000>;
77 gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
82 compatible = "hdmi-connector";
86 ddc-en-gpios = <&gpa 25 GPIO_ACTIVE_HIGH>;
90 remote-endpoint = <&dw_hdmi_out>;
96 compatible = "gpio-ir-receiver";
97 gpios = <&gpe 3 GPIO_ACTIVE_LOW>;
100 wlan0_power: fixedregulator@1 {
101 compatible = "regulator-fixed";
103 regulator-name = "wlan0_power";
105 gpio = <&gpb 19 GPIO_ACTIVE_LOW>;
109 otg_power: fixedregulator@2 {
110 compatible = "regulator-fixed";
112 regulator-name = "otg_power";
113 regulator-min-microvolt = <5000000>;
114 regulator-max-microvolt = <5000000>;
116 gpio = <&gpf 15 GPIO_ACTIVE_LOW>;
122 clock-frequency = <48000000>;
127 * Use the 32.768 kHz oscillator as the parent of the RTC for a higher
130 assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>,
131 <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>,
132 <&cgu JZ4780_CLK_HDMI>;
133 assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>,
134 <&cgu JZ4780_CLK_MPLL>,
135 <&cgu JZ4780_CLK_SSIPLL>;
136 assigned-clock-rates = <48000000>, <0>, <54000000>, <0>, <27000000>;
141 * 750 kHz for the system timers and clocksource,
142 * use channel #0 and #1 for the per cpu system timers,
143 * and use channel #2 for the clocksource.
145 * 3000 kHz for the OST timer to provide a higher
146 * precision clocksource.
148 assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
149 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_OST>;
150 assigned-clock-rates = <750000>, <750000>, <750000>, <3000000>;
157 max-frequency = <50000000>;
159 pinctrl-names = "default";
160 pinctrl-0 = <&pins_mmc0>;
162 cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>;
169 max-frequency = <50000000>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&pins_mmc1>;
177 compatible = "brcm,bcm4330-fmac";
178 vcc-supply = <&wlan0_power>;
179 device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>;
180 shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>;
187 pinctrl-names = "default";
188 pinctrl-0 = <&pins_uart0>;
194 pinctrl-names = "default";
195 pinctrl-0 = <&pins_uart1>;
201 pinctrl-names = "default";
202 pinctrl-0 = <&pins_uart2>;
206 compatible = "brcm,bcm4330-bt";
207 reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>;
208 vcc-supply = <&wlan0_power>;
209 device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>;
210 host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>;
211 shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&pins_uart3>;
225 pinctrl-names = "default";
226 pinctrl-0 = <&pins_uart4>;
232 pinctrl-names = "default";
233 pinctrl-0 = <&pins_i2c0>;
235 clock-frequency = <400000>;
237 act8600: act8600@5a {
238 compatible = "active-semi,act8600";
244 regulator-name = "DCDC_REG1";
245 regulator-min-microvolt = <1100000>;
246 regulator-max-microvolt = <1100000>;
250 regulator-name = "DCDC_REG2";
251 regulator-min-microvolt = <1500000>;
252 regulator-max-microvolt = <1500000>;
256 regulator-name = "DCDC_REG3";
257 regulator-min-microvolt = <3300000>;
258 regulator-max-microvolt = <3300000>;
262 regulator-name = "SUDCDC_REG4";
263 regulator-min-microvolt = <5000000>;
264 regulator-max-microvolt = <5000000>;
268 regulator-name = "LDO_REG5";
269 regulator-min-microvolt = <2500000>;
270 regulator-max-microvolt = <2500000>;
274 regulator-name = "LDO_REG6";
275 regulator-min-microvolt = <2500000>;
276 regulator-max-microvolt = <2500000>;
280 regulator-name = "LDO_REG7";
281 regulator-min-microvolt = <2800000>;
282 regulator-max-microvolt = <2800000>;
286 regulator-name = "LDO_REG8";
287 regulator-min-microvolt = <1500000>;
288 regulator-max-microvolt = <1500000>;
292 regulator-name = "LDO_REG9";
293 /* Despite the datasheet stating 3.3V
294 * for REG9 and the driver expecting that,
296 * Likely the CI20 uses a proprietary
297 * factory programmed chip variant.
298 * Since this is a simple on/off LDO the
299 * exact values do not matter.
301 regulator-min-microvolt = <3300000>;
302 regulator-max-microvolt = <3300000>;
306 regulator-name = "LDO_REG10";
307 regulator-min-microvolt = <1200000>;
308 regulator-max-microvolt = <1200000>;
318 pinctrl-names = "default";
319 pinctrl-0 = <&pins_i2c1>;
326 pinctrl-names = "default";
327 pinctrl-0 = <&pins_i2c2>;
334 pinctrl-names = "default";
335 pinctrl-0 = <&pins_i2c3>;
342 pinctrl-names = "default";
343 pinctrl-0 = <&pins_i2c4>;
345 clock-frequency = <400000>;
348 compatible = "nxp,pcf8563";
351 interrupt-parent = <&gpf>;
352 interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
359 nandc: nand-controller@1 {
360 compatible = "ingenic,jz4780-nand";
361 reg = <1 0 0x1000000>;
363 #address-cells = <1>;
366 ingenic,bch-controller = <&bch>;
368 ingenic,nemc-tAS = <10>;
369 ingenic,nemc-tAH = <5>;
370 ingenic,nemc-tBP = <10>;
371 ingenic,nemc-tAW = <15>;
372 ingenic,nemc-tSTRV = <100>;
375 * Only CLE/ALE are needed for the devices that are connected, rather
376 * than the full address line set.
378 pinctrl-names = "default";
379 pinctrl-0 = <&pins_nemc>;
384 nand-ecc-step-size = <1024>;
385 nand-ecc-strength = <24>;
386 nand-ecc-mode = "hw";
389 pinctrl-names = "default";
390 pinctrl-0 = <&pins_nemc_cs1>;
393 compatible = "fixed-partitions";
394 #address-cells = <2>;
398 label = "u-boot-spl";
399 reg = <0x0 0x0 0x0 0x800000>;
404 reg = <0x0 0x800000 0x0 0x200000>;
408 label = "u-boot-env";
409 reg = <0x0 0xa00000 0x0 0x200000>;
414 reg = <0x0 0xc00000 0x0 0x4000000>;
419 reg = <0x0 0x4c00000 0x1 0xfb400000>;
426 compatible = "davicom,dm9000";
429 pinctrl-names = "default";
430 pinctrl-0 = <&pins_nemc_cs6>;
432 reg = <6 0 1 /* addr */
435 ingenic,nemc-tAS = <15>;
436 ingenic,nemc-tAH = <10>;
437 ingenic,nemc-tBP = <20>;
438 ingenic,nemc-tAW = <50>;
439 ingenic,nemc-tSTRV = <100>;
441 reset-gpios = <&gpf 12 GPIO_ACTIVE_LOW>;
442 vcc-supply = <ð0_power>;
444 interrupt-parent = <&gpe>;
447 nvmem-cells = <ð0_addr>;
448 nvmem-cell-names = "mac-address";
459 vcc-supply = <&otg_power>;
469 groups = "uart0-data";
475 groups = "uart1-data";
481 groups = "uart2-data", "uart2-hwflow";
487 groups = "uart3-data", "uart3-hwflow";
493 groups = "uart4-data";
499 groups = "i2c0-data";
505 groups = "i2c1-data";
511 groups = "i2c2-data";
517 groups = "i2c3-data";
523 groups = "i2c4-data-e";
527 pins_hdmi_ddc: hdmi_ddc {
528 function = "hdmi-ddc";
535 groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
539 pins_nemc_cs1: nemc-cs1 {
540 function = "nemc-cs1";
545 pins_nemc_cs6: nemc-cs6 {
546 function = "nemc-cs6";
553 groups = "mmc0-1bit-e", "mmc0-4bit-e";
559 groups = "mmc1-1bit-d", "mmc1-4bit-d";
567 pinctrl-names = "default";
568 pinctrl-0 = <&pins_hdmi_ddc>;
571 #address-cells = <1>;
576 dw_hdmi_in: endpoint {
577 remote-endpoint = <&lcd_out>;
583 dw_hdmi_out: endpoint {
584 remote-endpoint = <&hdmi_con>;
595 remote-endpoint = <&dw_hdmi_in>;