arch/mips/boot/dts/ingenic/ci20.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3
   4 #include "jz4780.dtsi"
   5 #include <dt-bindings/clock/ingenic,tcu.h>
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/input/input.h>
   8 #include <dt-bindings/interrupt-controller/irq.h>
   9 #include <dt-bindings/regulator/active-semi,8865-regulator.h>
  10
  11 / {
  12         compatible = "img,ci20", "ingenic,jz4780";
  13
  14         aliases {
  15                 serial0 = &uart0;
  16                 serial1 = &uart1;
  17                 serial3 = &uart3;
  18                 serial4 = &uart4;
  19         };
  20
  21         chosen {
  22                 stdout-path = &uart4;
  23         };
  24
  25         memory {
  26                 device_type = "memory";
  27                 reg = <0x0 0x10000000
  28                        0x30000000 0x30000000>;
  29         };
  30
  31         gpio-keys {
  32                 compatible = "gpio-keys";
  33
  34                 switch {
  35                         label = "ci20:sw1";
  36                         linux,code = <KEY_F13>;
  37                         gpios = <&gpd 17 GPIO_ACTIVE_HIGH>;
  38                         wakeup-source;
  39                 };
  40         };
  41
  42         leds {
  43                 compatible = "gpio-leds";
  44
  45                 led-0 {
  46                         label = "ci20:red:led0";
  47                         gpios = <&gpc 3 GPIO_ACTIVE_HIGH>;
  48                         linux,default-trigger = "none";
  49                 };
  50
  51                 led-1 {
  52                         label = "ci20:red:led1";
  53                         gpios = <&gpc 2 GPIO_ACTIVE_HIGH>;
  54                         linux,default-trigger = "nand-disk";
  55                 };
  56
  57                 led-2 {
  58                         label = "ci20:red:led2";
  59                         gpios = <&gpc 1 GPIO_ACTIVE_HIGH>;
  60                         linux,default-trigger = "cpu1";
  61                 };
  62
  63                 led-3 {
  64                         label = "ci20:red:led3";
  65                         gpios = <&gpc 0 GPIO_ACTIVE_HIGH>;
  66                         linux,default-trigger = "cpu0";
  67                 };
  68         };
  69
  70         eth0_power: fixedregulator-0 {
  71                 compatible = "regulator-fixed";
  72
  73                 regulator-name = "eth0_power";
  74                 regulator-min-microvolt = <3300000>;
  75                 regulator-max-microvolt = <3300000>;
  76
  77                 gpio = <&gpb 25 0>;
  78                 enable-active-high;
  79         };
  80
  81         hdmi_out: connector {
  82                 compatible = "hdmi-connector";
  83                 label = "HDMI OUT";
  84                 type = "a";
  85
  86                 ddc-en-gpios = <&gpa 25 GPIO_ACTIVE_HIGH>;
  87
  88                 port {
  89                         hdmi_con: endpoint {
  90                                 remote-endpoint = <&dw_hdmi_out>;
  91                         };
  92                 };
  93         };
  94
  95         ir: ir {
  96                 compatible = "gpio-ir-receiver";
  97                 gpios = <&gpe 3 GPIO_ACTIVE_LOW>;
  98         };
  99
 100         bt_power: fixedregulator-1 {
 101                 compatible = "regulator-fixed";
 102
 103                 regulator-name = "bt_power";
 104                 regulator-min-microvolt = <3300000>;
 105                 regulator-max-microvolt = <3300000>;
 106                 regulator-settling-time-us = <1400>;
 107
 108                 vin-supply = <&vcc_50>;
 109
 110                 gpio = <&gpb 19 0>;
 111                 enable-active-high;
 112         };
 113
 114         otg_power: fixedregulator-2 {
 115                 compatible = "regulator-fixed";
 116
 117                 regulator-name = "otg_power";
 118                 regulator-min-microvolt = <5000000>;
 119                 regulator-max-microvolt = <5000000>;
 120
 121                 gpio = <&gpf 15 0>;
 122                 enable-active-high;
 123         };
 124
 125         wifi_power: fixedregulator-4 {
 126                 compatible = "regulator-fixed";
 127
 128                 regulator-name = "wifi_power";
 129
 130                 /*
 131                  * Technically it's 5V, the WiFi chip has its own internal
 132                  * regulators; but the MMC/SD subsystem won't accept such a
 133                  * value.
 134                  */
 135                 regulator-min-microvolt = <3300000>;
 136                 regulator-max-microvolt = <3300000>;
 137                 regulator-settling-time-us = <150000>;
 138
 139                 vin-supply = <&bt_power>;
 140         };
 141
 142         vcc_33v: fixedregulator-5 {
 143                 compatible = "regulator-fixed";
 144
 145                 regulator-name = "vcc_33v";
 146                 regulator-min-microvolt = <3300000>;
 147                 regulator-max-microvolt = <3300000>;
 148                 regulator-always-on;
 149         };
 150
 151         wifi_pwrseq: pwrseq {
 152                 compatible = "mmc-pwrseq-simple";
 153                 reset-gpios = <&gpf 7 GPIO_ACTIVE_LOW>;
 154
 155                 clocks = <&rtc_dev>;
 156                 clock-names = "ext_clock";
 157         };
 158 };
 159
 160 &ext {
 161         clock-frequency = <48000000>;
 162 };
 163
 164 &cgu {
 165         /*
 166          * Use the 32.768 kHz oscillator as the parent of the RTC for a higher
 167          * precision.
 168          */
 169         assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>,
 170                           <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>,
 171                           <&cgu JZ4780_CLK_HDMI>, <&cgu JZ4780_CLK_MSCMUX>;
 172         assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>,
 173                                  <&cgu JZ4780_CLK_MPLL>,
 174                                  <&cgu JZ4780_CLK_SSIPLL>,
 175                                  <0>, <&cgu JZ4780_CLK_MPLL>;
 176         assigned-clock-rates = <48000000>, <0>, <54000000>, <0>, <27000000>;
 177 };
 178
 179 &tcu {
 180         /*
 181          * 750 kHz for the system timers and clocksource,
 182          * use channel #0 and #1 for the per cpu system timers,
 183          * and use channel #2 for the clocksource.
 184          *
 185          * 3000 kHz for the OST timer to provide a higher
 186          * precision clocksource.
 187          */
 188         assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
 189                                           <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_OST>;
 190         assigned-clock-rates = <750000>, <750000>, <750000>, <3000000>;
 191 };
 192
 193 &mmc0 {
 194         status = "okay";
 195
 196         bus-width = <4>;
 197         max-frequency = <50000000>;
 198
 199         pinctrl-names = "default";
 200         pinctrl-0 = <&pins_mmc0>;
 201
 202         cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>;
 203         vmmc-supply = <&vcc_33v>;
 204         vqmmc-supply = <&vcc_33v>;
 205 };
 206
 207 &mmc1 {
 208         status = "okay";
 209
 210         bus-width = <4>;
 211         max-frequency = <25000000>;
 212         mmc-pwrseq = <&wifi_pwrseq>;
 213         vmmc-supply = <&wifi_power>;
 214         vqmmc-supply = <&wifi_io>;
 215         non-removable;
 216
 217         pinctrl-names = "default";
 218         pinctrl-0 = <&pins_mmc1>;
 219
 220         #address-cells = <1>;
 221         #size-cells = <0>;
 222
 223         wifi@1 {
 224                 compatible = "brcm,bcm4329-fmac";
 225                 reg = <1>;
 226
 227                 interrupt-parent = <&gpd>;
 228                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
 229                 interrupt-names = "host-wake";
 230         };
 231 };
 232
 233 &uart0 {
 234         status = "okay";
 235
 236         pinctrl-names = "default";
 237         pinctrl-0 = <&pins_uart0>;
 238 };
 239
 240 &uart1 {
 241         status = "okay";
 242
 243         pinctrl-names = "default";
 244         pinctrl-0 = <&pins_uart1>;
 245 };
 246
 247 &uart2 {
 248         status = "okay";
 249
 250         pinctrl-names = "default";
 251         pinctrl-0 = <&pins_uart2>;
 252         uart-has-rtscts;
 253
 254         bluetooth {
 255                 compatible = "brcm,bcm4330-bt";
 256
 257                 vbat-supply = <&bt_power>;
 258                 vddio-supply = <&wifi_io>;
 259
 260                 interrupt-parent = <&gpf>;
 261                 interrupts = <6 IRQ_TYPE_EDGE_RISING>;
 262                 interrupt-names = "host-wakeup";
 263
 264                 clocks = <&rtc_dev>;
 265                 clock-names = "lpo";
 266
 267                 reset-gpios = <&gpf 8 GPIO_ACTIVE_LOW>;
 268                 device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>;
 269                 shutdown-gpios = <&gpf 4 GPIO_ACTIVE_HIGH>;
 270         };
 271 };
 272
 273 &uart3 {
 274         status = "okay";
 275
 276         pinctrl-names = "default";
 277         pinctrl-0 = <&pins_uart3>;
 278 };
 279
 280 &uart4 {
 281         status = "okay";
 282
 283         pinctrl-names = "default";
 284         pinctrl-0 = <&pins_uart4>;
 285 };
 286
 287 &i2c0 {
 288         status = "okay";
 289
 290         pinctrl-names = "default";
 291         pinctrl-0 = <&pins_i2c0>;
 292
 293         clock-frequency = <400000>;
 294
 295         act8600: act8600@5a {
 296                 compatible = "active-semi,act8600";
 297                 reg = <0x5a>;
 298
 299                 regulators {
 300                         vddcore: DCDC1 {
 301                                 regulator-min-microvolt = <1125000>;
 302                                 regulator-max-microvolt = <1125000>;
 303                                 vp1-supply = <&vcc_33v>;
 304                                 regulator-always-on;
 305                         };
 306                         vddmem: DCDC2 {
 307                                 regulator-min-microvolt = <1500000>;
 308                                 regulator-max-microvolt = <1500000>;
 309                                 vp2-supply = <&vcc_33v>;
 310                                 regulator-always-on;
 311                         };
 312                         vcc_33: DCDC3 {
 313                                 regulator-min-microvolt = <3300000>;
 314                                 regulator-max-microvolt = <3300000>;
 315                                 vp3-supply = <&vcc_33v>;
 316                                 regulator-always-on;
 317                         };
 318                         vcc_50: SUDCDC_REG4 {
 319                                 regulator-min-microvolt = <5000000>;
 320                                 regulator-max-microvolt = <5000000>;
 321                                 regulator-always-on;
 322                         };
 323                         vcc_25: LDO5 {
 324                                 regulator-min-microvolt = <2500000>;
 325                                 regulator-max-microvolt = <2500000>;
 326                                 inl-supply = <&vcc_33v>;
 327                                 regulator-always-on;
 328                         };
 329                         wifi_io: LDO6 {
 330                                 regulator-min-microvolt = <1800000>;
 331                                 regulator-max-microvolt = <1800000>;
 332                                 regulator-settling-time-us = <150000>;
 333                                 inl-supply = <&vcc_33v>;
 334                         };
 335                         cim_io_28: LDO7 {
 336                                 regulator-min-microvolt = <2800000>;
 337                                 regulator-max-microvolt = <2800000>;
 338                                 inl-supply = <&vcc_33v>;
 339                         };
 340                         cim_io_15: LDO8 {
 341                                 regulator-min-microvolt = <1500000>;
 342                                 regulator-max-microvolt = <1500000>;
 343                                 inl-supply = <&vcc_33v>;
 344                         };
 345                         vrtc_18: LDO_REG9 {
 346                                 /* Despite the datasheet stating 3.3V
 347                                  * for REG9 and the driver expecting that,
 348                                  * REG9 outputs 1.8V.
 349                                  * Likely the CI20 uses a proprietary
 350                                  * factory programmed chip variant.
 351                                  * Since this is a simple on/off LDO the
 352                                  * exact values do not matter.
 353                                  */
 354                                 regulator-min-microvolt = <3300000>;
 355                                 regulator-max-microvolt = <3300000>;
 356                                 regulator-always-on;
 357                         };
 358                         vcc_11: LDO_REG10 {
 359                                 regulator-min-microvolt = <1200000>;
 360                                 regulator-max-microvolt = <1200000>;
 361                                 regulator-always-on;
 362                         };
 363                 };
 364         };
 365 };
 366
 367 &i2c1 {
 368         status = "okay";
 369
 370         pinctrl-names = "default";
 371         pinctrl-0 = <&pins_i2c1>;
 372
 373 };
 374
 375 &i2c2 {
 376         status = "okay";
 377
 378         pinctrl-names = "default";
 379         pinctrl-0 = <&pins_i2c2>;
 380
 381 };
 382
 383 &i2c3 {
 384         status = "okay";
 385
 386         pinctrl-names = "default";
 387         pinctrl-0 = <&pins_i2c3>;
 388
 389 };
 390
 391 &i2c4 {
 392         status = "okay";
 393
 394         pinctrl-names = "default";
 395         pinctrl-0 = <&pins_i2c4>;
 396
 397         clock-frequency = <400000>;
 398
 399                 rtc@51 {
 400                         compatible = "nxp,pcf8563";
 401                         reg = <0x51>;
 402
 403                         interrupt-parent = <&gpf>;
 404                         interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
 405                 };
 406 };
 407
 408 &nemc {
 409         status = "okay";
 410
 411         nandc: nand-controller@1 {
 412                 compatible = "ingenic,jz4780-nand";
 413                 reg = <1 0 0x1000000>;
 414
 415                 #address-cells = <1>;
 416                 #size-cells = <0>;
 417
 418                 ecc-engine = <&bch>;
 419
 420                 ingenic,nemc-tAS = <10>;
 421                 ingenic,nemc-tAH = <5>;
 422                 ingenic,nemc-tBP = <10>;
 423                 ingenic,nemc-tAW = <15>;
 424                 ingenic,nemc-tSTRV = <100>;
 425
 426                 /*
 427                  * Only CLE/ALE are needed for the devices that are connected, rather
 428                  * than the full address line set.
 429                  */
 430                 pinctrl-names = "default";
 431                 pinctrl-0 = <&pins_nemc>;
 432
 433                 nand@1 {
 434                         reg = <1>;
 435
 436                         nand-ecc-step-size = <1024>;
 437                         nand-ecc-strength = <24>;
 438                         nand-ecc-mode = "hw";
 439                         nand-on-flash-bbt;
 440
 441                         pinctrl-names = "default";
 442                         pinctrl-0 = <&pins_nemc_cs1>;
 443
 444                         partitions {
 445                                 compatible = "fixed-partitions";
 446                                 #address-cells = <2>;
 447                                 #size-cells = <2>;
 448
 449                                 partition@0 {
 450                                         label = "u-boot-spl";
 451                                         reg = <0x0 0x0 0x0 0x800000>;
 452                                 };
 453
 454                                 partition@800000 {
 455                                         label = "u-boot";
 456                                         reg = <0x0 0x800000 0x0 0x200000>;
 457                                 };
 458
 459                                 partition@a00000 {
 460                                         label = "u-boot-env";
 461                                         reg = <0x0 0xa00000 0x0 0x200000>;
 462                                 };
 463
 464                                 partition@c00000 {
 465                                         label = "boot";
 466                                         reg = <0x0 0xc00000 0x0 0x4000000>;
 467                                 };
 468
 469                                 partition@4c00000 {
 470                                         label = "system";
 471                                         reg = <0x0 0x4c00000 0x1 0xfb400000>;
 472                                 };
 473                         };
 474                 };
 475         };
 476
 477         dm9000@6 {
 478                 compatible = "davicom,dm9000";
 479                 davicom,no-eeprom;
 480
 481                 pinctrl-names = "default";
 482                 pinctrl-0 = <&pins_nemc_cs6>;
 483
 484                 reg = <6 0 1>, /* addr */
 485                       <6 2 1>; /* data */
 486
 487                 ingenic,nemc-tAS = <15>;
 488                 ingenic,nemc-tAH = <10>;
 489                 ingenic,nemc-tBP = <20>;
 490                 ingenic,nemc-tAW = <50>;
 491                 ingenic,nemc-tSTRV = <100>;
 492
 493                 reset-gpios = <&gpf 12 GPIO_ACTIVE_LOW>;
 494                 vcc-supply = <&eth0_power>;
 495
 496                 interrupt-parent = <&gpe>;
 497                 interrupts = <19 IRQ_TYPE_EDGE_RISING>;
 498
 499                 nvmem-cells = <&eth0_addr>;
 500                 nvmem-cell-names = "mac-address";
 501         };
 502 };
 503
 504 &bch {
 505         status = "okay";
 506 };
 507
 508 &otg_phy {
 509         status = "okay";
 510
 511         vcc-supply = <&otg_power>;
 512 };
 513
 514 &otg {
 515         status = "okay";
 516 };
 517
 518 &pinctrl {
 519         pins_uart0: uart0 {
 520                 function = "uart0";
 521                 groups = "uart0-data";
 522                 bias-disable;
 523         };
 524
 525         pins_uart1: uart1 {
 526                 function = "uart1";
 527                 groups = "uart1-data";
 528                 bias-disable;
 529         };
 530
 531         pins_uart2: uart2 {
 532                 function = "uart2";
 533                 groups = "uart2-data", "uart2-hwflow";
 534                 bias-disable;
 535         };
 536
 537         pins_uart3: uart3 {
 538                 function = "uart3";
 539                 groups = "uart3-data", "uart3-hwflow";
 540                 bias-disable;
 541         };
 542
 543         pins_uart4: uart4 {
 544                 function = "uart4";
 545                 groups = "uart4-data";
 546                 bias-disable;
 547         };
 548
 549         pins_i2c0: i2c0 {
 550                 function = "i2c0";
 551                 groups = "i2c0-data";
 552                 bias-disable;
 553         };
 554
 555         pins_i2c1: i2c1 {
 556                 function = "i2c1";
 557                 groups = "i2c1-data";
 558                 bias-disable;
 559         };
 560
 561         pins_i2c2: i2c2 {
 562                 function = "i2c2";
 563                 groups = "i2c2-data";
 564                 bias-disable;
 565         };
 566
 567         pins_i2c3: i2c3 {
 568                 function = "i2c3";
 569                 groups = "i2c3-data";
 570                 bias-disable;
 571         };
 572
 573         pins_i2c4: i2c4 {
 574                 function = "i2c4";
 575                 groups = "i2c4-data-e";
 576                 bias-disable;
 577         };
 578
 579         pins_hdmi_ddc: hdmi_ddc {
 580                 function = "hdmi-ddc";
 581                 groups = "hdmi-ddc";
 582                 bias-disable;
 583         };
 584
 585         pins_nemc: nemc {
 586                 function = "nemc";
 587                 groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
 588                 bias-disable;
 589         };
 590
 591         pins_nemc_cs1: nemc-cs1 {
 592                 function = "nemc-cs1";
 593                 groups = "nemc-cs1";
 594                 bias-disable;
 595         };
 596
 597         pins_nemc_cs6: nemc-cs6 {
 598                 function = "nemc-cs6";
 599                 groups = "nemc-cs6";
 600                 bias-disable;
 601         };
 602
 603         pins_mmc0: mmc0 {
 604                 function = "mmc0";
 605                 groups = "mmc0-1bit-e", "mmc0-4bit-e";
 606                 bias-disable;
 607         };
 608
 609         pins_mmc1: mmc1 {
 610                 function = "mmc1";
 611                 groups = "mmc1-1bit-d", "mmc1-4bit-d";
 612                 bias-disable;
 613         };
 614 };
 615
 616 &hdmi {
 617         status = "okay";
 618
 619         pinctrl-names = "default";
 620         pinctrl-0 = <&pins_hdmi_ddc>;
 621
 622         ports {
 623                 #address-cells = <1>;
 624                 #size-cells = <0>;
 625
 626                 port@0 {
 627                         reg = <0>;
 628                         dw_hdmi_in: endpoint {
 629                                 remote-endpoint = <&lcd_out>;
 630                         };
 631                 };
 632
 633                 port@1 {
 634                         reg = <1>;
 635                         dw_hdmi_out: endpoint {
 636                                 remote-endpoint = <&hdmi_con>;
 637                         };
 638                 };
 639         };
 640 };
 641
 642 &lcdc0 {
 643         status = "okay";
 644
 645         port {
 646                 lcd_out: endpoint {
 647                         remote-endpoint = <&dw_hdmi_in>;
 648                 };
 649         };
 650 };