arch/mips/boot/dts/brcm/bcm7435.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 / {
   3         #address-cells = <1>;
   4         #size-cells = <1>;
   5         compatible = "brcm,bcm7435";
   6
   7         cpus {
   8                 #address-cells = <1>;
   9                 #size-cells = <0>;
  10
  11                 mips-hpt-frequency = <175625000>;
  12
  13                 cpu@0 {
  14                         compatible = "brcm,bmips5200";
  15                         device_type = "cpu";
  16                         reg = <0>;
  17                 };
  18
  19                 cpu@1 {
  20                         compatible = "brcm,bmips5200";
  21                         device_type = "cpu";
  22                         reg = <1>;
  23                 };
  24
  25                 cpu@2 {
  26                         compatible = "brcm,bmips5200";
  27                         device_type = "cpu";
  28                         reg = <2>;
  29                 };
  30
  31                 cpu@3 {
  32                         compatible = "brcm,bmips5200";
  33                         device_type = "cpu";
  34                         reg = <3>;
  35                 };
  36         };
  37
  38         aliases {
  39                 uart0 = &uart0;
  40         };
  41
  42         cpu_intc: interrupt-controller {
  43                 #address-cells = <0>;
  44                 compatible = "mti,cpu-interrupt-controller";
  45
  46                 interrupt-controller;
  47                 #interrupt-cells = <1>;
  48         };
  49
  50         clocks {
  51                 uart_clk: uart_clk {
  52                         compatible = "fixed-clock";
  53                         #clock-cells = <0>;
  54                         clock-frequency = <81000000>;
  55                 };
  56
  57                 upg_clk: upg_clk {
  58                         compatible = "fixed-clock";
  59                         #clock-cells = <0>;
  60                         clock-frequency = <27000000>;
  61                 };
  62         };
  63
  64         rdb {
  65                 #address-cells = <1>;
  66                 #size-cells = <1>;
  67
  68                 compatible = "simple-bus";
  69                 ranges = <0 0x10000000 0x01000000>;
  70
  71                 periph_intc: interrupt-controller@41b500 {
  72                         compatible = "brcm,bcm7038-l1-intc";
  73                         reg = <0x41b500 0x40>, <0x41b600 0x40>,
  74                                 <0x41b700 0x40>, <0x41b800 0x40>;
  75
  76                         interrupt-controller;
  77                         #interrupt-cells = <1>;
  78
  79                         interrupt-parent = <&cpu_intc>;
  80                         interrupts = <2>, <3>, <2>, <3>;
  81                 };
  82
  83                 sun_l2_intc: interrupt-controller@403000 {
  84                         compatible = "brcm,l2-intc";
  85                         reg = <0x403000 0x30>;
  86                         interrupt-controller;
  87                         #interrupt-cells = <1>;
  88                         interrupt-parent = <&periph_intc>;
  89                         interrupts = <52>;
  90                 };
  91
  92                 gisb-arb@400000 {
  93                         compatible = "brcm,bcm7435-gisb-arb";
  94                         reg = <0x400000 0xdc>;
  95                         native-endian;
  96                         interrupt-parent = <&sun_l2_intc>;
  97                         interrupts = <0>, <2>;
  98                         brcm,gisb-arb-master-mask = <0xf77f>;
  99                         brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "webcpu_0",
 100                                                      "pcie_0", "bsp_0",
 101                                                      "rdc_0", "raaga_0",
 102                                                      "avd_1", "jtag_0",
 103                                                      "svd_0", "vice_0",
 104                                                      "vice_1", "raaga_1",
 105                                                      "scpu";
 106                 };
 107
 108                 upg_irq0_intc: interrupt-controller@406780 {
 109                         compatible = "brcm,bcm7120-l2-intc";
 110                         reg = <0x406780 0x8>;
 111
 112                         brcm,int-map-mask = <0x44>, <0x7000000>;
 113                         brcm,int-fwd-mask = <0x70000>;
 114
 115                         interrupt-controller;
 116                         #interrupt-cells = <1>;
 117
 118                         interrupt-parent = <&periph_intc>;
 119                         interrupts = <60>, <58>;
 120                         interrupt-names = "upg_main", "upg_bsc";
 121                 };
 122
 123                 upg_aon_irq0_intc: interrupt-controller@409480 {
 124                         compatible = "brcm,bcm7120-l2-intc";
 125                         reg = <0x409480 0x8>;
 126
 127                         brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
 128                         brcm,int-fwd-mask = <0>;
 129                         brcm,irq-can-wake;
 130
 131                         interrupt-controller;
 132                         #interrupt-cells = <1>;
 133
 134                         interrupt-parent = <&periph_intc>;
 135                         interrupts = <61>, <59>, <64>;
 136                         interrupt-names = "upg_main_aon", "upg_bsc_aon",
 137                                           "upg_spi";
 138                 };
 139
 140                 sun_top_ctrl: syscon@404000 {
 141                         compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
 142                         reg = <0x404000 0x51c>;
 143                         native-endian;
 144                 };
 145
 146                 reboot {
 147                         compatible = "brcm,brcmstb-reboot";
 148                         syscon = <&sun_top_ctrl 0x304 0x308>;
 149                 };
 150
 151                 uart0: serial@406b00 {
 152                         compatible = "ns16550a";
 153                         reg = <0x406b00 0x20>;
 154                         reg-io-width = <0x4>;
 155                         reg-shift = <0x2>;
 156                         interrupt-parent = <&periph_intc>;
 157                         interrupts = <66>;
 158                         clocks = <&uart_clk>;
 159                         status = "disabled";
 160                 };
 161
 162                 uart1: serial@406b40 {
 163                         compatible = "ns16550a";
 164                         reg = <0x406b40 0x20>;
 165                         reg-io-width = <0x4>;
 166                         reg-shift = <0x2>;
 167                         interrupt-parent = <&periph_intc>;
 168                         interrupts = <67>;
 169                         clocks = <&uart_clk>;
 170                         status = "disabled";
 171                 };
 172
 173                 uart2: serial@406b80 {
 174                         compatible = "ns16550a";
 175                         reg = <0x406b80 0x20>;
 176                         reg-io-width = <0x4>;
 177                         reg-shift = <0x2>;
 178                         interrupt-parent = <&periph_intc>;
 179                         interrupts = <68>;
 180                         clocks = <&uart_clk>;
 181                         status = "disabled";
 182                 };
 183
 184                 bsca: i2c@406300 {
 185                       clock-frequency = <390000>;
 186                       compatible = "brcm,brcmstb-i2c";
 187                       interrupt-parent = <&upg_irq0_intc>;
 188                       reg = <0x406300 0x58>;
 189                       interrupts = <26>;
 190                       interrupt-names = "upg_bsca";
 191                       status = "disabled";
 192                 };
 193
 194                 bscb: i2c@409400 {
 195                       clock-frequency = <390000>;
 196                       compatible = "brcm,brcmstb-i2c";
 197                       interrupt-parent = <&upg_aon_irq0_intc>;
 198                       reg = <0x409400 0x58>;
 199                       interrupts = <28>;
 200                       interrupt-names = "upg_bscb";
 201                       status = "disabled";
 202                 };
 203
 204                 bscc: i2c@406200 {
 205                       clock-frequency = <390000>;
 206                       compatible = "brcm,brcmstb-i2c";
 207                       interrupt-parent = <&upg_irq0_intc>;
 208                       reg = <0x406200 0x58>;
 209                       interrupts = <24>;
 210                       interrupt-names = "upg_bscc";
 211                       status = "disabled";
 212                 };
 213
 214                 bscd: i2c@406280 {
 215                       clock-frequency = <390000>;
 216                       compatible = "brcm,brcmstb-i2c";
 217                       interrupt-parent = <&upg_irq0_intc>;
 218                       reg = <0x406280 0x58>;
 219                       interrupts = <25>;
 220                       interrupt-names = "upg_bscd";
 221                       status = "disabled";
 222                 };
 223
 224                 bsce: i2c@409180 {
 225                       clock-frequency = <390000>;
 226                       compatible = "brcm,brcmstb-i2c";
 227                       interrupt-parent = <&upg_aon_irq0_intc>;
 228                       reg = <0x409180 0x58>;
 229                       interrupts = <27>;
 230                       interrupt-names = "upg_bsce";
 231                       status = "disabled";
 232                 };
 233
 234                 pwma: pwm@406580 {
 235                         compatible = "brcm,bcm7038-pwm";
 236                         reg = <0x406580 0x28>;
 237                         #pwm-cells = <2>;
 238                         clocks = <&upg_clk>;
 239                         status = "disabled";
 240                 };
 241
 242                 pwmb: pwm@406800 {
 243                         compatible = "brcm,bcm7038-pwm";
 244                         reg = <0x406800 0x28>;
 245                         #pwm-cells = <2>;
 246                         clocks = <&upg_clk>;
 247                         status = "disabled";
 248                 };
 249
 250                 aon_pm_l2_intc: interrupt-controller@408440 {
 251                         compatible = "brcm,l2-intc";
 252                         reg = <0x408440 0x30>;
 253                         interrupt-controller;
 254                         #interrupt-cells = <1>;
 255                         interrupt-parent = <&periph_intc>;
 256                         interrupts = <54>;
 257                         brcm,irq-can-wake;
 258                 };
 259
 260                 upg_gio: gpio@406700 {
 261                         compatible = "brcm,brcmstb-gpio";
 262                         reg = <0x406700 0x80>;
 263                         #gpio-cells = <2>;
 264                         #interrupt-cells = <2>;
 265                         gpio-controller;
 266                         interrupt-controller;
 267                         interrupt-parent = <&upg_irq0_intc>;
 268                         interrupts = <6>;
 269                         brcm,gpio-bank-widths = <32 32 32 21>;
 270                 };
 271
 272                 upg_gio_aon: gpio@4094c0 {
 273                         compatible = "brcm,brcmstb-gpio";
 274                         reg = <0x4094c0 0x40>;
 275                         #gpio-cells = <2>;
 276                         #interrupt-cells = <2>;
 277                         gpio-controller;
 278                         interrupt-controller;
 279                         interrupt-parent = <&upg_aon_irq0_intc>;
 280                         interrupts = <6>;
 281                         interrupts-extended = <&upg_aon_irq0_intc 6>,
 282                                               <&aon_pm_l2_intc 5>;
 283                         wakeup-source;
 284                         brcm,gpio-bank-widths = <18 4>;
 285                 };
 286
 287                 enet0: ethernet@b80000 {
 288                         phy-mode = "internal";
 289                         phy-handle = <&phy1>;
 290                         mac-address = [ 00 10 18 36 23 1a ];
 291                         compatible = "brcm,genet-v3";
 292                         #address-cells = <0x1>;
 293                         #size-cells = <0x1>;
 294                         reg = <0xb80000 0x11c88>;
 295                         interrupts = <17>, <18>;
 296                         interrupt-parent = <&periph_intc>;
 297                         status = "disabled";
 298
 299                         mdio@e14 {
 300                                 compatible = "brcm,genet-mdio-v3";
 301                                 #address-cells = <0x1>;
 302                                 #size-cells = <0x0>;
 303                                 reg = <0xe14 0x8>;
 304
 305                                 phy1: ethernet-phy@1 {
 306                                         max-speed = <100>;
 307                                         reg = <0x1>;
 308                                         compatible = "brcm,40nm-ephy",
 309                                                 "ethernet-phy-ieee802.3-c22";
 310                                 };
 311                         };
 312                 };
 313
 314                 ehci0: usb@480300 {
 315                         compatible = "brcm,bcm7435-ehci", "generic-ehci";
 316                         reg = <0x480300 0x100>;
 317                         native-endian;
 318                         interrupt-parent = <&periph_intc>;
 319                         interrupts = <70>;
 320                         status = "disabled";
 321                 };
 322
 323                 ohci0: usb@480400 {
 324                         compatible = "brcm,bcm7435-ohci", "generic-ohci";
 325                         reg = <0x480400 0x100>;
 326                         native-endian;
 327                         no-big-frame-no;
 328                         interrupt-parent = <&periph_intc>;
 329                         interrupts = <72>;
 330                         status = "disabled";
 331                 };
 332
 333                 ehci1: usb@480500 {
 334                         compatible = "brcm,bcm7435-ehci", "generic-ehci";
 335                         reg = <0x480500 0x100>;
 336                         native-endian;
 337                         interrupt-parent = <&periph_intc>;
 338                         interrupts = <71>;
 339                         status = "disabled";
 340                 };
 341
 342                 ohci1: usb@480600 {
 343                         compatible = "brcm,bcm7435-ohci", "generic-ohci";
 344                         reg = <0x480600 0x100>;
 345                         native-endian;
 346                         no-big-frame-no;
 347                         interrupt-parent = <&periph_intc>;
 348                         interrupts = <73>;
 349                         status = "disabled";
 350                 };
 351
 352                 ehci2: usb@490300 {
 353                         compatible = "brcm,bcm7435-ehci", "generic-ehci";
 354                         reg = <0x490300 0x100>;
 355                         native-endian;
 356                         interrupt-parent = <&periph_intc>;
 357                         interrupts = <75>;
 358                         status = "disabled";
 359                 };
 360
 361                 ohci2: usb@490400 {
 362                         compatible = "brcm,bcm7435-ohci", "generic-ohci";
 363                         reg = <0x490400 0x100>;
 364                         native-endian;
 365                         no-big-frame-no;
 366                         interrupt-parent = <&periph_intc>;
 367                         interrupts = <77>;
 368                         status = "disabled";
 369                 };
 370
 371                 ehci3: usb@490500 {
 372                         compatible = "brcm,bcm7435-ehci", "generic-ehci";
 373                         reg = <0x490500 0x100>;
 374                         native-endian;
 375                         interrupt-parent = <&periph_intc>;
 376                         interrupts = <76>;
 377                         status = "disabled";
 378                 };
 379
 380                 ohci3: usb@490600 {
 381                         compatible = "brcm,bcm7435-ohci", "generic-ohci";
 382                         reg = <0x490600 0x100>;
 383                         native-endian;
 384                         no-big-frame-no;
 385                         interrupt-parent = <&periph_intc>;
 386                         interrupts = <78>;
 387                         status = "disabled";
 388                 };
 389
 390                 hif_l2_intc: interrupt-controller@41b000 {
 391                         compatible = "brcm,l2-intc";
 392                         reg = <0x41b000 0x30>;
 393                         interrupt-controller;
 394                         #interrupt-cells = <1>;
 395                         interrupt-parent = <&periph_intc>;
 396                         interrupts = <24>;
 397                 };
 398
 399                 nand: nand@41c800 {
 400                         compatible = "brcm,brcmnand-v6.2", "brcm,brcmnand";
 401                         #address-cells = <1>;
 402                         #size-cells = <0>;
 403                         reg-names = "nand", "flash-dma";
 404                         reg = <0x41c800 0x600>, <0x41d000 0x100>;
 405                         interrupt-parent = <&hif_l2_intc>;
 406                         interrupts = <24>, <4>;
 407                         status = "disabled";
 408                 };
 409
 410                 sata: sata@181000 {
 411                         compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
 412                         reg-names = "ahci", "top-ctrl";
 413                         reg = <0x181000 0xa9c>, <0x180020 0x1c>;
 414                         interrupt-parent = <&periph_intc>;
 415                         interrupts = <45>;
 416                         #address-cells = <1>;
 417                         #size-cells = <0>;
 418                         status = "disabled";
 419
 420                         sata0: sata-port@0 {
 421                                 reg = <0>;
 422                                 phys = <&sata_phy0>;
 423                         };
 424
 425                         sata1: sata-port@1 {
 426                                 reg = <1>;
 427                                 phys = <&sata_phy1>;
 428                         };
 429                 };
 430
 431                 sata_phy: sata-phy@180100 {
 432                         compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
 433                         reg = <0x180100 0x0eff>;
 434                         reg-names = "phy";
 435                         #address-cells = <1>;
 436                         #size-cells = <0>;
 437                         status = "disabled";
 438
 439                         sata_phy0: sata-phy@0 {
 440                                 reg = <0>;
 441                                 #phy-cells = <0>;
 442                         };
 443
 444                         sata_phy1: sata-phy@1 {
 445                                 reg = <1>;
 446                                 #phy-cells = <0>;
 447                         };
 448                 };
 449
 450                 sdhci0: sdhci@41a000 {
 451                         compatible = "brcm,bcm7425-sdhci";
 452                         reg = <0x41a000 0x100>;
 453                         interrupt-parent = <&periph_intc>;
 454                         interrupts = <47>;
 455                         sd-uhs-sdr50;
 456                         mmc-hs200-1_8v;
 457                         status = "disabled";
 458                 };
 459
 460                 sdhci1: sdhci@41a200 {
 461                         compatible = "brcm,bcm7425-sdhci";
 462                         reg = <0x41a200 0x100>;
 463                         interrupt-parent = <&periph_intc>;
 464                         interrupts = <48>;
 465                         sd-uhs-sdr50;
 466                         mmc-hs200-1_8v;
 467                         status = "disabled";
 468                 };
 469
 470                 spi_l2_intc: interrupt-controller@41bd00 {
 471                         compatible = "brcm,l2-intc";
 472                         reg = <0x41bd00 0x30>;
 473                         interrupt-controller;
 474                         #interrupt-cells = <1>;
 475                         interrupt-parent = <&periph_intc>;
 476                         interrupts = <25>;
 477                 };
 478
 479                 qspi: spi@41d200 {
 480                         #address-cells = <0x1>;
 481                         #size-cells = <0x0>;
 482                         compatible = "brcm,spi-bcm-qspi",
 483                                      "brcm,spi-brcmstb-qspi";
 484                         clocks = <&upg_clk>;
 485                         reg = <0x41a920 0x4 0x41d400 0x188 0x41d200 0x50>;
 486                         reg-names = "cs_reg", "hif_mspi", "bspi";
 487                         interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
 488                         interrupt-parent = <&spi_l2_intc>;
 489                         interrupt-names = "spi_lr_fullness_reached",
 490                                           "spi_lr_session_aborted",
 491                                           "spi_lr_impatient",
 492                                           "spi_lr_session_done",
 493                                           "spi_lr_overread",
 494                                           "mspi_done",
 495                                           "mspi_halted";
 496                         status = "disabled";
 497                 };
 498
 499                 mspi: spi@409200 {
 500                         #address-cells = <1>;
 501                         #size-cells = <0>;
 502                         compatible = "brcm,spi-bcm-qspi",
 503                                      "brcm,spi-brcmstb-mspi";
 504                         clocks = <&upg_clk>;
 505                         reg = <0x409200 0x180>;
 506                         reg-names = "mspi";
 507                         interrupts = <0x14>;
 508                         interrupt-parent = <&upg_aon_irq0_intc>;
 509                         interrupt-names = "mspi_done";
 510                         status = "disabled";
 511                 };
 512         };
 513 };