1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "brcm,bcm7362";
11 mips-hpt-frequency = <375000000>;
14 compatible = "brcm,bmips4380";
20 compatible = "brcm,bmips4380";
30 cpu_intc: interrupt-controller {
32 compatible = "mti,cpu-interrupt-controller";
35 #interrupt-cells = <1>;
40 compatible = "fixed-clock";
42 clock-frequency = <81000000>;
46 compatible = "fixed-clock";
48 clock-frequency = <27000000>;
56 compatible = "simple-bus";
57 ranges = <0 0x10000000 0x01000000>;
59 periph_intc: interrupt-controller@411400 {
60 compatible = "brcm,bcm7038-l1-intc";
61 reg = <0x411400 0x30>, <0x411600 0x30>;
64 #interrupt-cells = <1>;
66 interrupt-parent = <&cpu_intc>;
67 interrupts = <2>, <3>;
70 sun_l2_intc: interrupt-controller@403000 {
71 compatible = "brcm,l2-intc";
72 reg = <0x403000 0x30>;
74 #interrupt-cells = <1>;
75 interrupt-parent = <&periph_intc>;
80 compatible = "brcm,bcm7400-gisb-arb";
81 reg = <0x400000 0xdc>;
83 interrupt-parent = <&sun_l2_intc>;
84 interrupts = <0>, <2>;
85 brcm,gisb-arb-master-mask = <0x2f3>;
86 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0",
91 upg_irq0_intc: interrupt-controller@406600 {
92 compatible = "brcm,bcm7120-l2-intc";
95 brcm,int-map-mask = <0x44>, <0x7000000>;
96 brcm,int-fwd-mask = <0x70000>;
99 #interrupt-cells = <1>;
101 interrupt-parent = <&periph_intc>;
102 interrupts = <56>, <54>;
103 interrupt-names = "upg_main", "upg_bsc";
106 upg_aon_irq0_intc: interrupt-controller@408b80 {
107 compatible = "brcm,bcm7120-l2-intc";
108 reg = <0x408b80 0x8>;
110 brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
111 brcm,int-fwd-mask = <0>;
114 interrupt-controller;
115 #interrupt-cells = <1>;
117 interrupt-parent = <&periph_intc>;
118 interrupts = <57>, <55>, <59>;
119 interrupt-names = "upg_main_aon", "upg_bsc_aon",
123 sun_top_ctrl: syscon@404000 {
124 compatible = "brcm,bcm7362-sun-top-ctrl", "syscon";
125 reg = <0x404000 0x51c>;
130 compatible = "brcm,brcmstb-reboot";
131 syscon = <&sun_top_ctrl 0x304 0x308>;
134 uart0: serial@406800 {
135 compatible = "ns16550a";
136 reg = <0x406800 0x20>;
137 reg-io-width = <0x4>;
140 interrupt-parent = <&periph_intc>;
142 clocks = <&uart_clk>;
146 uart1: serial@406840 {
147 compatible = "ns16550a";
148 reg = <0x406840 0x20>;
149 reg-io-width = <0x4>;
152 interrupt-parent = <&periph_intc>;
154 clocks = <&uart_clk>;
158 uart2: serial@406880 {
159 compatible = "ns16550a";
160 reg = <0x406880 0x20>;
161 reg-io-width = <0x4>;
164 interrupt-parent = <&periph_intc>;
166 clocks = <&uart_clk>;
171 clock-frequency = <390000>;
172 compatible = "brcm,brcmstb-i2c";
173 interrupt-parent = <&upg_irq0_intc>;
174 reg = <0x406200 0x58>;
176 interrupt-names = "upg_bsca";
181 clock-frequency = <390000>;
182 compatible = "brcm,brcmstb-i2c";
183 interrupt-parent = <&upg_irq0_intc>;
184 reg = <0x406280 0x58>;
186 interrupt-names = "upg_bscb";
191 clock-frequency = <390000>;
192 compatible = "brcm,brcmstb-i2c";
193 interrupt-parent = <&upg_aon_irq0_intc>;
194 reg = <0x408980 0x58>;
196 interrupt-names = "upg_bscd";
201 compatible = "brcm,bcm7038-pwm";
202 reg = <0x406400 0x28>;
208 aon_pm_l2_intc: interrupt-controller@408440 {
209 compatible = "brcm,l2-intc";
210 reg = <0x408440 0x30>;
211 interrupt-controller;
212 #interrupt-cells = <1>;
213 interrupt-parent = <&periph_intc>;
218 upg_gio: gpio@406500 {
219 compatible = "brcm,brcmstb-gpio";
220 reg = <0x406500 0xa0>;
222 #interrupt-cells = <2>;
224 interrupt-controller;
225 interrupt-parent = <&upg_irq0_intc>;
227 brcm,gpio-bank-widths = <32 32 32 29 4>;
230 upg_gio_aon: gpio@408c00 {
231 compatible = "brcm,brcmstb-gpio";
232 reg = <0x408c00 0x60>;
234 #interrupt-cells = <2>;
236 interrupt-controller;
237 interrupt-parent = <&upg_aon_irq0_intc>;
239 interrupts-extended = <&upg_aon_irq0_intc 6>,
242 brcm,gpio-bank-widths = <21 32 2>;
245 enet0: ethernet@430000 {
246 phy-mode = "internal";
247 phy-handle = <&phy1>;
248 mac-address = [ 00 10 18 36 23 1a ];
249 compatible = "brcm,genet-v2";
250 #address-cells = <0x1>;
252 reg = <0x430000 0x4c8c>;
253 interrupts = <24>, <25>;
254 interrupt-parent = <&periph_intc>;
258 compatible = "brcm,genet-mdio-v2";
259 #address-cells = <0x1>;
263 phy1: ethernet-phy@1 {
266 compatible = "brcm,40nm-ephy",
267 "ethernet-phy-ieee802.3-c22";
273 compatible = "brcm,bcm7362-ehci", "generic-ehci";
274 reg = <0x480300 0x100>;
276 interrupt-parent = <&periph_intc>;
282 compatible = "brcm,bcm7362-ohci", "generic-ohci";
283 reg = <0x480400 0x100>;
286 interrupt-parent = <&periph_intc>;
291 hif_l2_intc: interrupt-controller@411000 {
292 compatible = "brcm,l2-intc";
293 reg = <0x411000 0x30>;
294 interrupt-controller;
295 #interrupt-cells = <1>;
296 interrupt-parent = <&periph_intc>;
301 compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
302 #address-cells = <1>;
305 reg = <0x412800 0x400>;
306 interrupt-parent = <&hif_l2_intc>;
312 compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
313 reg-names = "ahci", "top-ctrl";
314 reg = <0x181000 0xa9c>, <0x180020 0x1c>;
315 interrupt-parent = <&periph_intc>;
317 #address-cells = <1>;
332 sata_phy: sata-phy@180100 {
333 compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
334 reg = <0x180100 0x0eff>;
336 #address-cells = <1>;
340 sata_phy0: sata-phy@0 {
345 sata_phy1: sata-phy@1 {
351 sdhci0: sdhci@410000 {
352 compatible = "brcm,bcm7425-sdhci";
353 reg = <0x410000 0x100>;
354 interrupt-parent = <&periph_intc>;
359 spi_l2_intc: interrupt-controller@411d00 {
360 compatible = "brcm,l2-intc";
361 reg = <0x411d00 0x30>;
362 interrupt-controller;
363 #interrupt-cells = <1>;
364 interrupt-parent = <&periph_intc>;
369 #address-cells = <0x1>;
371 compatible = "brcm,spi-bcm-qspi",
372 "brcm,spi-brcmstb-qspi";
374 reg = <0x410920 0x4 0x413200 0x188 0x413000 0x50>;
375 reg-names = "cs_reg", "hif_mspi", "bspi";
376 interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
377 interrupt-parent = <&spi_l2_intc>;
378 interrupt-names = "spi_lr_fullness_reached",
379 "spi_lr_session_aborted",
381 "spi_lr_session_done",
389 #address-cells = <1>;
391 compatible = "brcm,spi-bcm-qspi",
392 "brcm,spi-brcmstb-mspi";
394 reg = <0x408a00 0x180>;
397 interrupt-parent = <&upg_aon_irq0_intc>;
398 interrupt-names = "mspi_done";