4 compatible = "brcm,bcm7346";
10 mips-hpt-frequency = <163125000>;
13 compatible = "brcm,bmips5000";
19 compatible = "brcm,bmips5000";
29 cpu_intc: interrupt-controller {
31 compatible = "mti,cpu-interrupt-controller";
34 #interrupt-cells = <1>;
39 compatible = "fixed-clock";
41 clock-frequency = <81000000>;
45 compatible = "fixed-clock";
47 clock-frequency = <27000000>;
55 compatible = "simple-bus";
56 ranges = <0 0x10000000 0x01000000>;
58 periph_intc: interrupt-controller@411400 {
59 compatible = "brcm,bcm7038-l1-intc";
60 reg = <0x411400 0x30>, <0x411600 0x30>;
63 #interrupt-cells = <1>;
65 interrupt-parent = <&cpu_intc>;
66 interrupts = <2>, <3>;
69 sun_l2_intc: interrupt-controller@403000 {
70 compatible = "brcm,l2-intc";
71 reg = <0x403000 0x30>;
73 #interrupt-cells = <1>;
74 interrupt-parent = <&periph_intc>;
79 compatible = "brcm,bcm7400-gisb-arb";
80 reg = <0x400000 0xdc>;
82 interrupt-parent = <&sun_l2_intc>;
83 interrupts = <0>, <2>;
84 brcm,gisb-arb-master-mask = <0x673>;
85 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0",
90 upg_irq0_intc: interrupt-controller@406780 {
91 compatible = "brcm,bcm7120-l2-intc";
94 brcm,int-map-mask = <0x44>, <0xf000000>;
95 brcm,int-fwd-mask = <0x70000>;
98 #interrupt-cells = <1>;
100 interrupt-parent = <&periph_intc>;
101 interrupts = <59>, <57>;
102 interrupt-names = "upg_main", "upg_bsc";
105 upg_aon_irq0_intc: interrupt-controller@408b80 {
106 compatible = "brcm,bcm7120-l2-intc";
107 reg = <0x408b80 0x8>;
109 brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
110 brcm,int-fwd-mask = <0>;
113 interrupt-controller;
114 #interrupt-cells = <1>;
116 interrupt-parent = <&periph_intc>;
117 interrupts = <60>, <58>, <62>;
118 interrupt-names = "upg_main_aon", "upg_bsc_aon",
122 sun_top_ctrl: syscon@404000 {
123 compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
124 reg = <0x404000 0x51c>;
129 compatible = "brcm,brcmstb-reboot";
130 syscon = <&sun_top_ctrl 0x304 0x308>;
133 uart0: serial@406900 {
134 compatible = "ns16550a";
135 reg = <0x406900 0x20>;
136 reg-io-width = <0x4>;
139 interrupt-parent = <&periph_intc>;
141 clocks = <&uart_clk>;
145 uart1: serial@406940 {
146 compatible = "ns16550a";
147 reg = <0x406940 0x20>;
148 reg-io-width = <0x4>;
151 interrupt-parent = <&periph_intc>;
153 clocks = <&uart_clk>;
157 uart2: serial@406980 {
158 compatible = "ns16550a";
159 reg = <0x406980 0x20>;
160 reg-io-width = <0x4>;
163 interrupt-parent = <&periph_intc>;
165 clocks = <&uart_clk>;
170 clock-frequency = <390000>;
171 compatible = "brcm,brcmstb-i2c";
172 interrupt-parent = <&upg_irq0_intc>;
173 reg = <0x406200 0x58>;
175 interrupt-names = "upg_bsca";
180 clock-frequency = <390000>;
181 compatible = "brcm,brcmstb-i2c";
182 interrupt-parent = <&upg_irq0_intc>;
183 reg = <0x406280 0x58>;
185 interrupt-names = "upg_bscb";
190 clock-frequency = <390000>;
191 compatible = "brcm,brcmstb-i2c";
192 interrupt-parent = <&upg_irq0_intc>;
193 reg = <0x406300 0x58>;
195 interrupt-names = "upg_bscc";
200 clock-frequency = <390000>;
201 compatible = "brcm,brcmstb-i2c";
202 interrupt-parent = <&upg_irq0_intc>;
203 reg = <0x406380 0x58>;
205 interrupt-names = "upg_bscd";
210 clock-frequency = <390000>;
211 compatible = "brcm,brcmstb-i2c";
212 interrupt-parent = <&upg_aon_irq0_intc>;
213 reg = <0x408980 0x58>;
215 interrupt-names = "upg_bsce";
220 compatible = "brcm,bcm7038-pwm";
221 reg = <0x406580 0x28>;
228 compatible = "brcm,bcm7038-pwm";
229 reg = <0x406800 0x28>;
235 aon_pm_l2_intc: interrupt-controller@408440 {
236 compatible = "brcm,l2-intc";
237 reg = <0x408440 0x30>;
238 interrupt-controller;
239 #interrupt-cells = <1>;
240 interrupt-parent = <&periph_intc>;
245 upg_gio: gpio@406700 {
246 compatible = "brcm,brcmstb-gpio";
247 reg = <0x406700 0x60>;
249 #interrupt-cells = <2>;
251 interrupt-controller;
252 interrupt-parent = <&upg_irq0_intc>;
254 brcm,gpio-bank-widths = <32 32 16>;
257 upg_gio_aon: gpio@408c00 {
258 compatible = "brcm,brcmstb-gpio";
259 reg = <0x408c00 0x60>;
261 #interrupt-cells = <2>;
263 interrupt-controller;
264 interrupt-parent = <&upg_aon_irq0_intc>;
266 interrupts-extended = <&upg_aon_irq0_intc 6>,
269 brcm,gpio-bank-widths = <27 32 2>;
272 enet0: ethernet@430000 {
273 phy-mode = "internal";
274 phy-handle = <&phy1>;
275 mac-address = [ 00 10 18 36 23 1a ];
276 compatible = "brcm,genet-v2";
277 #address-cells = <0x1>;
279 reg = <0x430000 0x4c8c>;
280 interrupts = <24>, <25>;
281 interrupt-parent = <&periph_intc>;
285 compatible = "brcm,genet-mdio-v2";
286 #address-cells = <0x1>;
290 phy1: ethernet-phy@1 {
293 compatible = "brcm,40nm-ephy",
294 "ethernet-phy-ieee802.3-c22";
300 compatible = "brcm,bcm7346-ehci", "generic-ehci";
301 reg = <0x480300 0x100>;
303 interrupt-parent = <&periph_intc>;
309 compatible = "brcm,bcm7346-ohci", "generic-ohci";
310 reg = <0x480400 0x100>;
313 interrupt-parent = <&periph_intc>;
319 compatible = "brcm,bcm7346-ehci", "generic-ehci";
320 reg = <0x480500 0x100>;
322 interrupt-parent = <&periph_intc>;
328 compatible = "brcm,bcm7346-ohci", "generic-ohci";
329 reg = <0x480600 0x100>;
332 interrupt-parent = <&periph_intc>;
338 compatible = "brcm,bcm7346-ehci", "generic-ehci";
339 reg = <0x490300 0x100>;
341 interrupt-parent = <&periph_intc>;
347 compatible = "brcm,bcm7346-ohci", "generic-ohci";
348 reg = <0x490400 0x100>;
351 interrupt-parent = <&periph_intc>;
357 compatible = "brcm,bcm7346-ehci", "generic-ehci";
358 reg = <0x490500 0x100>;
360 interrupt-parent = <&periph_intc>;
366 compatible = "brcm,bcm7346-ohci", "generic-ohci";
367 reg = <0x490600 0x100>;
370 interrupt-parent = <&periph_intc>;
375 hif_l2_intc: interrupt-controller@411000 {
376 compatible = "brcm,l2-intc";
377 reg = <0x411000 0x30>;
378 interrupt-controller;
379 #interrupt-cells = <1>;
380 interrupt-parent = <&periph_intc>;
385 compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
386 #address-cells = <1>;
389 reg = <0x412800 0x400>;
390 interrupt-parent = <&hif_l2_intc>;
396 compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
397 reg-names = "ahci", "top-ctrl";
398 reg = <0x181000 0xa9c>, <0x180020 0x1c>;
399 interrupt-parent = <&periph_intc>;
401 #address-cells = <1>;
416 sata_phy: sata-phy@180100 {
417 compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
418 reg = <0x180100 0x0eff>;
420 #address-cells = <1>;
424 sata_phy0: sata-phy@0 {
429 sata_phy1: sata-phy@1 {
435 sdhci0: sdhci@413500 {
436 compatible = "brcm,bcm7425-sdhci";
437 reg = <0x413500 0x100>;
438 interrupt-parent = <&periph_intc>;