1 // SPDX-License-Identifier: GPL-2.0
3 #include "dt-bindings/clock/bcm6362-clock.h"
4 #include "dt-bindings/reset/bcm6362-reset.h"
5 #include "dt-bindings/soc/bcm6362-pm.h"
10 compatible = "brcm,bcm6362";
16 mips-hpt-frequency = <200000000>;
19 compatible = "brcm,bmips4350";
25 compatible = "brcm,bmips4350";
32 periph_osc: periph-osc {
33 compatible = "fixed-clock";
35 clock-frequency = <50000000>;
36 clock-output-names = "periph";
39 hsspi_osc: hsspi-osc {
40 compatible = "fixed-clock";
44 clock-frequency = <400000000>;
45 clock-output-names = "hsspi_osc";
57 cpu_intc: interrupt-controller {
59 compatible = "mti,cpu-interrupt-controller";
62 #interrupt-cells = <1>;
69 compatible = "simple-bus";
72 periph_clk: clock-controller@10000004 {
73 compatible = "brcm,bcm6362-clocks";
74 reg = <0x10000004 0x4>;
78 pll_cntl: syscon@10000008 {
79 compatible = "syscon";
80 reg = <0x10000008 0x4>;
84 compatible = "syscon-reboot";
90 periph_rst: reset-controller@10000010 {
91 compatible = "brcm,bcm6345-reset";
92 reg = <0x10000010 0x4>;
96 periph_intc: interrupt-controller@10000020 {
97 compatible = "brcm,bcm6345-l1-intc";
98 reg = <0x10000020 0x10>,
101 interrupt-controller;
102 #interrupt-cells = <1>;
104 interrupt-parent = <&cpu_intc>;
105 interrupts = <2>, <3>;
108 wdt: watchdog@1000005c {
109 compatible = "brcm,bcm7038-wdt";
110 reg = <0x1000005c 0xc>;
112 clocks = <&periph_osc>;
113 clock-names = "refclk";
118 uart0: serial@10000100 {
119 compatible = "brcm,bcm6345-uart";
120 reg = <0x10000100 0x18>;
122 interrupt-parent = <&periph_intc>;
125 clocks = <&periph_osc>;
126 clock-names = "refclk";
131 uart1: serial@10000120 {
132 compatible = "brcm,bcm6345-uart";
133 reg = <0x10000120 0x18>;
135 interrupt-parent = <&periph_intc>;
138 clocks = <&periph_osc>;
139 clock-names = "refclk";
144 nflash: nand@10000200 {
145 #address-cells = <1>;
147 compatible = "brcm,nand-bcm6368",
148 "brcm,brcmnand-v2.2",
150 reg = <0x10000200 0x180>,
157 interrupt-parent = <&periph_intc>;
160 clocks = <&periph_clk BCM6362_CLK_NAND>;
161 clock-names = "nand";
166 lsspi: spi@10000800 {
167 #address-cells = <1>;
169 compatible = "brcm,bcm6358-spi";
170 reg = <0x10000800 0x70c>;
172 interrupt-parent = <&periph_intc>;
175 clocks = <&periph_clk BCM6362_CLK_SPI>;
178 resets = <&periph_rst BCM6362_RST_SPI>;
184 hsspi: spi@10001000 {
185 #address-cells = <1>;
187 compatible = "brcm,bcm6328-hsspi";
188 reg = <0x10001000 0x600>;
190 interrupt-parent = <&periph_intc>;
193 clocks = <&periph_clk BCM6362_CLK_HSSPI>,
195 clock-names = "hsspi",
198 resets = <&periph_rst BCM6362_RST_SPI>;
199 reset-names = "hsspi";
204 periph_pwr: power-controller@10001848 {
205 compatible = "brcm,bcm6362-power-controller";
206 reg = <0x10001848 0x4>;
207 #power-domain-cells = <1>;
210 leds0: led-controller@10001900 {
211 #address-cells = <1>;
213 compatible = "brcm,bcm6328-leds";
214 reg = <0x10001900 0x24>;
220 compatible = "brcm,bcm6362-ehci", "generic-ehci";
221 reg = <0x10002500 0x100>;
224 interrupt-parent = <&periph_intc>;
234 compatible = "brcm,bcm6362-ohci", "generic-ohci";
235 reg = <0x10002600 0x100>;
239 interrupt-parent = <&periph_intc>;
248 usbh: usb-phy@10002700 {
249 compatible = "brcm,bcm6362-usbh-phy";
250 reg = <0x10002700 0x38>;
254 clocks = <&periph_clk BCM6362_CLK_USBH>;
255 clock-names = "usbh";
257 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_USBH>;
259 resets = <&periph_rst BCM6362_RST_USBH>;
260 reset-names = "usbh";