arch/mips/boot/dts/brcm/bcm6358.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 #include "dt-bindings/clock/bcm6358-clock.h"
   4 #include "dt-bindings/reset/bcm6358-reset.h"
   5
   6 / {
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9         compatible = "brcm,bcm6358";
  10
  11         cpus {
  12                 #address-cells = <1>;
  13                 #size-cells = <0>;
  14
  15                 mips-hpt-frequency = <150000000>;
  16
  17                 cpu@0 {
  18                         compatible = "brcm,bmips4350";
  19                         device_type = "cpu";
  20                         reg = <0>;
  21                 };
  22
  23                 cpu@1 {
  24                         compatible = "brcm,bmips4350";
  25                         device_type = "cpu";
  26                         reg = <1>;
  27                 };
  28         };
  29
  30         clocks {
  31                 periph_osc: periph-osc {
  32                         compatible = "fixed-clock";
  33                         #clock-cells = <0>;
  34                         clock-frequency = <50000000>;
  35                         clock-output-names = "periph";
  36                 };
  37         };
  38
  39         aliases {
  40                 pflash = &pflash;
  41                 serial0 = &uart0;
  42                 serial1 = &uart1;
  43                 spi0 = &lsspi;
  44         };
  45
  46         cpu_intc: interrupt-controller {
  47                 #address-cells = <0>;
  48                 compatible = "mti,cpu-interrupt-controller";
  49
  50                 interrupt-controller;
  51                 #interrupt-cells = <1>;
  52         };
  53
  54         ubus {
  55                 #address-cells = <1>;
  56                 #size-cells = <1>;
  57
  58                 compatible = "simple-bus";
  59                 ranges;
  60
  61                 periph_clk: clock-controller@fffe0004 {
  62                         compatible = "brcm,bcm6358-clocks";
  63                         reg = <0xfffe0004 0x4>;
  64                         #clock-cells = <1>;
  65                 };
  66
  67                 pll_cntl: syscon@fffe0008 {
  68                         compatible = "syscon";
  69                         reg = <0xfffe0008 0x4>;
  70                         native-endian;
  71
  72                         reboot {
  73                                 compatible = "syscon-reboot";
  74                                 offset = <0x0>;
  75                                 mask = <0x1>;
  76                         };
  77                 };
  78
  79                 periph_intc: interrupt-controller@fffe000c {
  80                         compatible = "brcm,bcm6345-l1-intc";
  81                         reg = <0xfffe000c 0x8>,
  82                               <0xfffe0038 0x8>;
  83
  84                         interrupt-controller;
  85                         #interrupt-cells = <1>;
  86
  87                         interrupt-parent = <&cpu_intc>;
  88                         interrupts = <2>, <3>;
  89                 };
  90
  91                 periph_rst: reset-controller@fffe0034 {
  92                         compatible = "brcm,bcm6345-reset";
  93                         reg = <0xfffe0034 0x4>;
  94                         #reset-cells = <1>;
  95                 };
  96
  97                 wdt: watchdog@fffe005c {
  98                         compatible = "brcm,bcm7038-wdt";
  99                         reg = <0xfffe005c 0xc>;
 100
 101                         clocks = <&periph_osc>;
 102                         clock-names = "refclk";
 103
 104                         timeout-sec = <30>;
 105                 };
 106
 107                 leds0: led-controller@fffe00d0 {
 108                         #address-cells = <1>;
 109                         #size-cells = <0>;
 110                         compatible = "brcm,bcm6358-leds";
 111                         reg = <0xfffe00d0 0x8>;
 112
 113                         status = "disabled";
 114                 };
 115
 116                 uart0: serial@fffe0100 {
 117                         compatible = "brcm,bcm6345-uart";
 118                         reg = <0xfffe0100 0x18>;
 119
 120                         interrupt-parent = <&periph_intc>;
 121                         interrupts = <2>;
 122
 123                         clocks = <&periph_osc>;
 124                         clock-names = "refclk";
 125
 126                         status = "disabled";
 127                 };
 128
 129                 uart1: serial@fffe0120 {
 130                         compatible = "brcm,bcm6345-uart";
 131                         reg = <0xfffe0120 0x18>;
 132
 133                         interrupt-parent = <&periph_intc>;
 134                         interrupts = <3>;
 135
 136                         clocks = <&periph_osc>;
 137                         clock-names = "refclk";
 138
 139                         status = "disabled";
 140                 };
 141
 142                 lsspi: spi@fffe0800 {
 143                         #address-cells = <1>;
 144                         #size-cells = <0>;
 145                         compatible = "brcm,bcm6358-spi";
 146                         reg = <0xfffe0800 0x70c>;
 147
 148                         interrupt-parent = <&periph_intc>;
 149                         interrupts = <1>;
 150
 151                         clocks = <&periph_clk BCM6358_CLK_SPI>;
 152                         clock-names = "spi";
 153
 154                         resets = <&periph_rst BCM6358_RST_SPI>;
 155                         reset-names = "spi";
 156
 157                         status = "disabled";
 158                 };
 159
 160                 ehci: usb@fffe1300 {
 161                         compatible = "brcm,bcm6358-ehci", "generic-ehci";
 162                         reg = <0xfffe1300 0x100>;
 163                         big-endian;
 164
 165                         interrupt-parent = <&periph_intc>;
 166                         interrupts = <10>;
 167
 168                         phys = <&usbh 0>;
 169                         phy-names = "usb";
 170
 171                         status = "disabled";
 172                 };
 173
 174                 ohci: usb@fffe1400 {
 175                         compatible = "brcm,bcm6358-ohci", "generic-ohci";
 176                         reg = <0xfffe1400 0x100>;
 177                         big-endian;
 178                         no-big-frame-no;
 179
 180                         interrupt-parent = <&periph_intc>;
 181                         interrupts = <5>;
 182
 183                         phys = <&usbh 0>;
 184                         phy-names = "usb";
 185
 186                         status = "disabled";
 187                 };
 188
 189                 usbh: usb-phy@fffe1500 {
 190                         compatible = "brcm,bcm6358-usbh-phy";
 191                         reg = <0xfffe1500 0x38>;
 192                         #phy-cells = <1>;
 193
 194                         resets = <&periph_rst BCM6358_RST_USBH>;
 195                         reset-names = "usbh";
 196
 197                         status = "disabled";
 198                 };
 199         };
 200
 201         pflash: nor@1e000000 {
 202                 #address-cells = <1>;
 203                 #size-cells = <1>;
 204                 compatible = "cfi-flash";
 205                 reg = <0x1e000000 0x2000000>;
 206                 bank-width = <2>;
 207
 208                 status = "disabled";
 209         };
 210 };