1 // SPDX-License-Identifier: GPL-2.0
3 * DBAu1300 init and platform device setup.
5 * (c) 2009 Manuel Lauss <manuel.lauss@googlemail.com>
9 #include <linux/dma-mapping.h>
10 #include <linux/gpio.h>
11 #include <linux/gpio_keys.h>
12 #include <linux/init.h>
13 #include <linux/input.h> /* KEY_* codes */
14 #include <linux/i2c.h>
16 #include <linux/leds.h>
17 #include <linux/interrupt.h>
18 #include <linux/ata_platform.h>
19 #include <linux/mmc/host.h>
20 #include <linux/mtd/mtd.h>
21 #include <linux/mtd/rawnand.h>
22 #include <linux/mtd/partitions.h>
23 #include <linux/platform_device.h>
24 #include <linux/smsc911x.h>
25 #include <linux/wm97xx.h>
27 #include <asm/mach-au1x00/au1000.h>
28 #include <asm/mach-au1x00/gpio-au1300.h>
29 #include <asm/mach-au1x00/au1100_mmc.h>
30 #include <asm/mach-au1x00/au1200fb.h>
31 #include <asm/mach-au1x00/au1xxx_dbdma.h>
32 #include <asm/mach-au1x00/au1xxx_psc.h>
33 #include <asm/mach-db1x00/bcsr.h>
34 #include <asm/mach-au1x00/prom.h>
38 /* FPGA (external mux) interrupt sources */
39 #define DB1300_FIRST_INT (ALCHEMY_GPIC_INT_LAST + 1)
40 #define DB1300_IDE_INT (DB1300_FIRST_INT + 0)
41 #define DB1300_ETH_INT (DB1300_FIRST_INT + 1)
42 #define DB1300_CF_INT (DB1300_FIRST_INT + 2)
43 #define DB1300_VIDEO_INT (DB1300_FIRST_INT + 4)
44 #define DB1300_HDMI_INT (DB1300_FIRST_INT + 5)
45 #define DB1300_DC_INT (DB1300_FIRST_INT + 6)
46 #define DB1300_FLASH_INT (DB1300_FIRST_INT + 7)
47 #define DB1300_CF_INSERT_INT (DB1300_FIRST_INT + 8)
48 #define DB1300_CF_EJECT_INT (DB1300_FIRST_INT + 9)
49 #define DB1300_AC97_INT (DB1300_FIRST_INT + 10)
50 #define DB1300_AC97_PEN_INT (DB1300_FIRST_INT + 11)
51 #define DB1300_SD1_INSERT_INT (DB1300_FIRST_INT + 12)
52 #define DB1300_SD1_EJECT_INT (DB1300_FIRST_INT + 13)
53 #define DB1300_OTG_VBUS_OC_INT (DB1300_FIRST_INT + 14)
54 #define DB1300_HOST_VBUS_OC_INT (DB1300_FIRST_INT + 15)
55 #define DB1300_LAST_INT (DB1300_FIRST_INT + 15)
58 #define DB1300_ETH_PHYS_ADDR 0x19000000
59 #define DB1300_ETH_PHYS_END 0x197fffff
62 #define DB1300_IDE_PHYS_ADDR 0x18800000
63 #define DB1300_IDE_REG_SHIFT 5
64 #define DB1300_IDE_PHYS_LEN (16 << DB1300_IDE_REG_SHIFT)
67 #define DB1300_NAND_PHYS_ADDR 0x20000000
68 #define DB1300_NAND_PHYS_END 0x20000fff
71 static struct i2c_board_info db1300_i2c_devs[] __initdata = {
72 { I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec */
73 { I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */
76 /* multifunction pins to assign to GPIO controller */
77 static int db1300_gpio_pins[] __initdata = {
78 AU1300_PIN_LCDPWM0, AU1300_PIN_PSC2SYNC1, AU1300_PIN_WAKE1,
79 AU1300_PIN_WAKE2, AU1300_PIN_WAKE3, AU1300_PIN_FG3AUX,
84 /* multifunction pins to assign to device functions */
85 static int db1300_dev_pins[] __initdata = {
86 /* wake-from-str pins 0-3 */
88 /* external clock sources for PSC0 */
90 /* 8bit MMC interface on SD0: 6-9 */
91 AU1300_PIN_SD0DAT4, AU1300_PIN_SD0DAT5, AU1300_PIN_SD0DAT6,
93 /* UART1 pins: 11-18 */
94 AU1300_PIN_U1RI, AU1300_PIN_U1DCD, AU1300_PIN_U1DSR,
95 AU1300_PIN_U1CTS, AU1300_PIN_U1RTS, AU1300_PIN_U1DTR,
96 AU1300_PIN_U1RX, AU1300_PIN_U1TX,
97 /* UART0 pins: 19-24 */
98 AU1300_PIN_U0RI, AU1300_PIN_U0DCD, AU1300_PIN_U0DSR,
99 AU1300_PIN_U0CTS, AU1300_PIN_U0RTS, AU1300_PIN_U0DTR,
101 AU1300_PIN_U2RX, AU1300_PIN_U2TX,
103 AU1300_PIN_U3RX, AU1300_PIN_U3TX,
104 /* LCD controller PWMs, ext pixclock: 30-31 */
105 AU1300_PIN_LCDPWM1, AU1300_PIN_LCDCLKIN,
106 /* SD1 interface: 32-37 */
107 AU1300_PIN_SD1DAT0, AU1300_PIN_SD1DAT1, AU1300_PIN_SD1DAT2,
108 AU1300_PIN_SD1DAT3, AU1300_PIN_SD1CMD, AU1300_PIN_SD1CLK,
109 /* SD2 interface: 38-43 */
110 AU1300_PIN_SD2DAT0, AU1300_PIN_SD2DAT1, AU1300_PIN_SD2DAT2,
111 AU1300_PIN_SD2DAT3, AU1300_PIN_SD2CMD, AU1300_PIN_SD2CLK,
112 /* PSC0/1 clocks: 44-45 */
113 AU1300_PIN_PSC0CLK, AU1300_PIN_PSC1CLK,
114 /* PSCs: 46-49/50-53/54-57/58-61 */
115 AU1300_PIN_PSC0SYNC0, AU1300_PIN_PSC0SYNC1, AU1300_PIN_PSC0D0,
117 AU1300_PIN_PSC1SYNC0, AU1300_PIN_PSC1SYNC1, AU1300_PIN_PSC1D0,
119 AU1300_PIN_PSC2SYNC0, AU1300_PIN_PSC2D0,
121 AU1300_PIN_PSC3SYNC0, AU1300_PIN_PSC3SYNC1, AU1300_PIN_PSC3D0,
123 /* PCMCIA interface: 62-70 */
124 AU1300_PIN_PCE2, AU1300_PIN_PCE1, AU1300_PIN_PIOS16,
125 AU1300_PIN_PIOR, AU1300_PIN_PWE, AU1300_PIN_PWAIT,
126 AU1300_PIN_PREG, AU1300_PIN_POE, AU1300_PIN_PIOW,
127 /* camera interface H/V sync inputs: 71-72 */
128 AU1300_PIN_CIMLS, AU1300_PIN_CIMFS,
129 /* PSC2/3 clocks: 73-74 */
130 AU1300_PIN_PSC2CLK, AU1300_PIN_PSC3CLK,
134 static void __init db1300_gpio_config(void)
138 i = &db1300_dev_pins[0];
140 au1300_pinfunc_to_dev(*i++);
142 i = &db1300_gpio_pins[0];
144 au1300_gpio_direction_input(*i++);/* implies pin_to_gpio */
146 au1300_set_dbdma_gpio(1, AU1300_PIN_FG3AUX);
149 /**********************************************************************/
151 static void au1300_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
154 struct nand_chip *this = mtd_to_nand(mtd);
155 unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
157 ioaddr &= 0xffffff00;
159 if (ctrl & NAND_CLE) {
160 ioaddr += MEM_STNAND_CMD;
161 } else if (ctrl & NAND_ALE) {
162 ioaddr += MEM_STNAND_ADDR;
164 /* assume we want to r/w real data by default */
165 ioaddr += MEM_STNAND_DATA;
167 this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr;
168 if (cmd != NAND_CMD_NONE) {
169 __raw_writeb(cmd, this->IO_ADDR_W);
174 static int au1300_nand_device_ready(struct mtd_info *mtd)
176 return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1;
179 static struct mtd_partition db1300_nand_parts[] = {
183 .size = 8 * 1024 * 1024,
187 .offset = MTDPART_OFS_APPEND,
188 .size = MTDPART_SIZ_FULL
192 struct platform_nand_data db1300_nand_platdata = {
196 .nr_partitions = ARRAY_SIZE(db1300_nand_parts),
197 .partitions = db1300_nand_parts,
201 .dev_ready = au1300_nand_device_ready,
202 .cmd_ctrl = au1300_nand_cmd_ctrl,
206 static struct resource db1300_nand_res[] = {
208 .start = DB1300_NAND_PHYS_ADDR,
209 .end = DB1300_NAND_PHYS_ADDR + 0xff,
210 .flags = IORESOURCE_MEM,
214 static struct platform_device db1300_nand_dev = {
216 .num_resources = ARRAY_SIZE(db1300_nand_res),
217 .resource = db1300_nand_res,
220 .platform_data = &db1300_nand_platdata,
224 /**********************************************************************/
226 static struct resource db1300_eth_res[] = {
228 .start = DB1300_ETH_PHYS_ADDR,
229 .end = DB1300_ETH_PHYS_END,
230 .flags = IORESOURCE_MEM,
233 .start = DB1300_ETH_INT,
234 .end = DB1300_ETH_INT,
235 .flags = IORESOURCE_IRQ,
239 static struct smsc911x_platform_config db1300_eth_config = {
240 .phy_interface = PHY_INTERFACE_MODE_MII,
241 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
242 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
243 .flags = SMSC911X_USE_32BIT,
246 static struct platform_device db1300_eth_dev = {
249 .num_resources = ARRAY_SIZE(db1300_eth_res),
250 .resource = db1300_eth_res,
252 .platform_data = &db1300_eth_config,
256 /**********************************************************************/
258 static struct resource au1300_psc1_res[] = {
260 .start = AU1300_PSC1_PHYS_ADDR,
261 .end = AU1300_PSC1_PHYS_ADDR + 0x0fff,
262 .flags = IORESOURCE_MEM,
265 .start = AU1300_PSC1_INT,
266 .end = AU1300_PSC1_INT,
267 .flags = IORESOURCE_IRQ,
270 .start = AU1300_DSCR_CMD0_PSC1_TX,
271 .end = AU1300_DSCR_CMD0_PSC1_TX,
272 .flags = IORESOURCE_DMA,
275 .start = AU1300_DSCR_CMD0_PSC1_RX,
276 .end = AU1300_DSCR_CMD0_PSC1_RX,
277 .flags = IORESOURCE_DMA,
281 static struct platform_device db1300_ac97_dev = {
282 .name = "au1xpsc_ac97",
283 .id = 1, /* PSC ID. match with AC97 codec ID! */
284 .num_resources = ARRAY_SIZE(au1300_psc1_res),
285 .resource = au1300_psc1_res,
288 /**********************************************************************/
290 static struct resource au1300_psc2_res[] = {
292 .start = AU1300_PSC2_PHYS_ADDR,
293 .end = AU1300_PSC2_PHYS_ADDR + 0x0fff,
294 .flags = IORESOURCE_MEM,
297 .start = AU1300_PSC2_INT,
298 .end = AU1300_PSC2_INT,
299 .flags = IORESOURCE_IRQ,
302 .start = AU1300_DSCR_CMD0_PSC2_TX,
303 .end = AU1300_DSCR_CMD0_PSC2_TX,
304 .flags = IORESOURCE_DMA,
307 .start = AU1300_DSCR_CMD0_PSC2_RX,
308 .end = AU1300_DSCR_CMD0_PSC2_RX,
309 .flags = IORESOURCE_DMA,
313 static struct platform_device db1300_i2s_dev = {
314 .name = "au1xpsc_i2s",
315 .id = 2, /* PSC ID */
316 .num_resources = ARRAY_SIZE(au1300_psc2_res),
317 .resource = au1300_psc2_res,
320 /**********************************************************************/
322 static struct resource au1300_psc3_res[] = {
324 .start = AU1300_PSC3_PHYS_ADDR,
325 .end = AU1300_PSC3_PHYS_ADDR + 0x0fff,
326 .flags = IORESOURCE_MEM,
329 .start = AU1300_PSC3_INT,
330 .end = AU1300_PSC3_INT,
331 .flags = IORESOURCE_IRQ,
334 .start = AU1300_DSCR_CMD0_PSC3_TX,
335 .end = AU1300_DSCR_CMD0_PSC3_TX,
336 .flags = IORESOURCE_DMA,
339 .start = AU1300_DSCR_CMD0_PSC3_RX,
340 .end = AU1300_DSCR_CMD0_PSC3_RX,
341 .flags = IORESOURCE_DMA,
345 static struct platform_device db1300_i2c_dev = {
346 .name = "au1xpsc_smbus",
347 .id = 0, /* bus number */
348 .num_resources = ARRAY_SIZE(au1300_psc3_res),
349 .resource = au1300_psc3_res,
352 /**********************************************************************/
354 /* proper key assignments when facing the LCD panel. For key assignments
355 * according to the schematics swap up with down and left with right.
356 * I chose to use it to emulate the arrow keys of a keyboard.
358 static struct gpio_keys_button db1300_5waysw_arrowkeys[] = {
361 .gpio = AU1300_PIN_LCDPWM0,
363 .debounce_interval = 1,
365 .desc = "5waysw-down",
369 .gpio = AU1300_PIN_PSC2SYNC1,
371 .debounce_interval = 1,
377 .gpio = AU1300_PIN_WAKE3,
379 .debounce_interval = 1,
381 .desc = "5waysw-right",
385 .gpio = AU1300_PIN_WAKE2,
387 .debounce_interval = 1,
389 .desc = "5waysw-left",
393 .gpio = AU1300_PIN_WAKE1,
395 .debounce_interval = 1,
397 .desc = "5waysw-push",
401 static struct gpio_keys_platform_data db1300_5waysw_data = {
402 .buttons = db1300_5waysw_arrowkeys,
403 .nbuttons = ARRAY_SIZE(db1300_5waysw_arrowkeys),
405 .name = "db1300-5wayswitch",
408 static struct platform_device db1300_5waysw_dev = {
411 .platform_data = &db1300_5waysw_data,
415 /**********************************************************************/
417 static struct pata_platform_info db1300_ide_info = {
418 .ioport_shift = DB1300_IDE_REG_SHIFT,
421 #define IDE_ALT_START (14 << DB1300_IDE_REG_SHIFT)
422 static struct resource db1300_ide_res[] = {
424 .start = DB1300_IDE_PHYS_ADDR,
425 .end = DB1300_IDE_PHYS_ADDR + IDE_ALT_START - 1,
426 .flags = IORESOURCE_MEM,
429 .start = DB1300_IDE_PHYS_ADDR + IDE_ALT_START,
430 .end = DB1300_IDE_PHYS_ADDR + DB1300_IDE_PHYS_LEN - 1,
431 .flags = IORESOURCE_MEM,
434 .start = DB1300_IDE_INT,
435 .end = DB1300_IDE_INT,
436 .flags = IORESOURCE_IRQ,
440 static struct platform_device db1300_ide_dev = {
442 .platform_data = &db1300_ide_info,
444 .name = "pata_platform",
445 .resource = db1300_ide_res,
446 .num_resources = ARRAY_SIZE(db1300_ide_res),
449 /**********************************************************************/
451 static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
453 disable_irq_nosync(irq);
454 return IRQ_WAKE_THREAD;
457 static irqreturn_t db1300_mmc_cdfn(int irq, void *ptr)
459 mmc_detect_change(ptr, msecs_to_jiffies(200));
461 msleep(100); /* debounce */
462 if (irq == DB1300_SD1_INSERT_INT)
463 enable_irq(DB1300_SD1_EJECT_INT);
465 enable_irq(DB1300_SD1_INSERT_INT);
470 static int db1300_mmc_card_readonly(void *mmc_host)
472 /* it uses SD1 interface, but the DB1200's SD0 bit in the CPLD */
473 return bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP;
476 static int db1300_mmc_card_inserted(void *mmc_host)
478 return bcsr_read(BCSR_SIGSTAT) & (1 << 12); /* insertion irq signal */
481 static int db1300_mmc_cd_setup(void *mmc_host, int en)
486 ret = request_threaded_irq(DB1300_SD1_INSERT_INT, db1300_mmc_cd,
487 db1300_mmc_cdfn, 0, "sd_insert", mmc_host);
491 ret = request_threaded_irq(DB1300_SD1_EJECT_INT, db1300_mmc_cd,
492 db1300_mmc_cdfn, 0, "sd_eject", mmc_host);
494 free_irq(DB1300_SD1_INSERT_INT, mmc_host);
498 if (db1300_mmc_card_inserted(mmc_host))
499 enable_irq(DB1300_SD1_EJECT_INT);
501 enable_irq(DB1300_SD1_INSERT_INT);
504 free_irq(DB1300_SD1_INSERT_INT, mmc_host);
505 free_irq(DB1300_SD1_EJECT_INT, mmc_host);
512 static void db1300_mmcled_set(struct led_classdev *led,
513 enum led_brightness brightness)
515 if (brightness != LED_OFF)
516 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
518 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
521 static struct led_classdev db1300_mmc_led = {
522 .brightness_set = db1300_mmcled_set,
525 struct au1xmmc_platform_data db1300_sd1_platdata = {
526 .cd_setup = db1300_mmc_cd_setup,
527 .card_inserted = db1300_mmc_card_inserted,
528 .card_readonly = db1300_mmc_card_readonly,
529 .led = &db1300_mmc_led,
532 static struct resource au1300_sd1_res[] = {
534 .start = AU1300_SD1_PHYS_ADDR,
535 .end = AU1300_SD1_PHYS_ADDR,
536 .flags = IORESOURCE_MEM,
539 .start = AU1300_SD1_INT,
540 .end = AU1300_SD1_INT,
541 .flags = IORESOURCE_IRQ,
544 .start = AU1300_DSCR_CMD0_SDMS_TX1,
545 .end = AU1300_DSCR_CMD0_SDMS_TX1,
546 .flags = IORESOURCE_DMA,
549 .start = AU1300_DSCR_CMD0_SDMS_RX1,
550 .end = AU1300_DSCR_CMD0_SDMS_RX1,
551 .flags = IORESOURCE_DMA,
555 static struct platform_device db1300_sd1_dev = {
557 .platform_data = &db1300_sd1_platdata,
559 .name = "au1xxx-mmc",
561 .resource = au1300_sd1_res,
562 .num_resources = ARRAY_SIZE(au1300_sd1_res),
565 /**********************************************************************/
567 static int db1300_movinand_inserted(void *mmc_host)
569 return 0; /* disable for now, it doesn't work yet */
572 static int db1300_movinand_readonly(void *mmc_host)
577 static void db1300_movinand_led_set(struct led_classdev *led,
578 enum led_brightness brightness)
580 if (brightness != LED_OFF)
581 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);
583 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);
586 static struct led_classdev db1300_movinand_led = {
587 .brightness_set = db1300_movinand_led_set,
590 struct au1xmmc_platform_data db1300_sd0_platdata = {
591 .card_inserted = db1300_movinand_inserted,
592 .card_readonly = db1300_movinand_readonly,
593 .led = &db1300_movinand_led,
594 .mask_host_caps = MMC_CAP_NEEDS_POLL,
597 static struct resource au1300_sd0_res[] = {
599 .start = AU1100_SD0_PHYS_ADDR,
600 .end = AU1100_SD0_PHYS_ADDR,
601 .flags = IORESOURCE_MEM,
604 .start = AU1300_SD0_INT,
605 .end = AU1300_SD0_INT,
606 .flags = IORESOURCE_IRQ,
609 .start = AU1300_DSCR_CMD0_SDMS_TX0,
610 .end = AU1300_DSCR_CMD0_SDMS_TX0,
611 .flags = IORESOURCE_DMA,
614 .start = AU1300_DSCR_CMD0_SDMS_RX0,
615 .end = AU1300_DSCR_CMD0_SDMS_RX0,
616 .flags = IORESOURCE_DMA,
620 static struct platform_device db1300_sd0_dev = {
622 .platform_data = &db1300_sd0_platdata,
624 .name = "au1xxx-mmc",
626 .resource = au1300_sd0_res,
627 .num_resources = ARRAY_SIZE(au1300_sd0_res),
630 /**********************************************************************/
632 static struct platform_device db1300_wm9715_dev = {
633 .name = "wm9712-codec",
634 .id = 1, /* ID of PSC for AC97 audio, see asoc glue! */
637 static struct platform_device db1300_ac97dma_dev = {
638 .name = "au1xpsc-pcm",
639 .id = 1, /* PSC ID */
642 static struct platform_device db1300_i2sdma_dev = {
643 .name = "au1xpsc-pcm",
644 .id = 2, /* PSC ID */
647 static struct platform_device db1300_sndac97_dev = {
648 .name = "db1300-ac97",
651 static struct platform_device db1300_sndi2s_dev = {
652 .name = "db1300-i2s",
655 /**********************************************************************/
657 static int db1300fb_panel_index(void)
659 return 9; /* DB1300_800x480 */
662 static int db1300fb_panel_init(void)
664 /* Apply power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
665 bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD,
670 static int db1300fb_panel_shutdown(void)
672 /* Remove power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
673 bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDBL,
674 BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD);
678 static struct au1200fb_platdata db1300fb_pd = {
679 .panel_index = db1300fb_panel_index,
680 .panel_init = db1300fb_panel_init,
681 .panel_shutdown = db1300fb_panel_shutdown,
684 static struct resource au1300_lcd_res[] = {
686 .start = AU1200_LCD_PHYS_ADDR,
687 .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1,
688 .flags = IORESOURCE_MEM,
691 .start = AU1300_LCD_INT,
692 .end = AU1300_LCD_INT,
693 .flags = IORESOURCE_IRQ,
697 static u64 au1300_lcd_dmamask = DMA_BIT_MASK(32);
699 static struct platform_device db1300_lcd_dev = {
700 .name = "au1200-lcd",
703 .dma_mask = &au1300_lcd_dmamask,
704 .coherent_dma_mask = DMA_BIT_MASK(32),
705 .platform_data = &db1300fb_pd,
707 .num_resources = ARRAY_SIZE(au1300_lcd_res),
708 .resource = au1300_lcd_res,
711 /**********************************************************************/
713 static void db1300_wm97xx_irqen(struct wm97xx *wm, int enable)
716 enable_irq(DB1300_AC97_PEN_INT);
718 disable_irq_nosync(DB1300_AC97_PEN_INT);
721 static struct wm97xx_mach_ops db1300_wm97xx_ops = {
722 .irq_enable = db1300_wm97xx_irqen,
723 .irq_gpio = WM97XX_GPIO_3,
726 static int db1300_wm97xx_probe(struct platform_device *pdev)
728 struct wm97xx *wm = platform_get_drvdata(pdev);
730 /* external pendown indicator */
731 wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN,
732 WM97XX_GPIO_POL_LOW, WM97XX_GPIO_STICKY,
735 /* internal "virtual" pendown gpio */
736 wm97xx_config_gpio(wm, WM97XX_GPIO_3, WM97XX_GPIO_OUT,
737 WM97XX_GPIO_POL_LOW, WM97XX_GPIO_NOTSTICKY,
740 wm->pen_irq = DB1300_AC97_PEN_INT;
742 return wm97xx_register_mach_ops(wm, &db1300_wm97xx_ops);
745 static struct platform_driver db1300_wm97xx_driver = {
746 .driver.name = "wm97xx-touch",
747 .driver.owner = THIS_MODULE,
748 .probe = db1300_wm97xx_probe,
751 /**********************************************************************/
753 static struct platform_device *db1300_dev[] __initdata = {
771 int __init db1300_dev_setup(void)
773 int swapped, cpldirq;
776 /* setup CPLD IRQ muxer */
777 cpldirq = au1300_gpio_to_irq(AU1300_PIN_EXTCLK1);
778 irq_set_irq_type(cpldirq, IRQ_TYPE_LEVEL_HIGH);
779 bcsr_init_irq(DB1300_FIRST_INT, DB1300_LAST_INT, cpldirq);
781 /* insert/eject IRQs: one always triggers so don't enable them
782 * when doing request_irq() on them. DB1200 has this bug too.
784 irq_set_status_flags(DB1300_SD1_INSERT_INT, IRQ_NOAUTOEN);
785 irq_set_status_flags(DB1300_SD1_EJECT_INT, IRQ_NOAUTOEN);
786 irq_set_status_flags(DB1300_CF_INSERT_INT, IRQ_NOAUTOEN);
787 irq_set_status_flags(DB1300_CF_EJECT_INT, IRQ_NOAUTOEN);
792 prom_get_ethernet_addr(&db1300_eth_config.mac[0]);
794 i2c_register_board_info(0, db1300_i2c_devs,
795 ARRAY_SIZE(db1300_i2c_devs));
797 if (platform_driver_register(&db1300_wm97xx_driver))
798 pr_warn("DB1300: failed to init touch pen irq support!\n");
800 /* Audio PSC clock is supplied by codecs (PSC1, 2) */
801 __raw_writel(PSC_SEL_CLK_SERCLK,
802 (void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
804 __raw_writel(PSC_SEL_CLK_SERCLK,
805 (void __iomem *)KSEG1ADDR(AU1300_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET);
807 /* I2C driver wants 50MHz, get as close as possible */
808 c = clk_get(NULL, "psc3_intclk");
810 clk_set_rate(c, 50000000);
811 clk_prepare_enable(c);
814 __raw_writel(PSC_SEL_CLK_INTCLK,
815 (void __iomem *)KSEG1ADDR(AU1300_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET);
818 /* enable power to USB ports */
819 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_USBHPWR | BCSR_RESETS_OTGPWR);
821 /* although it is socket #0, it uses the CPLD bits which previous boards
822 * have used for socket #1.
824 db1x_register_pcmcia_socket(
825 AU1000_PCMCIA_ATTR_PHYS_ADDR,
826 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x00400000 - 1,
827 AU1000_PCMCIA_MEM_PHYS_ADDR,
828 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x00400000 - 1,
829 AU1000_PCMCIA_IO_PHYS_ADDR,
830 AU1000_PCMCIA_IO_PHYS_ADDR + 0x00010000 - 1,
831 DB1300_CF_INT, DB1300_CF_INSERT_INT, 0, DB1300_CF_EJECT_INT, 1);
833 swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
834 db1x_register_norflash(64 << 20, 2, swapped);
836 return platform_add_devices(db1300_dev, ARRAY_SIZE(db1300_dev));
840 int __init db1300_board_setup(void)
842 unsigned short whoami;
844 bcsr_init(DB1300_BCSR_PHYS_ADDR,
845 DB1300_BCSR_PHYS_ADDR + DB1300_BCSR_HEXLED_OFS);
847 whoami = bcsr_read(BCSR_WHOAMI);
848 if (BCSR_WHOAMI_BOARD(whoami) != BCSR_WHOAMI_DB1300)
851 db1300_gpio_config();
853 printk(KERN_INFO "NetLogic DBAu1300 Development Platform.\n\t"
854 "BoardID %d CPLD Rev %d DaughtercardID %d\n",
855 BCSR_WHOAMI_BOARD(whoami), BCSR_WHOAMI_CPLD(whoami),
856 BCSR_WHOAMI_DCID(whoami));
858 /* enable UARTs, YAMON only enables #2 */
859 alchemy_uart_enable(AU1300_UART0_PHYS_ADDR);
860 alchemy_uart_enable(AU1300_UART1_PHYS_ADDR);
861 alchemy_uart_enable(AU1300_UART3_PHYS_ADDR);