GNU Linux-libre 5.4.200-gnu1
[releases.git] / arch / mips / alchemy / board-xxs1500.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * BRIEF MODULE DESCRIPTION
4  *      MyCable XXS1500 board support
5  *
6  * Copyright 2003, 2008 MontaVista Software Inc.
7  * Author: MontaVista Software, Inc. <source@mvista.com>
8  */
9
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/interrupt.h>
13 #include <linux/platform_device.h>
14 #include <linux/gpio.h>
15 #include <linux/delay.h>
16 #include <linux/pm.h>
17 #include <asm/bootinfo.h>
18 #include <asm/reboot.h>
19 #include <asm/setup.h>
20 #include <asm/mach-au1x00/au1000.h>
21 #include <asm/mach-au1x00/gpio-au1000.h>
22 #include <prom.h>
23
24 const char *get_system_type(void)
25 {
26         return "XXS1500";
27 }
28
29 void __init prom_init(void)
30 {
31         unsigned char *memsize_str;
32         unsigned long memsize;
33
34         prom_argc = fw_arg0;
35         prom_argv = (char **)fw_arg1;
36         prom_envp = (char **)fw_arg2;
37
38         prom_init_cmdline();
39
40         memsize_str = prom_getenv("memsize");
41         if (!memsize_str || kstrtoul(memsize_str, 0, &memsize))
42                 memsize = 0x04000000;
43
44         add_memory_region(0, memsize, BOOT_MEM_RAM);
45 }
46
47 void prom_putchar(char c)
48 {
49         alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
50 }
51
52 static void xxs1500_reset(char *c)
53 {
54         /* Jump to the reset vector */
55         __asm__ __volatile__("jr\t%0" : : "r"(0xbfc00000));
56 }
57
58 static void xxs1500_power_off(void)
59 {
60         while (1)
61                 asm volatile (
62                 "       .set    mips32                                  \n"
63                 "       wait                                            \n"
64                 "       .set    mips0                                   \n");
65 }
66
67 void __init board_setup(void)
68 {
69         u32 pin_func;
70
71         pm_power_off = xxs1500_power_off;
72         _machine_halt = xxs1500_power_off;
73         _machine_restart = xxs1500_reset;
74
75         alchemy_gpio1_input_enable();
76         alchemy_gpio2_enable();
77
78         /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
79         pin_func  = alchemy_rdsys(AU1000_SYS_PINFUNC) & ~SYS_PF_UR3;
80         pin_func |= SYS_PF_UR3;
81         alchemy_wrsys(pin_func, AU1000_SYS_PINFUNC);
82
83         /* Enable UART */
84         alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
85         /* Enable DTR (MCR bit 0) = USB power up */
86         __raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18));
87         wmb();
88 }
89
90 /******************************************************************************/
91
92 static struct resource xxs1500_pcmcia_res[] = {
93         {
94                 .name   = "pcmcia-io",
95                 .flags  = IORESOURCE_MEM,
96                 .start  = AU1000_PCMCIA_IO_PHYS_ADDR,
97                 .end    = AU1000_PCMCIA_IO_PHYS_ADDR + 0x000400000 - 1,
98         },
99         {
100                 .name   = "pcmcia-attr",
101                 .flags  = IORESOURCE_MEM,
102                 .start  = AU1000_PCMCIA_ATTR_PHYS_ADDR,
103                 .end    = AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
104         },
105         {
106                 .name   = "pcmcia-mem",
107                 .flags  = IORESOURCE_MEM,
108                 .start  = AU1000_PCMCIA_MEM_PHYS_ADDR,
109                 .end    = AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
110         },
111 };
112
113 static struct platform_device xxs1500_pcmcia_dev = {
114         .name           = "xxs1500_pcmcia",
115         .id             = -1,
116         .num_resources  = ARRAY_SIZE(xxs1500_pcmcia_res),
117         .resource       = xxs1500_pcmcia_res,
118 };
119
120 static struct platform_device *xxs1500_devs[] __initdata = {
121         &xxs1500_pcmcia_dev,
122 };
123
124 static int __init xxs1500_dev_init(void)
125 {
126         irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_HIGH);
127         irq_set_irq_type(AU1500_GPIO201_INT, IRQ_TYPE_LEVEL_LOW);
128         irq_set_irq_type(AU1500_GPIO202_INT, IRQ_TYPE_LEVEL_LOW);
129         irq_set_irq_type(AU1500_GPIO203_INT, IRQ_TYPE_LEVEL_LOW);
130         irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);
131         irq_set_irq_type(AU1500_GPIO207_INT, IRQ_TYPE_LEVEL_LOW);
132
133         irq_set_irq_type(AU1500_GPIO0_INT, IRQ_TYPE_LEVEL_LOW);
134         irq_set_irq_type(AU1500_GPIO1_INT, IRQ_TYPE_LEVEL_LOW);
135         irq_set_irq_type(AU1500_GPIO2_INT, IRQ_TYPE_LEVEL_LOW);
136         irq_set_irq_type(AU1500_GPIO3_INT, IRQ_TYPE_LEVEL_LOW);
137         irq_set_irq_type(AU1500_GPIO4_INT, IRQ_TYPE_LEVEL_LOW); /* CF irq */
138         irq_set_irq_type(AU1500_GPIO5_INT, IRQ_TYPE_LEVEL_LOW);
139
140         return platform_add_devices(xxs1500_devs,
141                                     ARRAY_SIZE(xxs1500_devs));
142 }
143 device_initcall(xxs1500_dev_init);