1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_CPU_FINALIZE_INIT
8 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
9 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
10 select ARCH_HAS_FORTIFY_SOURCE
12 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
13 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
14 select ARCH_HAS_STRNCPY_FROM_USER
15 select ARCH_HAS_STRNLEN_USER
16 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
17 select ARCH_HAS_UBSAN_SANITIZE_ALL
18 select ARCH_HAS_GCOV_PROFILE_ALL
19 select ARCH_KEEP_MEMBLOCK
20 select ARCH_SUPPORTS_UPROBES
21 select ARCH_USE_BUILTIN_BSWAP
22 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
23 select ARCH_USE_MEMTEST
24 select ARCH_USE_QUEUED_RWLOCKS
25 select ARCH_USE_QUEUED_SPINLOCKS
26 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
27 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
28 select ARCH_WANT_IPC_PARSE_VERSION
29 select ARCH_WANT_LD_ORPHAN_WARN
30 select BUILDTIME_TABLE_SORT
31 select CLONE_BACKWARDS
32 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
33 select CPU_PM if CPU_IDLE
34 select GENERIC_ATOMIC64 if !64BIT
35 select GENERIC_CMOS_UPDATE
36 select GENERIC_CPU_AUTOPROBE
37 select GENERIC_GETTIMEOFDAY
39 select GENERIC_IRQ_PROBE
40 select GENERIC_IRQ_SHOW
41 select GENERIC_ISA_DMA if EISA
42 select GENERIC_LIB_ASHLDI3
43 select GENERIC_LIB_ASHRDI3
44 select GENERIC_LIB_CMPDI2
45 select GENERIC_LIB_LSHRDI3
46 select GENERIC_LIB_UCMPDI2
47 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
48 select GENERIC_SMP_IDLE_THREAD
49 select GENERIC_TIME_VSYSCALL
50 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
51 select HAVE_ARCH_COMPILER_H
52 select HAVE_ARCH_JUMP_LABEL
53 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
54 select HAVE_ARCH_MMAP_RND_BITS if MMU
55 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
56 select HAVE_ARCH_SECCOMP_FILTER
57 select HAVE_ARCH_TRACEHOOK
58 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
59 select HAVE_ASM_MODVERSIONS
60 select HAVE_CONTEXT_TRACKING_USER
62 select HAVE_C_RECORDMCOUNT
63 select HAVE_DEBUG_KMEMLEAK
64 select HAVE_DEBUG_STACKOVERFLOW
65 select HAVE_DMA_CONTIGUOUS
66 select HAVE_DYNAMIC_FTRACE
67 select HAVE_EBPF_JIT if !CPU_MICROMIPS && \
68 !CPU_DADDI_WORKAROUNDS && \
69 !CPU_R4000_WORKAROUNDS && \
70 !CPU_R4400_WORKAROUNDS
71 select HAVE_EXIT_THREAD
73 select HAVE_FTRACE_MCOUNT_RECORD
74 select HAVE_FUNCTION_GRAPH_TRACER
75 select HAVE_FUNCTION_TRACER
76 select HAVE_GCC_PLUGINS
77 select HAVE_GENERIC_VDSO
78 select HAVE_IOREMAP_PROT
79 select HAVE_IRQ_EXIT_ON_IRQ_STACK
80 select HAVE_IRQ_TIME_ACCOUNTING
82 select HAVE_KRETPROBES
83 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
84 select HAVE_MOD_ARCH_SPECIFIC
86 select HAVE_PERF_EVENTS
88 select HAVE_PERF_USER_STACK_DUMP
89 select HAVE_REGS_AND_STACK_ACCESS_API
91 select HAVE_SPARSE_SYSCALL_NR
92 select HAVE_STACKPROTECTOR
93 select HAVE_SYSCALL_TRACEPOINTS
94 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
95 select IRQ_FORCED_THREADING
97 select LOCK_MM_AND_FIND_VMA
98 select MODULES_USE_ELF_REL if MODULES
99 select MODULES_USE_ELF_RELA if MODULES && 64BIT
100 select PERF_USE_VMALLOC
101 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
103 select SYSCTL_EXCEPTION_TRACE
104 select TRACE_IRQFLAGS_SUPPORT
105 select ARCH_HAS_ELFCORE_COMPAT
106 select HAVE_ARCH_KCSAN if 64BIT
108 config MIPS_FIXUP_BIGPHYS_ADDR
116 select SYS_SUPPORTS_32BIT_KERNEL
117 select SYS_SUPPORTS_LITTLE_ENDIAN
118 select SYS_SUPPORTS_ZBOOT
119 select DMA_NONCOHERENT
120 select ARCH_HAS_SYNC_DMA_FOR_CPU
125 select GENERIC_IRQ_CHIP
126 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
128 select CPU_SUPPORTS_CPUFREQ
129 select MIPS_EXTERNAL_TIMER
131 menu "Machine selection"
135 default MIPS_GENERIC_KERNEL
137 config MIPS_GENERIC_KERNEL
138 bool "Generic board-agnostic MIPS kernel"
139 select ARCH_HAS_SETUP_DMA_OPS
144 select CLKSRC_MIPS_GIC
146 select CPU_MIPSR2_IRQ_EI
147 select CPU_MIPSR2_IRQ_VI
149 select DMA_NONCOHERENT
152 select MIPS_AUTO_PFN_OFFSET
153 select MIPS_CPU_SCACHE
155 select MIPS_L1_CACHE_SHIFT_7
156 select NO_EXCEPT_FILL
157 select PCI_DRIVERS_GENERIC
160 select SYS_HAS_CPU_MIPS32_R1
161 select SYS_HAS_CPU_MIPS32_R2
162 select SYS_HAS_CPU_MIPS32_R6
163 select SYS_HAS_CPU_MIPS64_R1
164 select SYS_HAS_CPU_MIPS64_R2
165 select SYS_HAS_CPU_MIPS64_R6
166 select SYS_SUPPORTS_32BIT_KERNEL
167 select SYS_SUPPORTS_64BIT_KERNEL
168 select SYS_SUPPORTS_BIG_ENDIAN
169 select SYS_SUPPORTS_HIGHMEM
170 select SYS_SUPPORTS_LITTLE_ENDIAN
171 select SYS_SUPPORTS_MICROMIPS
172 select SYS_SUPPORTS_MIPS16
173 select SYS_SUPPORTS_MIPS_CPS
174 select SYS_SUPPORTS_MULTITHREADING
175 select SYS_SUPPORTS_RELOCATABLE
176 select SYS_SUPPORTS_SMARTMIPS
177 select SYS_SUPPORTS_ZBOOT
179 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
180 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
181 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
182 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
183 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
184 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
187 Select this to build a kernel which aims to support multiple boards,
188 generally using a flattened device tree passed from the bootloader
189 using the boot protocol defined in the UHI (Unified Hosting
190 Interface) specification.
193 bool "Alchemy processor based machines"
194 select PHYS_ADDR_T_64BIT
198 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
199 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
200 select SYS_HAS_CPU_MIPS32_R1
201 select SYS_SUPPORTS_32BIT_KERNEL
202 select SYS_SUPPORTS_APM_EMULATION
204 select SYS_SUPPORTS_ZBOOT
208 bool "Texas Instruments AR7"
211 select DMA_NONCOHERENT
215 select NO_EXCEPT_FILL
217 select SYS_HAS_CPU_MIPS32_R1
218 select SYS_HAS_EARLY_PRINTK
219 select SYS_SUPPORTS_32BIT_KERNEL
220 select SYS_SUPPORTS_LITTLE_ENDIAN
221 select SYS_SUPPORTS_MIPS16
222 select SYS_SUPPORTS_ZBOOT_UART16550
226 Support for the Texas Instruments AR7 System-on-a-Chip
227 family: TNETD7100, 7200 and 7300.
230 bool "Atheros AR231x/AR531x SoC support"
233 select DMA_NONCOHERENT
236 select SYS_HAS_CPU_MIPS32_R1
237 select SYS_SUPPORTS_BIG_ENDIAN
238 select SYS_SUPPORTS_32BIT_KERNEL
239 select SYS_HAS_EARLY_PRINTK
241 Support for Atheros AR231x and Atheros AR531x based boards
244 bool "Atheros AR71XX/AR724X/AR913X based boards"
245 select ARCH_HAS_RESET_CONTROLLER
249 select DMA_NONCOHERENT
254 select SYS_HAS_CPU_MIPS32_R2
255 select SYS_HAS_EARLY_PRINTK
256 select SYS_SUPPORTS_32BIT_KERNEL
257 select SYS_SUPPORTS_BIG_ENDIAN
258 select SYS_SUPPORTS_MIPS16
259 select SYS_SUPPORTS_ZBOOT_UART_PROM
261 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
263 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
266 bool "Broadcom Generic BMIPS kernel"
267 select ARCH_HAS_RESET_CONTROLLER
268 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
270 select NO_EXCEPT_FILL
276 select BCM6345_L1_IRQ
277 select BCM7038_L1_IRQ
278 select BCM7120_L2_IRQ
279 select BRCMSTB_L2_IRQ
281 select DMA_NONCOHERENT
282 select SYS_SUPPORTS_32BIT_KERNEL
283 select SYS_SUPPORTS_LITTLE_ENDIAN
284 select SYS_SUPPORTS_BIG_ENDIAN
285 select SYS_SUPPORTS_HIGHMEM
286 select SYS_HAS_CPU_BMIPS32_3300
287 select SYS_HAS_CPU_BMIPS4350
288 select SYS_HAS_CPU_BMIPS4380
289 select SYS_HAS_CPU_BMIPS5000
291 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
292 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
293 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
294 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
295 select HARDIRQS_SW_RESEND
297 select PCI_DRIVERS_GENERIC
300 Build a generic DT-based kernel image that boots on select
301 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
302 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
303 must be set appropriately for your board.
306 bool "Broadcom BCM47XX based boards"
310 select DMA_NONCOHERENT
313 select SYS_HAS_CPU_MIPS32_R1
314 select NO_EXCEPT_FILL
315 select SYS_SUPPORTS_32BIT_KERNEL
316 select SYS_SUPPORTS_LITTLE_ENDIAN
317 select SYS_SUPPORTS_MIPS16
318 select SYS_SUPPORTS_ZBOOT
319 select SYS_HAS_EARLY_PRINTK
320 select USE_GENERIC_EARLY_PRINTK_8250
322 select LEDS_GPIO_REGISTER
325 select BCM47XX_SSB if !BCM47XX_BCMA
327 Support for BCM47XX based boards
330 bool "Broadcom BCM63XX based boards"
335 select DMA_NONCOHERENT
337 select SYS_SUPPORTS_32BIT_KERNEL
338 select SYS_SUPPORTS_BIG_ENDIAN
339 select SYS_HAS_EARLY_PRINTK
340 select SYS_HAS_CPU_BMIPS32_3300
341 select SYS_HAS_CPU_BMIPS4350
342 select SYS_HAS_CPU_BMIPS4380
345 select MIPS_L1_CACHE_SHIFT_4
346 select HAVE_LEGACY_CLK
348 Support for BCM63XX based boards
355 select DMA_NONCOHERENT
361 select PCI_GT64XXX_PCI0
362 select SYS_HAS_CPU_NEVADA
363 select SYS_HAS_EARLY_PRINTK
364 select SYS_SUPPORTS_32BIT_KERNEL
365 select SYS_SUPPORTS_64BIT_KERNEL
366 select SYS_SUPPORTS_LITTLE_ENDIAN
367 select USE_GENERIC_EARLY_PRINTK_8250
369 config MACH_DECSTATION
373 select CEVT_R4K if CPU_R4X00
375 select CSRC_R4K if CPU_R4X00
376 select CPU_DADDI_WORKAROUNDS if 64BIT
377 select CPU_R4000_WORKAROUNDS if 64BIT
378 select CPU_R4400_WORKAROUNDS if 64BIT
379 select DMA_NONCOHERENT
382 select SYS_HAS_CPU_R3000
383 select SYS_HAS_CPU_R4X00
384 select SYS_SUPPORTS_32BIT_KERNEL
385 select SYS_SUPPORTS_64BIT_KERNEL
386 select SYS_SUPPORTS_LITTLE_ENDIAN
387 select SYS_SUPPORTS_128HZ
388 select SYS_SUPPORTS_256HZ
389 select SYS_SUPPORTS_1024HZ
390 select MIPS_L1_CACHE_SHIFT_4
392 This enables support for DEC's MIPS based workstations. For details
393 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
394 DECstation porting pages on <http://decstation.unix-ag.org/>.
396 If you have one of the following DECstation Models you definitely
397 want to choose R4xx0 for the CPU Type:
404 otherwise choose R3000.
407 bool "Jazz family of machines"
410 select ARCH_MIGHT_HAVE_PC_PARPORT
411 select ARCH_MIGHT_HAVE_PC_SERIO
415 select ARCH_MAY_HAVE_PC_FDC
418 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
419 select GENERIC_ISA_DMA
420 select HAVE_PCSPKR_PLATFORM
425 select SYS_HAS_CPU_R4X00
426 select SYS_SUPPORTS_32BIT_KERNEL
427 select SYS_SUPPORTS_64BIT_KERNEL
428 select SYS_SUPPORTS_100HZ
429 select SYS_SUPPORTS_LITTLE_ENDIAN
431 This a family of machines based on the MIPS R4030 chipset which was
432 used by several vendors to build RISC/os and Windows NT workstations.
433 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
434 Olivetti M700-10 workstations.
436 config MACH_INGENIC_SOC
437 bool "Ingenic SoC based machines"
440 select SYS_SUPPORTS_ZBOOT_UART16550
441 select CPU_SUPPORTS_CPUFREQ
442 select MIPS_EXTERNAL_TIMER
445 bool "Lantiq based platforms"
446 select DMA_NONCOHERENT
450 select SYS_HAS_CPU_MIPS32_R1
451 select SYS_HAS_CPU_MIPS32_R2
452 select SYS_SUPPORTS_BIG_ENDIAN
453 select SYS_SUPPORTS_32BIT_KERNEL
454 select SYS_SUPPORTS_MIPS16
455 select SYS_SUPPORTS_MULTITHREADING
456 select SYS_SUPPORTS_VPE_LOADER
457 select SYS_HAS_EARLY_PRINTK
461 select HAVE_LEGACY_CLK
464 select PINCTRL_LANTIQ
465 select ARCH_HAS_RESET_CONTROLLER
466 select RESET_CONTROLLER
468 config MACH_LOONGSON32
469 bool "Loongson 32-bit family of machines"
470 select SYS_SUPPORTS_ZBOOT
472 This enables support for the Loongson-1 family of machines.
474 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
475 the Institute of Computing Technology (ICT), Chinese Academy of
478 config MACH_LOONGSON2EF
479 bool "Loongson-2E/F family of machines"
480 select SYS_SUPPORTS_ZBOOT
482 This enables the support of early Loongson-2E/F family of machines.
484 config MACH_LOONGSON64
485 bool "Loongson 64-bit family of machines"
486 select ARCH_DMA_DEFAULT_COHERENT
487 select ARCH_SPARSEMEM_ENABLE
488 select ARCH_MIGHT_HAVE_PC_PARPORT
489 select ARCH_MIGHT_HAVE_PC_SERIO
490 select GENERIC_ISA_DMA_SUPPORT_BROKEN
500 select NO_EXCEPT_FILL
501 select NR_CPUS_DEFAULT_64
502 select USE_GENERIC_EARLY_PRINTK_8250
503 select PCI_DRIVERS_GENERIC
504 select SYS_HAS_CPU_LOONGSON64
505 select SYS_HAS_EARLY_PRINTK
506 select SYS_SUPPORTS_SMP
507 select SYS_SUPPORTS_HOTPLUG_CPU
508 select SYS_SUPPORTS_NUMA
509 select SYS_SUPPORTS_64BIT_KERNEL
510 select SYS_SUPPORTS_HIGHMEM
511 select SYS_SUPPORTS_LITTLE_ENDIAN
512 select SYS_SUPPORTS_ZBOOT
513 select SYS_SUPPORTS_RELOCATABLE
518 select PCI_HOST_GENERIC
519 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
521 This enables the support of Loongson-2/3 family of machines.
523 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
524 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
525 and Loongson-2F which will be removed), developed by the Institute
526 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
529 bool "MIPS Malta board"
530 select ARCH_MAY_HAVE_PC_FDC
531 select ARCH_MIGHT_HAVE_PC_PARPORT
532 select ARCH_MIGHT_HAVE_PC_SERIO
537 select CLKSRC_MIPS_GIC
540 select DMA_NONCOHERENT
541 select GENERIC_ISA_DMA
542 select HAVE_PCSPKR_PLATFORM
548 select MIPS_CPU_SCACHE
550 select MIPS_L1_CACHE_SHIFT_6
552 select PCI_GT64XXX_PCI0
555 select SYS_HAS_CPU_MIPS32_R1
556 select SYS_HAS_CPU_MIPS32_R2
557 select SYS_HAS_CPU_MIPS32_R3_5
558 select SYS_HAS_CPU_MIPS32_R5
559 select SYS_HAS_CPU_MIPS32_R6
560 select SYS_HAS_CPU_MIPS64_R1
561 select SYS_HAS_CPU_MIPS64_R2
562 select SYS_HAS_CPU_MIPS64_R6
563 select SYS_HAS_CPU_NEVADA
564 select SYS_HAS_CPU_RM7000
565 select SYS_SUPPORTS_32BIT_KERNEL
566 select SYS_SUPPORTS_64BIT_KERNEL
567 select SYS_SUPPORTS_BIG_ENDIAN
568 select SYS_SUPPORTS_HIGHMEM
569 select SYS_SUPPORTS_LITTLE_ENDIAN
570 select SYS_SUPPORTS_MICROMIPS
571 select SYS_SUPPORTS_MIPS16
572 select SYS_SUPPORTS_MIPS_CMP
573 select SYS_SUPPORTS_MIPS_CPS
574 select SYS_SUPPORTS_MULTITHREADING
575 select SYS_SUPPORTS_RELOCATABLE
576 select SYS_SUPPORTS_SMARTMIPS
577 select SYS_SUPPORTS_VPE_LOADER
578 select SYS_SUPPORTS_ZBOOT
580 select WAR_ICACHE_REFILLS
581 select ZONE_DMA32 if 64BIT
583 This enables support for the MIPS Technologies Malta evaluation
587 bool "Microchip PIC32 Family"
589 This enables support for the Microchip PIC32 family of platforms.
591 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
594 config MACH_NINTENDO64
595 bool "Nintendo 64 console"
598 select SYS_HAS_CPU_R4300
599 select SYS_SUPPORTS_BIG_ENDIAN
600 select SYS_SUPPORTS_ZBOOT
601 select SYS_SUPPORTS_32BIT_KERNEL
602 select SYS_SUPPORTS_64BIT_KERNEL
603 select DMA_NONCOHERENT
607 bool "Ralink based machines"
612 select DMA_NONCOHERENT
615 select SYS_HAS_CPU_MIPS32_R1
616 select SYS_HAS_CPU_MIPS32_R2
617 select SYS_SUPPORTS_32BIT_KERNEL
618 select SYS_SUPPORTS_LITTLE_ENDIAN
619 select SYS_SUPPORTS_MIPS16
620 select SYS_SUPPORTS_ZBOOT
621 select SYS_HAS_EARLY_PRINTK
622 select ARCH_HAS_RESET_CONTROLLER
623 select RESET_CONTROLLER
625 config MACH_REALTEK_RTL
626 bool "Realtek RTL838x/RTL839x based machines"
628 select DMA_NONCOHERENT
632 select SYS_HAS_CPU_MIPS32_R1
633 select SYS_HAS_CPU_MIPS32_R2
634 select SYS_SUPPORTS_BIG_ENDIAN
635 select SYS_SUPPORTS_32BIT_KERNEL
636 select SYS_SUPPORTS_MIPS16
637 select SYS_SUPPORTS_MULTITHREADING
638 select SYS_SUPPORTS_VPE_LOADER
644 bool "SGI IP22 (Indy/Indigo2)"
649 select ARCH_MIGHT_HAVE_PC_SERIO
653 select DEFAULT_SGI_PARTITION
654 select DMA_NONCOHERENT
658 select IP22_CPU_SCACHE
660 select GENERIC_ISA_DMA_SUPPORT_BROKEN
662 select SGI_HAS_INDYDOG
668 select SYS_HAS_CPU_R4X00
669 select SYS_HAS_CPU_R5000
670 select SYS_HAS_EARLY_PRINTK
671 select SYS_SUPPORTS_32BIT_KERNEL
672 select SYS_SUPPORTS_64BIT_KERNEL
673 select SYS_SUPPORTS_BIG_ENDIAN
674 select WAR_R4600_V1_INDEX_ICACHEOP
675 select WAR_R4600_V1_HIT_CACHEOP
676 select WAR_R4600_V2_HIT_CACHEOP
677 select MIPS_L1_CACHE_SHIFT_7
679 This are the SGI Indy, Challenge S and Indigo2, as well as certain
680 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
681 that runs on these, say Y here.
684 bool "SGI IP27 (Origin200/2000)"
685 select ARCH_HAS_PHYS_TO_DMA
686 select ARCH_SPARSEMEM_ENABLE
689 select ARC_CMDLINE_ONLY
691 select DEFAULT_SGI_PARTITION
693 select SYS_HAS_EARLY_PRINTK
696 select IRQ_DOMAIN_HIERARCHY
697 select NR_CPUS_DEFAULT_64
698 select PCI_DRIVERS_GENERIC
699 select PCI_XTALK_BRIDGE
700 select SYS_HAS_CPU_R10000
701 select SYS_SUPPORTS_64BIT_KERNEL
702 select SYS_SUPPORTS_BIG_ENDIAN
703 select SYS_SUPPORTS_NUMA
704 select SYS_SUPPORTS_SMP
705 select WAR_R10000_LLSC
706 select MIPS_L1_CACHE_SHIFT_7
708 select HAVE_ARCH_NODEDATA_EXTENSION
710 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
711 workstations. To compile a Linux kernel that runs on these, say Y
715 bool "SGI IP28 (Indigo2 R10k)"
720 select ARCH_MIGHT_HAVE_PC_SERIO
724 select DEFAULT_SGI_PARTITION
725 select DMA_NONCOHERENT
726 select GENERIC_ISA_DMA_SUPPORT_BROKEN
732 select SGI_HAS_INDYDOG
738 select SYS_HAS_CPU_R10000
739 select SYS_HAS_EARLY_PRINTK
740 select SYS_SUPPORTS_64BIT_KERNEL
741 select SYS_SUPPORTS_BIG_ENDIAN
742 select WAR_R10000_LLSC
743 select MIPS_L1_CACHE_SHIFT_7
745 This is the SGI Indigo2 with R10000 processor. To compile a Linux
746 kernel that runs on these, say Y here.
749 bool "SGI IP30 (Octane/Octane2)"
750 select ARCH_HAS_PHYS_TO_DMA
757 select SYNC_R4K if SMP
761 select IRQ_DOMAIN_HIERARCHY
762 select PCI_DRIVERS_GENERIC
763 select PCI_XTALK_BRIDGE
764 select SYS_HAS_EARLY_PRINTK
765 select SYS_HAS_CPU_R10000
766 select SYS_SUPPORTS_64BIT_KERNEL
767 select SYS_SUPPORTS_BIG_ENDIAN
768 select SYS_SUPPORTS_SMP
769 select WAR_R10000_LLSC
770 select MIPS_L1_CACHE_SHIFT_7
773 These are the SGI Octane and Octane2 graphics workstations. To
774 compile a Linux kernel that runs on these, say Y here.
780 select ARCH_HAS_PHYS_TO_DMA
786 select DMA_NONCOHERENT
789 select R5000_CPU_SCACHE
790 select RM7000_CPU_SCACHE
791 select SYS_HAS_CPU_R5000
792 select SYS_HAS_CPU_R10000 if BROKEN
793 select SYS_HAS_CPU_RM7000
794 select SYS_HAS_CPU_NEVADA
795 select SYS_SUPPORTS_64BIT_KERNEL
796 select SYS_SUPPORTS_BIG_ENDIAN
797 select WAR_ICACHE_REFILLS
799 If you want this kernel to run on SGI O2 workstation, say Y here.
802 bool "Sibyte BCM91120C-CRhine"
804 select SIBYTE_BCM1120
806 select SYS_HAS_CPU_SB1
807 select SYS_SUPPORTS_BIG_ENDIAN
808 select SYS_SUPPORTS_LITTLE_ENDIAN
811 bool "Sibyte BCM91120x-Carmel"
813 select SIBYTE_BCM1120
815 select SYS_HAS_CPU_SB1
816 select SYS_SUPPORTS_BIG_ENDIAN
817 select SYS_SUPPORTS_LITTLE_ENDIAN
820 bool "Sibyte BCM91125C-CRhone"
822 select SIBYTE_BCM1125
824 select SYS_HAS_CPU_SB1
825 select SYS_SUPPORTS_BIG_ENDIAN
826 select SYS_SUPPORTS_HIGHMEM
827 select SYS_SUPPORTS_LITTLE_ENDIAN
830 bool "Sibyte BCM91125E-Rhone"
832 select SIBYTE_BCM1125H
834 select SYS_HAS_CPU_SB1
835 select SYS_SUPPORTS_BIG_ENDIAN
836 select SYS_SUPPORTS_LITTLE_ENDIAN
839 bool "Sibyte BCM91250A-SWARM"
841 select HAVE_PATA_PLATFORM
844 select SYS_HAS_CPU_SB1
845 select SYS_SUPPORTS_BIG_ENDIAN
846 select SYS_SUPPORTS_HIGHMEM
847 select SYS_SUPPORTS_LITTLE_ENDIAN
848 select ZONE_DMA32 if 64BIT
849 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
851 config SIBYTE_LITTLESUR
852 bool "Sibyte BCM91250C2-LittleSur"
854 select HAVE_PATA_PLATFORM
857 select SYS_HAS_CPU_SB1
858 select SYS_SUPPORTS_BIG_ENDIAN
859 select SYS_SUPPORTS_HIGHMEM
860 select SYS_SUPPORTS_LITTLE_ENDIAN
861 select ZONE_DMA32 if 64BIT
863 config SIBYTE_SENTOSA
864 bool "Sibyte BCM91250E-Sentosa"
868 select SYS_HAS_CPU_SB1
869 select SYS_SUPPORTS_BIG_ENDIAN
870 select SYS_SUPPORTS_LITTLE_ENDIAN
871 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
874 bool "Sibyte BCM91480B-BigSur"
876 select NR_CPUS_DEFAULT_4
877 select SIBYTE_BCM1x80
879 select SYS_HAS_CPU_SB1
880 select SYS_SUPPORTS_BIG_ENDIAN
881 select SYS_SUPPORTS_HIGHMEM
882 select SYS_SUPPORTS_LITTLE_ENDIAN
883 select ZONE_DMA32 if 64BIT
884 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
887 bool "SNI RM200/300/400"
890 select FW_ARC if CPU_LITTLE_ENDIAN
891 select FW_ARC32 if CPU_LITTLE_ENDIAN
892 select FW_SNIPROM if CPU_BIG_ENDIAN
893 select ARCH_MAY_HAVE_PC_FDC
894 select ARCH_MIGHT_HAVE_PC_PARPORT
895 select ARCH_MIGHT_HAVE_PC_SERIO
899 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
900 select DMA_NONCOHERENT
901 select GENERIC_ISA_DMA
903 select HAVE_PCSPKR_PLATFORM
909 select MIPS_L1_CACHE_SHIFT_6
910 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
911 select SYS_HAS_CPU_R4X00
912 select SYS_HAS_CPU_R5000
913 select SYS_HAS_CPU_R10000
914 select R5000_CPU_SCACHE
915 select SYS_HAS_EARLY_PRINTK
916 select SYS_SUPPORTS_32BIT_KERNEL
917 select SYS_SUPPORTS_64BIT_KERNEL
918 select SYS_SUPPORTS_BIG_ENDIAN
919 select SYS_SUPPORTS_HIGHMEM
920 select SYS_SUPPORTS_LITTLE_ENDIAN
921 select WAR_R4600_V2_HIT_CACHEOP
923 The SNI RM200/300/400 are MIPS-based machines manufactured by
924 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
925 Technology and now in turn merged with Fujitsu. Say Y here to
926 support this machine type.
929 bool "Toshiba TX49 series based machines"
930 select WAR_TX49XX_ICACHE_INDEX_INV
932 config MIKROTIK_RB532
933 bool "Mikrotik RB532 boards"
936 select DMA_NONCOHERENT
939 select SYS_HAS_CPU_MIPS32_R1
940 select SYS_SUPPORTS_32BIT_KERNEL
941 select SYS_SUPPORTS_LITTLE_ENDIAN
945 select MIPS_L1_CACHE_SHIFT_4
947 Support the Mikrotik(tm) RouterBoard 532 series,
948 based on the IDT RC32434 SoC.
950 config CAVIUM_OCTEON_SOC
951 bool "Cavium Networks Octeon SoC based boards"
953 select ARCH_HAS_PHYS_TO_DMA
955 select PHYS_ADDR_T_64BIT
956 select SYS_SUPPORTS_64BIT_KERNEL
957 select SYS_SUPPORTS_BIG_ENDIAN
959 select EDAC_ATOMIC_SCRUB
960 select SYS_SUPPORTS_LITTLE_ENDIAN
961 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
962 select SYS_HAS_EARLY_PRINTK
963 select SYS_HAS_CPU_CAVIUM_OCTEON
965 select HAVE_PLAT_DELAY
966 select HAVE_PLAT_FW_INIT_CMDLINE
967 select HAVE_PLAT_MEMCPY
971 select ARCH_SPARSEMEM_ENABLE
972 select SYS_SUPPORTS_SMP
973 select NR_CPUS_DEFAULT_64
974 select MIPS_NR_CPU_NR_MAP_1024
977 select MTD_COMPLEX_MAPPINGS
979 select SYS_SUPPORTS_RELOCATABLE
981 This option supports all of the Octeon reference boards from Cavium
982 Networks. It builds a kernel that dynamically determines the Octeon
983 CPU type and supports all known board reference implementations.
984 Some of the supported boards are:
991 Say Y here for most Octeon reference boards.
995 source "arch/mips/alchemy/Kconfig"
996 source "arch/mips/ath25/Kconfig"
997 source "arch/mips/ath79/Kconfig"
998 source "arch/mips/bcm47xx/Kconfig"
999 source "arch/mips/bcm63xx/Kconfig"
1000 source "arch/mips/bmips/Kconfig"
1001 source "arch/mips/generic/Kconfig"
1002 source "arch/mips/ingenic/Kconfig"
1003 source "arch/mips/jazz/Kconfig"
1004 source "arch/mips/lantiq/Kconfig"
1005 source "arch/mips/pic32/Kconfig"
1006 source "arch/mips/ralink/Kconfig"
1007 source "arch/mips/sgi-ip27/Kconfig"
1008 source "arch/mips/sibyte/Kconfig"
1009 source "arch/mips/txx9/Kconfig"
1010 source "arch/mips/cavium-octeon/Kconfig"
1011 source "arch/mips/loongson2ef/Kconfig"
1012 source "arch/mips/loongson32/Kconfig"
1013 source "arch/mips/loongson64/Kconfig"
1017 config GENERIC_HWEIGHT
1021 config GENERIC_CALIBRATE_DELAY
1025 config SCHED_OMIT_FRAME_POINTER
1030 # Select some configuration options automatically based on user selections.
1035 config ARCH_MAY_HAVE_PC_FDC
1066 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1072 config MIPS_CLOCK_VSYSCALL
1073 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1082 config ARCH_SUPPORTS_UPROBES
1085 config DMA_PERDEV_COHERENT
1087 select ARCH_HAS_SETUP_DMA_OPS
1088 select DMA_NONCOHERENT
1090 config DMA_NONCOHERENT
1093 # MIPS allows mixing "slightly different" Cacheability and Coherency
1094 # Attribute bits. It is believed that the uncached access through
1095 # KSEG1 and the implementation specific "uncached accelerated" used
1096 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1097 # significant advantages.
1099 select ARCH_HAS_DMA_WRITE_COMBINE
1100 select ARCH_HAS_DMA_PREP_COHERENT
1101 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1102 select ARCH_HAS_DMA_SET_UNCACHED
1103 select DMA_NONCOHERENT_MMAP
1104 select NEED_DMA_MAP_STATE
1106 config SYS_HAS_EARLY_PRINTK
1109 config SYS_SUPPORTS_HOTPLUG_CPU
1112 config MIPS_BONITO64
1121 config NO_IOPORT_MAP
1125 def_bool CPU_NO_LOAD_STORE_LR
1127 config GENERIC_ISA_DMA
1129 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1132 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1134 select GENERIC_ISA_DMA
1136 config HAVE_PLAT_DELAY
1139 config HAVE_PLAT_FW_INIT_CMDLINE
1142 config HAVE_PLAT_MEMCPY
1148 config SYS_SUPPORTS_RELOCATABLE
1151 Selected if the platform supports relocating the kernel.
1152 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1153 to allow access to command line and entropy sources.
1156 # Endianness selection. Sufficiently obscure so many users don't know what to
1157 # answer,so we try hard to limit the available choices. Also the use of a
1158 # choice statement should be more obvious to the user.
1161 prompt "Endianness selection"
1163 Some MIPS machines can be configured for either little or big endian
1164 byte order. These modes require different kernels and a different
1165 Linux distribution. In general there is one preferred byteorder for a
1166 particular system but some systems are just as commonly used in the
1167 one or the other endianness.
1169 config CPU_BIG_ENDIAN
1171 depends on SYS_SUPPORTS_BIG_ENDIAN
1173 config CPU_LITTLE_ENDIAN
1174 bool "Little endian"
1175 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1182 config SYS_SUPPORTS_APM_EMULATION
1185 config SYS_SUPPORTS_BIG_ENDIAN
1188 config SYS_SUPPORTS_LITTLE_ENDIAN
1191 config MIPS_HUGE_TLB_SUPPORT
1192 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1206 config PCI_GT64XXX_PCI0
1209 config PCI_XTALK_BRIDGE
1212 config NO_EXCEPT_FILL
1218 config SWAP_IO_SPACE
1221 config SGI_HAS_INDYDOG
1233 config SGI_HAS_ZILOG
1236 config SGI_HAS_I8042
1239 config DEFAULT_SGI_PARTITION
1251 config MIPS_L1_CACHE_SHIFT_4
1254 config MIPS_L1_CACHE_SHIFT_5
1257 config MIPS_L1_CACHE_SHIFT_6
1260 config MIPS_L1_CACHE_SHIFT_7
1263 config MIPS_L1_CACHE_SHIFT
1265 default "7" if MIPS_L1_CACHE_SHIFT_7
1266 default "6" if MIPS_L1_CACHE_SHIFT_6
1267 default "5" if MIPS_L1_CACHE_SHIFT_5
1268 default "4" if MIPS_L1_CACHE_SHIFT_4
1271 config ARC_CMDLINE_ONLY
1275 bool "ARC console support"
1276 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1290 menu "CPU selection"
1296 config CPU_LOONGSON64
1297 bool "Loongson 64-bit CPU"
1298 depends on SYS_HAS_CPU_LOONGSON64
1299 select ARCH_HAS_PHYS_TO_DMA
1301 select CPU_HAS_PREFETCH
1302 select CPU_SUPPORTS_64BIT_KERNEL
1303 select CPU_SUPPORTS_HIGHMEM
1304 select CPU_SUPPORTS_HUGEPAGES
1305 select CPU_SUPPORTS_MSA
1306 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1307 select CPU_MIPSR2_IRQ_VI
1308 select DMA_NONCOHERENT
1309 select WEAK_ORDERING
1310 select WEAK_REORDERING_BEYOND_LLSC
1311 select MIPS_ASID_BITS_VARIABLE
1312 select MIPS_PGD_C0_CONTEXT
1313 select MIPS_L1_CACHE_SHIFT_6
1314 select MIPS_FP_SUPPORT
1319 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1320 cores implements the MIPS64R2 instruction set with many extensions,
1321 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1322 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1323 Loongson-2E/2F is not covered here and will be removed in future.
1325 config LOONGSON3_ENHANCEMENT
1326 bool "New Loongson-3 CPU Enhancements"
1328 depends on CPU_LOONGSON64
1330 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1331 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1332 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1333 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1334 Fast TLB refill support, etc.
1336 This option enable those enhancements which are not probed at run
1337 time. If you want a generic kernel to run on all Loongson 3 machines,
1338 please say 'N' here. If you want a high-performance kernel to run on
1339 new Loongson-3 machines only, please say 'Y' here.
1341 config CPU_LOONGSON3_WORKAROUNDS
1342 bool "Loongson-3 LLSC Workarounds"
1344 depends on CPU_LOONGSON64
1346 Loongson-3 processors have the llsc issues which require workarounds.
1347 Without workarounds the system may hang unexpectedly.
1349 Say Y, unless you know what you are doing.
1351 config CPU_LOONGSON3_CPUCFG_EMULATION
1352 bool "Emulate the CPUCFG instruction on older Loongson cores"
1354 depends on CPU_LOONGSON64
1356 Loongson-3A R4 and newer have the CPUCFG instruction available for
1357 userland to query CPU capabilities, much like CPUID on x86. This
1358 option provides emulation of the instruction on older Loongson
1359 cores, back to Loongson-3A1000.
1361 If unsure, please say Y.
1363 config CPU_LOONGSON2E
1365 depends on SYS_HAS_CPU_LOONGSON2E
1366 select CPU_LOONGSON2EF
1368 The Loongson 2E processor implements the MIPS III instruction set
1369 with many extensions.
1371 It has an internal FPGA northbridge, which is compatible to
1374 config CPU_LOONGSON2F
1376 depends on SYS_HAS_CPU_LOONGSON2F
1377 select CPU_LOONGSON2EF
1380 The Loongson 2F processor implements the MIPS III instruction set
1381 with many extensions.
1383 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1384 have a similar programming interface with FPGA northbridge used in
1387 config CPU_LOONGSON1B
1389 depends on SYS_HAS_CPU_LOONGSON1B
1390 select CPU_LOONGSON32
1391 select LEDS_GPIO_REGISTER
1393 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1394 Release 1 instruction set and part of the MIPS32 Release 2
1397 config CPU_LOONGSON1C
1399 depends on SYS_HAS_CPU_LOONGSON1C
1400 select CPU_LOONGSON32
1401 select LEDS_GPIO_REGISTER
1403 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1404 Release 1 instruction set and part of the MIPS32 Release 2
1407 config CPU_MIPS32_R1
1408 bool "MIPS32 Release 1"
1409 depends on SYS_HAS_CPU_MIPS32_R1
1410 select CPU_HAS_PREFETCH
1411 select CPU_SUPPORTS_32BIT_KERNEL
1412 select CPU_SUPPORTS_HIGHMEM
1414 Choose this option to build a kernel for release 1 or later of the
1415 MIPS32 architecture. Most modern embedded systems with a 32-bit
1416 MIPS processor are based on a MIPS32 processor. If you know the
1417 specific type of processor in your system, choose those that one
1418 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1419 Release 2 of the MIPS32 architecture is available since several
1420 years so chances are you even have a MIPS32 Release 2 processor
1421 in which case you should choose CPU_MIPS32_R2 instead for better
1424 config CPU_MIPS32_R2
1425 bool "MIPS32 Release 2"
1426 depends on SYS_HAS_CPU_MIPS32_R2
1427 select CPU_HAS_PREFETCH
1428 select CPU_SUPPORTS_32BIT_KERNEL
1429 select CPU_SUPPORTS_HIGHMEM
1430 select CPU_SUPPORTS_MSA
1433 Choose this option to build a kernel for release 2 or later of the
1434 MIPS32 architecture. Most modern embedded systems with a 32-bit
1435 MIPS processor are based on a MIPS32 processor. If you know the
1436 specific type of processor in your system, choose those that one
1437 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1439 config CPU_MIPS32_R5
1440 bool "MIPS32 Release 5"
1441 depends on SYS_HAS_CPU_MIPS32_R5
1442 select CPU_HAS_PREFETCH
1443 select CPU_SUPPORTS_32BIT_KERNEL
1444 select CPU_SUPPORTS_HIGHMEM
1445 select CPU_SUPPORTS_MSA
1447 select MIPS_O32_FP64_SUPPORT
1449 Choose this option to build a kernel for release 5 or later of the
1450 MIPS32 architecture. New MIPS processors, starting with the Warrior
1451 family, are based on a MIPS32r5 processor. If you own an older
1452 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1454 config CPU_MIPS32_R6
1455 bool "MIPS32 Release 6"
1456 depends on SYS_HAS_CPU_MIPS32_R6
1457 select CPU_HAS_PREFETCH
1458 select CPU_NO_LOAD_STORE_LR
1459 select CPU_SUPPORTS_32BIT_KERNEL
1460 select CPU_SUPPORTS_HIGHMEM
1461 select CPU_SUPPORTS_MSA
1463 select MIPS_O32_FP64_SUPPORT
1465 Choose this option to build a kernel for release 6 or later of the
1466 MIPS32 architecture. New MIPS processors, starting with the Warrior
1467 family, are based on a MIPS32r6 processor. If you own an older
1468 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1470 config CPU_MIPS64_R1
1471 bool "MIPS64 Release 1"
1472 depends on SYS_HAS_CPU_MIPS64_R1
1473 select CPU_HAS_PREFETCH
1474 select CPU_SUPPORTS_32BIT_KERNEL
1475 select CPU_SUPPORTS_64BIT_KERNEL
1476 select CPU_SUPPORTS_HIGHMEM
1477 select CPU_SUPPORTS_HUGEPAGES
1479 Choose this option to build a kernel for release 1 or later of the
1480 MIPS64 architecture. Many modern embedded systems with a 64-bit
1481 MIPS processor are based on a MIPS64 processor. If you know the
1482 specific type of processor in your system, choose those that one
1483 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1484 Release 2 of the MIPS64 architecture is available since several
1485 years so chances are you even have a MIPS64 Release 2 processor
1486 in which case you should choose CPU_MIPS64_R2 instead for better
1489 config CPU_MIPS64_R2
1490 bool "MIPS64 Release 2"
1491 depends on SYS_HAS_CPU_MIPS64_R2
1492 select CPU_HAS_PREFETCH
1493 select CPU_SUPPORTS_32BIT_KERNEL
1494 select CPU_SUPPORTS_64BIT_KERNEL
1495 select CPU_SUPPORTS_HIGHMEM
1496 select CPU_SUPPORTS_HUGEPAGES
1497 select CPU_SUPPORTS_MSA
1500 Choose this option to build a kernel for release 2 or later of the
1501 MIPS64 architecture. Many modern embedded systems with a 64-bit
1502 MIPS processor are based on a MIPS64 processor. If you know the
1503 specific type of processor in your system, choose those that one
1504 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1506 config CPU_MIPS64_R5
1507 bool "MIPS64 Release 5"
1508 depends on SYS_HAS_CPU_MIPS64_R5
1509 select CPU_HAS_PREFETCH
1510 select CPU_SUPPORTS_32BIT_KERNEL
1511 select CPU_SUPPORTS_64BIT_KERNEL
1512 select CPU_SUPPORTS_HIGHMEM
1513 select CPU_SUPPORTS_HUGEPAGES
1514 select CPU_SUPPORTS_MSA
1515 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1518 Choose this option to build a kernel for release 5 or later of the
1519 MIPS64 architecture. This is a intermediate MIPS architecture
1520 release partly implementing release 6 features. Though there is no
1521 any hardware known to be based on this release.
1523 config CPU_MIPS64_R6
1524 bool "MIPS64 Release 6"
1525 depends on SYS_HAS_CPU_MIPS64_R6
1526 select CPU_HAS_PREFETCH
1527 select CPU_NO_LOAD_STORE_LR
1528 select CPU_SUPPORTS_32BIT_KERNEL
1529 select CPU_SUPPORTS_64BIT_KERNEL
1530 select CPU_SUPPORTS_HIGHMEM
1531 select CPU_SUPPORTS_HUGEPAGES
1532 select CPU_SUPPORTS_MSA
1533 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1536 Choose this option to build a kernel for release 6 or later of the
1537 MIPS64 architecture. New MIPS processors, starting with the Warrior
1538 family, are based on a MIPS64r6 processor. If you own an older
1539 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1542 bool "MIPS Warrior P5600"
1543 depends on SYS_HAS_CPU_P5600
1544 select CPU_HAS_PREFETCH
1545 select CPU_SUPPORTS_32BIT_KERNEL
1546 select CPU_SUPPORTS_HIGHMEM
1547 select CPU_SUPPORTS_MSA
1548 select CPU_SUPPORTS_CPUFREQ
1549 select CPU_MIPSR2_IRQ_VI
1550 select CPU_MIPSR2_IRQ_EI
1552 select MIPS_O32_FP64_SUPPORT
1554 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1555 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1556 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1557 level features like up to six P5600 calculation cores, CM2 with L2
1558 cache, IOCU/IOMMU (though might be unused depending on the system-
1559 specific IP core configuration), GIC, CPC, virtualisation module,
1564 depends on SYS_HAS_CPU_R3000
1567 select CPU_SUPPORTS_32BIT_KERNEL
1568 select CPU_SUPPORTS_HIGHMEM
1570 Please make sure to pick the right CPU type. Linux/MIPS is not
1571 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1572 *not* work on R4000 machines and vice versa. However, since most
1573 of the supported machines have an R4000 (or similar) CPU, R4x00
1574 might be a safe bet. If the resulting kernel does not work,
1575 try to recompile with R3000.
1579 depends on SYS_HAS_CPU_R4300
1580 select CPU_SUPPORTS_32BIT_KERNEL
1581 select CPU_SUPPORTS_64BIT_KERNEL
1583 MIPS Technologies R4300-series processors.
1587 depends on SYS_HAS_CPU_R4X00
1588 select CPU_SUPPORTS_32BIT_KERNEL
1589 select CPU_SUPPORTS_64BIT_KERNEL
1590 select CPU_SUPPORTS_HUGEPAGES
1592 MIPS Technologies R4000-series processors other than 4300, including
1593 the R4000, R4400, R4600, and 4700.
1597 depends on SYS_HAS_CPU_TX49XX
1598 select CPU_HAS_PREFETCH
1599 select CPU_SUPPORTS_32BIT_KERNEL
1600 select CPU_SUPPORTS_64BIT_KERNEL
1601 select CPU_SUPPORTS_HUGEPAGES
1605 depends on SYS_HAS_CPU_R5000
1606 select CPU_SUPPORTS_32BIT_KERNEL
1607 select CPU_SUPPORTS_64BIT_KERNEL
1608 select CPU_SUPPORTS_HUGEPAGES
1610 MIPS Technologies R5000-series processors other than the Nevada.
1614 depends on SYS_HAS_CPU_R5500
1615 select CPU_SUPPORTS_32BIT_KERNEL
1616 select CPU_SUPPORTS_64BIT_KERNEL
1617 select CPU_SUPPORTS_HUGEPAGES
1619 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1624 depends on SYS_HAS_CPU_NEVADA
1625 select CPU_SUPPORTS_32BIT_KERNEL
1626 select CPU_SUPPORTS_64BIT_KERNEL
1627 select CPU_SUPPORTS_HUGEPAGES
1629 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1633 depends on SYS_HAS_CPU_R10000
1634 select CPU_HAS_PREFETCH
1635 select CPU_SUPPORTS_32BIT_KERNEL
1636 select CPU_SUPPORTS_64BIT_KERNEL
1637 select CPU_SUPPORTS_HIGHMEM
1638 select CPU_SUPPORTS_HUGEPAGES
1640 MIPS Technologies R10000-series processors.
1644 depends on SYS_HAS_CPU_RM7000
1645 select CPU_HAS_PREFETCH
1646 select CPU_SUPPORTS_32BIT_KERNEL
1647 select CPU_SUPPORTS_64BIT_KERNEL
1648 select CPU_SUPPORTS_HIGHMEM
1649 select CPU_SUPPORTS_HUGEPAGES
1653 depends on SYS_HAS_CPU_SB1
1654 select CPU_SUPPORTS_32BIT_KERNEL
1655 select CPU_SUPPORTS_64BIT_KERNEL
1656 select CPU_SUPPORTS_HIGHMEM
1657 select CPU_SUPPORTS_HUGEPAGES
1658 select WEAK_ORDERING
1660 config CPU_CAVIUM_OCTEON
1661 bool "Cavium Octeon processor"
1662 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1663 select CPU_HAS_PREFETCH
1664 select CPU_SUPPORTS_64BIT_KERNEL
1665 select WEAK_ORDERING
1666 select CPU_SUPPORTS_HIGHMEM
1667 select CPU_SUPPORTS_HUGEPAGES
1668 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1669 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1670 select MIPS_L1_CACHE_SHIFT_7
1673 The Cavium Octeon processor is a highly integrated chip containing
1674 many ethernet hardware widgets for networking tasks. The processor
1675 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1676 Full details can be found at http://www.caviumnetworks.com.
1679 bool "Broadcom BMIPS"
1680 depends on SYS_HAS_CPU_BMIPS
1682 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1683 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1684 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1685 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1686 select CPU_SUPPORTS_32BIT_KERNEL
1687 select DMA_NONCOHERENT
1689 select SWAP_IO_SPACE
1690 select WEAK_ORDERING
1691 select CPU_SUPPORTS_HIGHMEM
1692 select CPU_HAS_PREFETCH
1693 select CPU_SUPPORTS_CPUFREQ
1694 select MIPS_EXTERNAL_TIMER
1695 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1697 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1701 config CPU_MIPS32_3_5_FEATURES
1702 bool "MIPS32 Release 3.5 Features"
1703 depends on SYS_HAS_CPU_MIPS32_R3_5
1704 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1707 Choose this option to build a kernel for release 2 or later of the
1708 MIPS32 architecture including features from the 3.5 release such as
1709 support for Enhanced Virtual Addressing (EVA).
1711 config CPU_MIPS32_3_5_EVA
1712 bool "Enhanced Virtual Addressing (EVA)"
1713 depends on CPU_MIPS32_3_5_FEATURES
1717 Choose this option if you want to enable the Enhanced Virtual
1718 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1719 One of its primary benefits is an increase in the maximum size
1720 of lowmem (up to 3GB). If unsure, say 'N' here.
1722 config CPU_MIPS32_R5_FEATURES
1723 bool "MIPS32 Release 5 Features"
1724 depends on SYS_HAS_CPU_MIPS32_R5
1725 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1727 Choose this option to build a kernel for release 2 or later of the
1728 MIPS32 architecture including features from release 5 such as
1729 support for Extended Physical Addressing (XPA).
1731 config CPU_MIPS32_R5_XPA
1732 bool "Extended Physical Addressing (XPA)"
1733 depends on CPU_MIPS32_R5_FEATURES
1735 depends on !PAGE_SIZE_4KB
1736 depends on SYS_SUPPORTS_HIGHMEM
1739 select PHYS_ADDR_T_64BIT
1742 Choose this option if you want to enable the Extended Physical
1743 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1744 benefit is to increase physical addressing equal to or greater
1745 than 40 bits. Note that this has the side effect of turning on
1746 64-bit addressing which in turn makes the PTEs 64-bit in size.
1747 If unsure, say 'N' here.
1750 config CPU_NOP_WORKAROUNDS
1753 config CPU_JUMP_WORKAROUNDS
1756 config CPU_LOONGSON2F_WORKAROUNDS
1757 bool "Loongson 2F Workarounds"
1759 select CPU_NOP_WORKAROUNDS
1760 select CPU_JUMP_WORKAROUNDS
1762 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1763 require workarounds. Without workarounds the system may hang
1764 unexpectedly. For more information please refer to the gas
1765 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1767 Loongson 2F03 and later have fixed these issues and no workarounds
1768 are needed. The workarounds have no significant side effect on them
1769 but may decrease the performance of the system so this option should
1770 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1773 If unsure, please say Y.
1774 endif # CPU_LOONGSON2F
1776 config SYS_SUPPORTS_ZBOOT
1778 select HAVE_KERNEL_GZIP
1779 select HAVE_KERNEL_BZIP2
1780 select HAVE_KERNEL_LZ4
1781 select HAVE_KERNEL_LZMA
1782 select HAVE_KERNEL_LZO
1783 select HAVE_KERNEL_XZ
1784 select HAVE_KERNEL_ZSTD
1786 config SYS_SUPPORTS_ZBOOT_UART16550
1788 select SYS_SUPPORTS_ZBOOT
1790 config SYS_SUPPORTS_ZBOOT_UART_PROM
1792 select SYS_SUPPORTS_ZBOOT
1794 config CPU_LOONGSON2EF
1796 select CPU_SUPPORTS_32BIT_KERNEL
1797 select CPU_SUPPORTS_64BIT_KERNEL
1798 select CPU_SUPPORTS_HIGHMEM
1799 select CPU_SUPPORTS_HUGEPAGES
1800 select ARCH_HAS_PHYS_TO_DMA
1802 config CPU_LOONGSON32
1806 select CPU_HAS_PREFETCH
1807 select CPU_SUPPORTS_32BIT_KERNEL
1808 select CPU_SUPPORTS_HIGHMEM
1809 select CPU_SUPPORTS_CPUFREQ
1811 config CPU_BMIPS32_3300
1812 select SMP_UP if SMP
1815 config CPU_BMIPS4350
1817 select SYS_SUPPORTS_SMP
1818 select SYS_SUPPORTS_HOTPLUG_CPU
1820 config CPU_BMIPS4380
1822 select MIPS_L1_CACHE_SHIFT_6
1823 select SYS_SUPPORTS_SMP
1824 select SYS_SUPPORTS_HOTPLUG_CPU
1827 config CPU_BMIPS5000
1829 select MIPS_CPU_SCACHE
1830 select MIPS_L1_CACHE_SHIFT_7
1831 select SYS_SUPPORTS_SMP
1832 select SYS_SUPPORTS_HOTPLUG_CPU
1835 config SYS_HAS_CPU_LOONGSON64
1837 select CPU_SUPPORTS_CPUFREQ
1840 config SYS_HAS_CPU_LOONGSON2E
1843 config SYS_HAS_CPU_LOONGSON2F
1845 select CPU_SUPPORTS_CPUFREQ
1846 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1848 config SYS_HAS_CPU_LOONGSON1B
1851 config SYS_HAS_CPU_LOONGSON1C
1854 config SYS_HAS_CPU_MIPS32_R1
1857 config SYS_HAS_CPU_MIPS32_R2
1860 config SYS_HAS_CPU_MIPS32_R3_5
1863 config SYS_HAS_CPU_MIPS32_R5
1865 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1867 config SYS_HAS_CPU_MIPS32_R6
1869 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1871 config SYS_HAS_CPU_MIPS64_R1
1874 config SYS_HAS_CPU_MIPS64_R2
1877 config SYS_HAS_CPU_MIPS64_R5
1879 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1881 config SYS_HAS_CPU_MIPS64_R6
1883 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1885 config SYS_HAS_CPU_P5600
1887 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1889 config SYS_HAS_CPU_R3000
1892 config SYS_HAS_CPU_R4300
1895 config SYS_HAS_CPU_R4X00
1898 config SYS_HAS_CPU_TX49XX
1901 config SYS_HAS_CPU_R5000
1904 config SYS_HAS_CPU_R5500
1907 config SYS_HAS_CPU_NEVADA
1910 config SYS_HAS_CPU_R10000
1912 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1914 config SYS_HAS_CPU_RM7000
1917 config SYS_HAS_CPU_SB1
1920 config SYS_HAS_CPU_CAVIUM_OCTEON
1923 config SYS_HAS_CPU_BMIPS
1926 config SYS_HAS_CPU_BMIPS32_3300
1928 select SYS_HAS_CPU_BMIPS
1930 config SYS_HAS_CPU_BMIPS4350
1932 select SYS_HAS_CPU_BMIPS
1934 config SYS_HAS_CPU_BMIPS4380
1936 select SYS_HAS_CPU_BMIPS
1938 config SYS_HAS_CPU_BMIPS5000
1940 select SYS_HAS_CPU_BMIPS
1941 select ARCH_HAS_SYNC_DMA_FOR_CPU
1944 # CPU may reorder R->R, R->W, W->R, W->W
1945 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1947 config WEAK_ORDERING
1951 # CPU may reorder reads and writes beyond LL/SC
1952 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1954 config WEAK_REORDERING_BEYOND_LLSC
1959 # These two indicate any level of the MIPS32 and MIPS64 architecture
1963 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1964 CPU_MIPS32_R6 || CPU_P5600
1968 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
1969 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
1972 # These indicate the revision of the architecture
1976 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1980 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1982 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1987 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
1989 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1994 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1996 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1997 select HAVE_ARCH_BITREVERSE
1998 select MIPS_ASID_BITS_VARIABLE
1999 select MIPS_CRC_SUPPORT
2002 config TARGET_ISA_REV
2004 default 1 if CPU_MIPSR1
2005 default 2 if CPU_MIPSR2
2006 default 5 if CPU_MIPSR5
2007 default 6 if CPU_MIPSR6
2010 Reflects the ISA revision being targeted by the kernel build. This
2011 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2019 config SYS_SUPPORTS_32BIT_KERNEL
2021 config SYS_SUPPORTS_64BIT_KERNEL
2023 config CPU_SUPPORTS_32BIT_KERNEL
2025 config CPU_SUPPORTS_64BIT_KERNEL
2027 config CPU_SUPPORTS_CPUFREQ
2029 config CPU_SUPPORTS_ADDRWINCFG
2031 config CPU_SUPPORTS_HUGEPAGES
2033 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2034 config MIPS_PGD_C0_CONTEXT
2037 default y if (CPU_MIPSR2 || CPU_MIPSR6)
2040 # Set to y for ptrace access to watch registers.
2042 config HARDWARE_WATCHPOINTS
2044 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2049 prompt "Kernel code model"
2051 You should only select this option if you have a workload that
2052 actually benefits from 64-bit processing or if your machine has
2053 large memory. You will only be presented a single option in this
2054 menu if your system does not support both 32-bit and 64-bit kernels.
2057 bool "32-bit kernel"
2058 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2061 Select this option if you want to build a 32-bit kernel.
2064 bool "64-bit kernel"
2065 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2067 Select this option if you want to build a 64-bit kernel.
2071 config MIPS_VA_BITS_48
2072 bool "48 bits virtual memory"
2075 Support a maximum at least 48 bits of application virtual
2076 memory. Default is 40 bits or less, depending on the CPU.
2077 For page sizes 16k and above, this option results in a small
2078 memory overhead for page tables. For 4k page size, a fourth
2079 level of page tables is added which imposes both a memory
2080 overhead as well as slower TLB fault handling.
2084 config ZBOOT_LOAD_ADDRESS
2085 hex "Compressed kernel load address"
2086 default 0xffffffff80400000 if BCM47XX
2088 depends on SYS_SUPPORTS_ZBOOT
2090 The address to load compressed kernel, aka vmlinuz.
2092 This is only used if non-zero.
2095 prompt "Kernel page size"
2096 default PAGE_SIZE_4KB
2098 config PAGE_SIZE_4KB
2100 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2102 This option select the standard 4kB Linux page size. On some
2103 R3000-family processors this is the only available page size. Using
2104 4kB page size will minimize memory consumption and is therefore
2105 recommended for low memory systems.
2107 config PAGE_SIZE_8KB
2109 depends on CPU_CAVIUM_OCTEON
2110 depends on !MIPS_VA_BITS_48
2112 Using 8kB page size will result in higher performance kernel at
2113 the price of higher memory consumption. This option is available
2114 only on cnMIPS processors. Note that you will need a suitable Linux
2115 distribution to support this.
2117 config PAGE_SIZE_16KB
2119 depends on !CPU_R3000
2121 Using 16kB page size will result in higher performance kernel at
2122 the price of higher memory consumption. This option is available on
2123 all non-R3000 family processors. Note that you will need a suitable
2124 Linux distribution to support this.
2126 config PAGE_SIZE_32KB
2128 depends on CPU_CAVIUM_OCTEON
2129 depends on !MIPS_VA_BITS_48
2131 Using 32kB page size will result in higher performance kernel at
2132 the price of higher memory consumption. This option is available
2133 only on cnMIPS cores. Note that you will need a suitable Linux
2134 distribution to support this.
2136 config PAGE_SIZE_64KB
2138 depends on !CPU_R3000
2140 Using 64kB page size will result in higher performance kernel at
2141 the price of higher memory consumption. This option is available on
2142 all non-R3000 family processor. Not that at the time of this
2143 writing this option is still high experimental.
2147 config ARCH_FORCE_MAX_ORDER
2148 int "Maximum zone order"
2149 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2150 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2151 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2152 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2153 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2154 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2158 The kernel memory allocator divides physically contiguous memory
2159 blocks into "zones", where each zone is a power of two number of
2160 pages. This option selects the largest power of two that the kernel
2161 keeps in the memory allocator. If you need to allocate very large
2162 blocks of physically contiguous memory, then you may need to
2163 increase this value.
2165 This config option is actually maximum order plus one. For example,
2166 a value of 11 means that the largest free memory block is 2^10 pages.
2168 The page size is not necessarily 4KB. Keep this in mind
2169 when choosing a value for this option.
2174 config IP22_CPU_SCACHE
2179 # Support for a MIPS32 / MIPS64 style S-caches
2181 config MIPS_CPU_SCACHE
2185 config R5000_CPU_SCACHE
2189 config RM7000_CPU_SCACHE
2193 config SIBYTE_DMA_PAGEOPS
2194 bool "Use DMA to clear/copy pages"
2197 Instead of using the CPU to zero and copy pages, use a Data Mover
2198 channel. These DMA channels are otherwise unused by the standard
2199 SiByte Linux port. Seems to give a small performance benefit.
2201 config CPU_HAS_PREFETCH
2204 config CPU_GENERIC_DUMP_TLB
2206 default y if !CPU_R3000
2208 config MIPS_FP_SUPPORT
2209 bool "Floating Point support" if EXPERT
2212 Select y to include support for floating point in the kernel
2213 including initialization of FPU hardware, FP context save & restore
2214 and emulation of an FPU where necessary. Without this support any
2215 userland program attempting to use floating point instructions will
2218 If you know that your userland will not attempt to use floating point
2219 instructions then you can say n here to shrink the kernel a little.
2223 config CPU_R2300_FPU
2225 depends on MIPS_FP_SUPPORT
2226 default y if CPU_R3000
2233 depends on MIPS_FP_SUPPORT
2234 default y if !CPU_R2300_FPU
2236 config CPU_R4K_CACHE_TLB
2238 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2241 bool "MIPS MT SMP support (1 TC on each available VPE)"
2243 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2244 select CPU_MIPSR2_IRQ_VI
2245 select CPU_MIPSR2_IRQ_EI
2250 select SYS_SUPPORTS_SMP
2251 select SYS_SUPPORTS_SCHED_SMT
2252 select MIPS_PERF_SHARED_TC_COUNTERS
2254 This is a kernel model which is known as SMVP. This is supported
2255 on cores with the MT ASE and uses the available VPEs to implement
2256 virtual processors which supports SMP. This is equivalent to the
2257 Intel Hyperthreading feature. For further information go to
2258 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2264 bool "SMT (multithreading) scheduler support"
2265 depends on SYS_SUPPORTS_SCHED_SMT
2268 SMT scheduler support improves the CPU scheduler's decision making
2269 when dealing with MIPS MT enabled cores at a cost of slightly
2270 increased overhead in some places. If unsure say N here.
2272 config SYS_SUPPORTS_SCHED_SMT
2275 config SYS_SUPPORTS_MULTITHREADING
2278 config MIPS_MT_FPAFF
2279 bool "Dynamic FPU affinity for FP-intensive threads"
2281 depends on MIPS_MT_SMP
2283 config MIPSR2_TO_R6_EMULATOR
2284 bool "MIPS R2-to-R6 emulator"
2285 depends on CPU_MIPSR6
2286 depends on MIPS_FP_SUPPORT
2289 Choose this option if you want to run non-R6 MIPS userland code.
2290 Even if you say 'Y' here, the emulator will still be disabled by
2291 default. You can enable it using the 'mipsr2emu' kernel option.
2292 The only reason this is a build-time option is to save ~14K from the
2295 config SYS_SUPPORTS_VPE_LOADER
2297 depends on SYS_SUPPORTS_MULTITHREADING
2299 Indicates that the platform supports the VPE loader, and provides
2302 config MIPS_VPE_LOADER
2303 bool "VPE loader support."
2304 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2305 select CPU_MIPSR2_IRQ_VI
2306 select CPU_MIPSR2_IRQ_EI
2309 Includes a loader for loading an elf relocatable object
2310 onto another VPE and running it.
2312 config MIPS_VPE_LOADER_CMP
2315 depends on MIPS_VPE_LOADER && MIPS_CMP
2317 config MIPS_VPE_LOADER_MT
2320 depends on MIPS_VPE_LOADER && !MIPS_CMP
2322 config MIPS_VPE_LOADER_TOM
2323 bool "Load VPE program into memory hidden from linux"
2324 depends on MIPS_VPE_LOADER
2327 The loader can use memory that is present but has been hidden from
2328 Linux using the kernel command line option "mem=xxMB". It's up to
2329 you to ensure the amount you put in the option and the space your
2330 program requires is less or equal to the amount physically present.
2332 config MIPS_VPE_APSP_API
2333 bool "Enable support for AP/SP API (RTLX)"
2334 depends on MIPS_VPE_LOADER
2336 config MIPS_VPE_APSP_API_CMP
2339 depends on MIPS_VPE_APSP_API && MIPS_CMP
2341 config MIPS_VPE_APSP_API_MT
2344 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2347 bool "MIPS CMP framework support (DEPRECATED)"
2348 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2351 select SYS_SUPPORTS_SMP
2352 select WEAK_ORDERING
2355 Select this if you are using a bootloader which implements the "CMP
2356 framework" protocol (ie. YAMON) and want your kernel to make use of
2357 its ability to start secondary CPUs.
2359 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2363 bool "MIPS Coherent Processing System support"
2364 depends on SYS_SUPPORTS_MIPS_CPS
2366 select MIPS_CPS_PM if HOTPLUG_CPU
2368 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2369 select SYS_SUPPORTS_HOTPLUG_CPU
2370 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2371 select SYS_SUPPORTS_SMP
2372 select WEAK_ORDERING
2373 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2375 Select this if you wish to run an SMP kernel across multiple cores
2376 within a MIPS Coherent Processing System. When this option is
2377 enabled the kernel will probe for other cores and boot them with
2378 no external assistance. It is safe to enable this when hardware
2379 support is unavailable.
2392 config SB1_PASS_2_WORKAROUNDS
2394 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2397 config SB1_PASS_2_1_WORKAROUNDS
2399 depends on CPU_SB1 && CPU_SB1_PASS_2
2403 prompt "SmartMIPS or microMIPS ASE support"
2405 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2408 Select this if you want neither microMIPS nor SmartMIPS support
2410 config CPU_HAS_SMARTMIPS
2411 depends on SYS_SUPPORTS_SMARTMIPS
2414 SmartMIPS is a extension of the MIPS32 architecture aimed at
2415 increased security at both hardware and software level for
2416 smartcards. Enabling this option will allow proper use of the
2417 SmartMIPS instructions by Linux applications. However a kernel with
2418 this option will not work on a MIPS core without SmartMIPS core. If
2419 you don't know you probably don't have SmartMIPS and should say N
2422 config CPU_MICROMIPS
2423 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2426 When this option is enabled the kernel will be built using the
2432 bool "Support for the MIPS SIMD Architecture"
2433 depends on CPU_SUPPORTS_MSA
2434 depends on MIPS_FP_SUPPORT
2435 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2437 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2438 and a set of SIMD instructions to operate on them. When this option
2439 is enabled the kernel will support allocating & switching MSA
2440 vector register contexts. If you know that your kernel will only be
2441 running on CPUs which do not support MSA or that your userland will
2442 not be making use of it then you may wish to say N here to reduce
2443 the size & complexity of your kernel.
2454 depends on !CPU_DIEI_BROKEN
2457 config CPU_DIEI_BROKEN
2463 config CPU_NO_LOAD_STORE_LR
2466 CPU lacks support for unaligned load and store instructions:
2467 LWL, LWR, SWL, SWR (Load/store word left/right).
2468 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2472 # Vectored interrupt mode is an R2 feature
2474 config CPU_MIPSR2_IRQ_VI
2478 # Extended interrupt mode is an R2 feature
2480 config CPU_MIPSR2_IRQ_EI
2485 depends on !CPU_R3000
2492 # Work around the "daddi" and "daddiu" CPU errata:
2494 # - The `daddi' instruction fails to trap on overflow.
2495 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2498 # - The `daddiu' instruction can produce an incorrect result.
2499 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2501 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2503 # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2504 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
2505 config CPU_DADDI_WORKAROUNDS
2508 # Work around certain R4000 CPU errata (as implemented by GCC):
2510 # - A double-word or a variable shift may give an incorrect result
2511 # if executed immediately after starting an integer division:
2512 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2514 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2517 # - A double-word or a variable shift may give an incorrect result
2518 # if executed while an integer multiplication is in progress:
2519 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2522 # - An integer division may give an incorrect result if started in
2523 # a delay slot of a taken branch or a jump:
2524 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2526 config CPU_R4000_WORKAROUNDS
2528 select CPU_R4400_WORKAROUNDS
2530 # Work around certain R4400 CPU errata (as implemented by GCC):
2532 # - A double-word or a variable shift may give an incorrect result
2533 # if executed immediately after starting an integer division:
2534 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2535 # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
2536 config CPU_R4400_WORKAROUNDS
2539 config CPU_R4X00_BUGS64
2541 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2543 config MIPS_ASID_SHIFT
2545 default 6 if CPU_R3000
2548 config MIPS_ASID_BITS
2550 default 0 if MIPS_ASID_BITS_VARIABLE
2551 default 6 if CPU_R3000
2554 config MIPS_ASID_BITS_VARIABLE
2557 config MIPS_CRC_SUPPORT
2560 # R4600 erratum. Due to the lack of errata information the exact
2561 # technical details aren't known. I've experimentally found that disabling
2562 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2564 config WAR_R4600_V1_INDEX_ICACHEOP
2567 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2569 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2570 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2571 # executed if there is no other dcache activity. If the dcache is
2572 # accessed for another instruction immediately preceding when these
2573 # cache instructions are executing, it is possible that the dcache
2574 # tag match outputs used by these cache instructions will be
2575 # incorrect. These cache instructions should be preceded by at least
2576 # four instructions that are not any kind of load or store
2579 # This is not allowed: lw
2583 # cache Hit_Writeback_Invalidate_D
2585 # This is allowed: lw
2590 # cache Hit_Writeback_Invalidate_D
2591 config WAR_R4600_V1_HIT_CACHEOP
2594 # Writeback and invalidate the primary cache dcache before DMA.
2596 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2597 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2598 # operate correctly if the internal data cache refill buffer is empty. These
2599 # CACHE instructions should be separated from any potential data cache miss
2600 # by a load instruction to an uncached address to empty the response buffer."
2601 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2603 config WAR_R4600_V2_HIT_CACHEOP
2606 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2607 # the line which this instruction itself exists, the following
2608 # operation is not guaranteed."
2610 # Workaround: do two phase flushing for Index_Invalidate_I
2611 config WAR_TX49XX_ICACHE_INDEX_INV
2614 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2615 # opposes it being called that) where invalid instructions in the same
2616 # I-cache line worth of instructions being fetched may case spurious
2618 config WAR_ICACHE_REFILLS
2621 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2622 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2623 config WAR_R10000_LLSC
2626 # 34K core erratum: "Problems Executing the TLBR Instruction"
2627 config WAR_MIPS34K_MISSED_ITLB
2631 # - Highmem only makes sense for the 32-bit kernel.
2632 # - The current highmem code will only work properly on physically indexed
2633 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2634 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2635 # moment we protect the user and offer the highmem option only on machines
2636 # where it's known to be safe. This will not offer highmem on a few systems
2637 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2638 # indexed CPUs but we're playing safe.
2639 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2640 # know they might have memory configurations that could make use of highmem
2644 bool "High Memory Support"
2645 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2648 config CPU_SUPPORTS_HIGHMEM
2651 config SYS_SUPPORTS_HIGHMEM
2654 config SYS_SUPPORTS_SMARTMIPS
2657 config SYS_SUPPORTS_MICROMIPS
2660 config SYS_SUPPORTS_MIPS16
2663 This option must be set if a kernel might be executed on a MIPS16-
2664 enabled CPU even if MIPS16 is not actually being used. In other
2665 words, it makes the kernel MIPS16-tolerant.
2667 config CPU_SUPPORTS_MSA
2670 config ARCH_FLATMEM_ENABLE
2672 depends on !NUMA && !CPU_LOONGSON2EF
2674 config ARCH_SPARSEMEM_ENABLE
2679 depends on SYS_SUPPORTS_NUMA
2681 select HAVE_SETUP_PER_CPU_AREA
2682 select NEED_PER_CPU_EMBED_FIRST_CHUNK
2684 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2685 Access). This option improves performance on systems with more
2686 than two nodes; on two node systems it is generally better to
2687 leave it disabled; on single node systems leave this option
2690 config SYS_SUPPORTS_NUMA
2693 config HAVE_ARCH_NODEDATA_EXTENSION
2697 bool "Relocatable kernel"
2698 depends on SYS_SUPPORTS_RELOCATABLE
2699 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2700 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2701 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2702 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2705 This builds a kernel image that retains relocation information
2706 so it can be loaded someplace besides the default 1MB.
2707 The relocations make the kernel binary about 15% larger,
2708 but are discarded at runtime
2710 config RELOCATION_TABLE_SIZE
2711 hex "Relocation table size"
2712 depends on RELOCATABLE
2713 range 0x0 0x01000000
2714 default "0x00200000" if CPU_LOONGSON64
2715 default "0x00100000"
2717 A table of relocation data will be appended to the kernel binary
2718 and parsed at boot to fix up the relocated kernel.
2720 This option allows the amount of space reserved for the table to be
2721 adjusted, although the default of 1Mb should be ok in most cases.
2723 The build will fail and a valid size suggested if this is too small.
2725 If unsure, leave at the default value.
2727 config RANDOMIZE_BASE
2728 bool "Randomize the address of the kernel image"
2729 depends on RELOCATABLE
2731 Randomizes the physical and virtual address at which the
2732 kernel image is loaded, as a security feature that
2733 deters exploit attempts relying on knowledge of the location
2734 of kernel internals.
2736 Entropy is generated using any coprocessor 0 registers available.
2738 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2742 config RANDOMIZE_BASE_MAX_OFFSET
2743 hex "Maximum kASLR offset" if EXPERT
2744 depends on RANDOMIZE_BASE
2745 range 0x0 0x40000000 if EVA || 64BIT
2746 range 0x0 0x08000000
2747 default "0x01000000"
2749 When kASLR is active, this provides the maximum offset that will
2750 be applied to the kernel image. It should be set according to the
2751 amount of physical RAM available in the target system minus
2752 PHYSICAL_START and must be a power of 2.
2754 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2755 EVA or 64-bit. The default is 16Mb.
2762 config HW_PERF_EVENTS
2763 bool "Enable hardware performance counter support for perf events"
2764 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2767 Enable hardware performance counter support for perf events. If
2768 disabled, perf events will use software events only.
2771 bool "Enable DMI scanning"
2772 depends on MACH_LOONGSON64
2773 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2776 Enabled scanning of DMI to identify machine quirks. Say Y
2777 here unless you have verified that your setup is not
2778 affected by entries in the DMI blacklist. Required by PNP
2782 bool "Multi-Processing support"
2783 depends on SYS_SUPPORTS_SMP
2785 This enables support for systems with more than one CPU. If you have
2786 a system with only one CPU, say N. If you have a system with more
2787 than one CPU, say Y.
2789 If you say N here, the kernel will run on uni- and multiprocessor
2790 machines, but will use only one CPU of a multiprocessor machine. If
2791 you say Y here, the kernel will run on many, but not all,
2792 uniprocessor machines. On a uniprocessor machine, the kernel
2793 will run faster if you say N here.
2795 People using multiprocessor machines who say Y here should also say
2796 Y to "Enhanced Real Time Clock Support", below.
2798 See also the SMP-HOWTO available at
2799 <https://www.tldp.org/docs.html#howto>.
2801 If you don't know what to do here, say N.
2804 bool "Support for hot-pluggable CPUs"
2805 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2807 Say Y here to allow turning CPUs off and on. CPUs can be
2808 controlled through /sys/devices/system/cpu.
2809 (Note: power management support will enable this option
2810 automatically on SMP systems. )
2811 Say N if you want to disable CPU hotplug.
2816 config SYS_SUPPORTS_MIPS_CMP
2819 config SYS_SUPPORTS_MIPS_CPS
2822 config SYS_SUPPORTS_SMP
2825 config NR_CPUS_DEFAULT_4
2828 config NR_CPUS_DEFAULT_8
2831 config NR_CPUS_DEFAULT_16
2834 config NR_CPUS_DEFAULT_32
2837 config NR_CPUS_DEFAULT_64
2841 int "Maximum number of CPUs (2-256)"
2844 default "4" if NR_CPUS_DEFAULT_4
2845 default "8" if NR_CPUS_DEFAULT_8
2846 default "16" if NR_CPUS_DEFAULT_16
2847 default "32" if NR_CPUS_DEFAULT_32
2848 default "64" if NR_CPUS_DEFAULT_64
2850 This allows you to specify the maximum number of CPUs which this
2851 kernel will support. The maximum supported value is 32 for 32-bit
2852 kernel and 64 for 64-bit kernels; the minimum value which makes
2853 sense is 1 for Qemu (useful only for kernel debugging purposes)
2854 and 2 for all others.
2856 This is purely to save memory - each supported CPU adds
2857 approximately eight kilobytes to the kernel image. For best
2858 performance should round up your number of processors to the next
2861 config MIPS_PERF_SHARED_TC_COUNTERS
2864 config MIPS_NR_CPU_NR_MAP_1024
2867 config MIPS_NR_CPU_NR_MAP
2870 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2871 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2874 # Timer Interrupt Frequency Configuration
2878 prompt "Timer frequency"
2881 Allows the configuration of the timer frequency.
2884 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2887 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2890 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2893 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2896 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2899 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2902 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2905 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2909 config SYS_SUPPORTS_24HZ
2912 config SYS_SUPPORTS_48HZ
2915 config SYS_SUPPORTS_100HZ
2918 config SYS_SUPPORTS_128HZ
2921 config SYS_SUPPORTS_250HZ
2924 config SYS_SUPPORTS_256HZ
2927 config SYS_SUPPORTS_1000HZ
2930 config SYS_SUPPORTS_1024HZ
2933 config SYS_SUPPORTS_ARBIT_HZ
2935 default y if !SYS_SUPPORTS_24HZ && \
2936 !SYS_SUPPORTS_48HZ && \
2937 !SYS_SUPPORTS_100HZ && \
2938 !SYS_SUPPORTS_128HZ && \
2939 !SYS_SUPPORTS_250HZ && \
2940 !SYS_SUPPORTS_256HZ && \
2941 !SYS_SUPPORTS_1000HZ && \
2942 !SYS_SUPPORTS_1024HZ
2948 default 100 if HZ_100
2949 default 128 if HZ_128
2950 default 250 if HZ_250
2951 default 256 if HZ_256
2952 default 1000 if HZ_1000
2953 default 1024 if HZ_1024
2956 def_bool HIGH_RES_TIMERS
2959 bool "Kexec system call"
2962 kexec is a system call that implements the ability to shutdown your
2963 current kernel, and to start another kernel. It is like a reboot
2964 but it is independent of the system firmware. And like a reboot
2965 you can start any kernel with it, not just Linux.
2967 The name comes from the similarity to the exec system call.
2969 It is an ongoing process to be certain the hardware in a machine
2970 is properly shutdown, so do not be surprised if this code does not
2971 initially work for you. As of this writing the exact hardware
2972 interface is strongly in flux, so no good recommendation can be
2976 bool "Kernel crash dumps"
2978 Generate crash dump after being started by kexec.
2979 This should be normally only set in special crash dump kernels
2980 which are loaded in the main kernel with kexec-tools into
2981 a specially reserved region and then later executed after
2982 a crash by kdump/kexec. The crash dump kernel must be compiled
2983 to a memory address not used by the main kernel or firmware using
2986 config PHYSICAL_START
2987 hex "Physical address where the kernel is loaded"
2988 default "0xffffffff84000000"
2989 depends on CRASH_DUMP
2991 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2992 If you plan to use kernel for capturing the crash dump change
2993 this value to start of the reserved region (the "X" value as
2994 specified in the "crashkernel=YM@XM" command line boot parameter
2995 passed to the panic-ed kernel).
2997 config MIPS_O32_FP64_SUPPORT
2998 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2999 depends on 32BIT || MIPS32_O32
3001 When this is enabled, the kernel will support use of 64-bit floating
3002 point registers with binaries using the O32 ABI along with the
3003 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3004 32-bit MIPS systems this support is at the cost of increasing the
3005 size and complexity of the compiled FPU emulator. Thus if you are
3006 running a MIPS32 system and know that none of your userland binaries
3007 will require 64-bit floating point, you may wish to reduce the size
3008 of your kernel & potentially improve FP emulation performance by
3011 Although binutils currently supports use of this flag the details
3012 concerning its effect upon the O32 ABI in userland are still being
3013 worked on. In order to avoid userland becoming dependent upon current
3014 behaviour before the details have been finalised, this option should
3015 be considered experimental and only enabled by those working upon
3023 select OF_EARLY_FLATTREE
3033 prompt "Kernel appended dtb support" if USE_OF
3034 default MIPS_NO_APPENDED_DTB
3036 config MIPS_NO_APPENDED_DTB
3039 Do not enable appended dtb support.
3041 config MIPS_ELF_APPENDED_DTB
3044 With this option, the boot code will look for a device tree binary
3045 DTB) included in the vmlinux ELF section .appended_dtb. By default
3046 it is empty and the DTB can be appended using binutils command
3049 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3051 This is meant as a backward compatibility convenience for those
3052 systems with a bootloader that can't be upgraded to accommodate
3053 the documented boot protocol using a device tree.
3055 config MIPS_RAW_APPENDED_DTB
3056 bool "vmlinux.bin or vmlinuz.bin"
3058 With this option, the boot code will look for a device tree binary
3059 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3060 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3062 This is meant as a backward compatibility convenience for those
3063 systems with a bootloader that can't be upgraded to accommodate
3064 the documented boot protocol using a device tree.
3066 Beware that there is very little in terms of protection against
3067 this option being confused by leftover garbage in memory that might
3068 look like a DTB header after a reboot if no actual DTB is appended
3069 to vmlinux.bin. Do not leave this option active in a production kernel
3070 if you don't intend to always append a DTB.
3074 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3075 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3076 !MACH_LOONGSON64 && !MIPS_MALTA && \
3078 default MIPS_CMDLINE_FROM_BOOTLOADER
3080 config MIPS_CMDLINE_FROM_DTB
3082 bool "Dtb kernel arguments if available"
3084 config MIPS_CMDLINE_DTB_EXTEND
3086 bool "Extend dtb kernel arguments with bootloader arguments"
3088 config MIPS_CMDLINE_FROM_BOOTLOADER
3089 bool "Bootloader kernel arguments if available"
3091 config MIPS_CMDLINE_BUILTIN_EXTEND
3092 depends on CMDLINE_BOOL
3093 bool "Extend builtin kernel arguments with bootloader arguments"
3098 config LOCKDEP_SUPPORT
3102 config STACKTRACE_SUPPORT
3106 config PGTABLE_LEVELS
3108 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3109 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3112 config MIPS_AUTO_PFN_OFFSET
3115 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3117 config PCI_DRIVERS_GENERIC
3118 select PCI_DOMAINS_GENERIC if PCI
3121 config PCI_DRIVERS_LEGACY
3122 def_bool !PCI_DRIVERS_GENERIC
3123 select NO_GENERIC_PCI_IOPORT_MAP
3124 select PCI_DOMAINS if PCI
3127 # ISA support is now enabled via select. Too many systems still have the one
3128 # or other ISA chip on the board that users don't know about so don't expect
3129 # users to choose the right thing ...
3135 bool "TURBOchannel support"
3136 depends on MACH_DECSTATION
3138 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3139 processors. TURBOchannel programming specifications are available
3141 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3143 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3144 Linux driver support status is documented at:
3145 <http://www.linux-mips.org/wiki/DECstation>
3151 config ARCH_MMAP_RND_BITS_MIN
3155 config ARCH_MMAP_RND_BITS_MAX
3159 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3162 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3169 select MIPS_EXTERNAL_TIMER
3175 config MIPS32_COMPAT
3182 bool "Kernel support for o32 binaries"
3184 select ARCH_WANT_OLD_COMPAT_IPC
3186 select MIPS32_COMPAT
3188 Select this option if you want to run o32 binaries. These are pure
3189 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3190 existing binaries are in this format.
3195 bool "Kernel support for n32 binaries"
3197 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3199 select MIPS32_COMPAT
3201 Select this option if you want to run n32 binaries. These are
3202 64-bit binaries using 32-bit quantities for addressing and certain
3203 data that would normally be 64-bit. They are used in special
3208 config CC_HAS_MNO_BRANCH_LIKELY
3210 depends on $(cc-option,-mno-branch-likely)
3212 menu "Power management options"
3214 config ARCH_HIBERNATION_POSSIBLE
3216 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3218 config ARCH_SUSPEND_POSSIBLE
3220 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3222 source "kernel/power/Kconfig"
3226 config MIPS_EXTERNAL_TIMER
3229 menu "CPU Power Management"
3231 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3232 source "drivers/cpufreq/Kconfig"
3233 endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3235 source "drivers/cpuidle/Kconfig"
3239 source "arch/mips/kvm/Kconfig"
3241 source "arch/mips/vdso/Kconfig"