1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
8 select ARCH_HAS_FORTIFY_SOURCE
10 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
11 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
12 select ARCH_HAS_STRNCPY_FROM_USER
13 select ARCH_HAS_STRNLEN_USER
14 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
15 select ARCH_HAS_UBSAN_SANITIZE_ALL
16 select ARCH_HAS_GCOV_PROFILE_ALL
17 select ARCH_KEEP_MEMBLOCK
18 select ARCH_SUPPORTS_UPROBES
19 select ARCH_USE_BUILTIN_BSWAP
20 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
21 select ARCH_USE_MEMTEST
22 select ARCH_USE_QUEUED_RWLOCKS
23 select ARCH_USE_QUEUED_SPINLOCKS
24 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
25 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
26 select ARCH_WANT_IPC_PARSE_VERSION
27 select ARCH_WANT_LD_ORPHAN_WARN
28 select BUILDTIME_TABLE_SORT
29 select CLONE_BACKWARDS
30 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
31 select CPU_PM if CPU_IDLE
32 select GENERIC_ATOMIC64 if !64BIT
33 select GENERIC_CMOS_UPDATE
34 select GENERIC_CPU_AUTOPROBE
35 select GENERIC_FIND_FIRST_BIT
36 select GENERIC_GETTIMEOFDAY
38 select GENERIC_IRQ_PROBE
39 select GENERIC_IRQ_SHOW
40 select GENERIC_ISA_DMA if EISA
41 select GENERIC_LIB_ASHLDI3
42 select GENERIC_LIB_ASHRDI3
43 select GENERIC_LIB_CMPDI2
44 select GENERIC_LIB_LSHRDI3
45 select GENERIC_LIB_UCMPDI2
46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
47 select GENERIC_SMP_IDLE_THREAD
48 select GENERIC_TIME_VSYSCALL
49 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
50 select HANDLE_DOMAIN_IRQ
51 select HAVE_ARCH_COMPILER_H
52 select HAVE_ARCH_JUMP_LABEL
53 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
54 select HAVE_ARCH_MMAP_RND_BITS if MMU
55 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
56 select HAVE_ARCH_SECCOMP_FILTER
57 select HAVE_ARCH_TRACEHOOK
58 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
59 select HAVE_ASM_MODVERSIONS
60 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
61 select HAVE_CONTEXT_TRACKING
63 select HAVE_C_RECORDMCOUNT
64 select HAVE_DEBUG_KMEMLEAK
65 select HAVE_DEBUG_STACKOVERFLOW
66 select HAVE_DMA_CONTIGUOUS
67 select HAVE_DYNAMIC_FTRACE
68 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
69 select HAVE_EXIT_THREAD
71 select HAVE_FTRACE_MCOUNT_RECORD
72 select HAVE_FUNCTION_GRAPH_TRACER
73 select HAVE_FUNCTION_TRACER
74 select HAVE_GCC_PLUGINS
75 select HAVE_GENERIC_VDSO
76 select HAVE_IOREMAP_PROT
77 select HAVE_IRQ_EXIT_ON_IRQ_STACK
78 select HAVE_IRQ_TIME_ACCOUNTING
80 select HAVE_KRETPROBES
81 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
82 select HAVE_MOD_ARCH_SPECIFIC
84 select HAVE_PERF_EVENTS
86 select HAVE_PERF_USER_STACK_DUMP
87 select HAVE_REGS_AND_STACK_ACCESS_API
89 select HAVE_SPARSE_SYSCALL_NR
90 select HAVE_STACKPROTECTOR
91 select HAVE_SYSCALL_TRACEPOINTS
92 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
93 select IRQ_FORCED_THREADING
95 select MODULES_USE_ELF_REL if MODULES
96 select MODULES_USE_ELF_RELA if MODULES && 64BIT
97 select PERF_USE_VMALLOC
98 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
100 select SYSCTL_EXCEPTION_TRACE
101 select TRACE_IRQFLAGS_SUPPORT
103 select ARCH_HAS_ELFCORE_COMPAT
105 config MIPS_FIXUP_BIGPHYS_ADDR
113 select SYS_SUPPORTS_32BIT_KERNEL
114 select SYS_SUPPORTS_LITTLE_ENDIAN
115 select SYS_SUPPORTS_ZBOOT
116 select DMA_NONCOHERENT
117 select ARCH_HAS_SYNC_DMA_FOR_CPU
122 select GENERIC_IRQ_CHIP
123 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
125 select CPU_SUPPORTS_CPUFREQ
126 select MIPS_EXTERNAL_TIMER
128 menu "Machine selection"
132 default MIPS_GENERIC_KERNEL
134 config MIPS_GENERIC_KERNEL
135 bool "Generic board-agnostic MIPS kernel"
136 select ARCH_HAS_SETUP_DMA_OPS
141 select CLKSRC_MIPS_GIC
143 select CPU_MIPSR2_IRQ_EI
144 select CPU_MIPSR2_IRQ_VI
146 select DMA_NONCOHERENT
149 select MIPS_AUTO_PFN_OFFSET
150 select MIPS_CPU_SCACHE
152 select MIPS_L1_CACHE_SHIFT_7
153 select NO_EXCEPT_FILL
154 select PCI_DRIVERS_GENERIC
157 select SYS_HAS_CPU_MIPS32_R1
158 select SYS_HAS_CPU_MIPS32_R2
159 select SYS_HAS_CPU_MIPS32_R6
160 select SYS_HAS_CPU_MIPS64_R1
161 select SYS_HAS_CPU_MIPS64_R2
162 select SYS_HAS_CPU_MIPS64_R6
163 select SYS_SUPPORTS_32BIT_KERNEL
164 select SYS_SUPPORTS_64BIT_KERNEL
165 select SYS_SUPPORTS_BIG_ENDIAN
166 select SYS_SUPPORTS_HIGHMEM
167 select SYS_SUPPORTS_LITTLE_ENDIAN
168 select SYS_SUPPORTS_MICROMIPS
169 select SYS_SUPPORTS_MIPS16
170 select SYS_SUPPORTS_MIPS_CPS
171 select SYS_SUPPORTS_MULTITHREADING
172 select SYS_SUPPORTS_RELOCATABLE
173 select SYS_SUPPORTS_SMARTMIPS
174 select SYS_SUPPORTS_ZBOOT
176 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
177 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
178 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
179 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
180 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
181 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
184 Select this to build a kernel which aims to support multiple boards,
185 generally using a flattened device tree passed from the bootloader
186 using the boot protocol defined in the UHI (Unified Hosting
187 Interface) specification.
190 bool "Alchemy processor based machines"
191 select PHYS_ADDR_T_64BIT
195 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
196 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
197 select SYS_HAS_CPU_MIPS32_R1
198 select SYS_SUPPORTS_32BIT_KERNEL
199 select SYS_SUPPORTS_APM_EMULATION
201 select SYS_SUPPORTS_ZBOOT
205 bool "Texas Instruments AR7"
208 select DMA_NONCOHERENT
212 select NO_EXCEPT_FILL
214 select SYS_HAS_CPU_MIPS32_R1
215 select SYS_HAS_EARLY_PRINTK
216 select SYS_SUPPORTS_32BIT_KERNEL
217 select SYS_SUPPORTS_LITTLE_ENDIAN
218 select SYS_SUPPORTS_MIPS16
219 select SYS_SUPPORTS_ZBOOT_UART16550
223 Support for the Texas Instruments AR7 System-on-a-Chip
224 family: TNETD7100, 7200 and 7300.
227 bool "Atheros AR231x/AR531x SoC support"
230 select DMA_NONCOHERENT
233 select SYS_HAS_CPU_MIPS32_R1
234 select SYS_SUPPORTS_BIG_ENDIAN
235 select SYS_SUPPORTS_32BIT_KERNEL
236 select SYS_HAS_EARLY_PRINTK
238 Support for Atheros AR231x and Atheros AR531x based boards
241 bool "Atheros AR71XX/AR724X/AR913X based boards"
242 select ARCH_HAS_RESET_CONTROLLER
246 select DMA_NONCOHERENT
251 select SYS_HAS_CPU_MIPS32_R2
252 select SYS_HAS_EARLY_PRINTK
253 select SYS_SUPPORTS_32BIT_KERNEL
254 select SYS_SUPPORTS_BIG_ENDIAN
255 select SYS_SUPPORTS_MIPS16
256 select SYS_SUPPORTS_ZBOOT_UART_PROM
258 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
260 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
263 bool "Broadcom Generic BMIPS kernel"
264 select ARCH_HAS_RESET_CONTROLLER
265 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
266 select ARCH_HAS_PHYS_TO_DMA
268 select NO_EXCEPT_FILL
274 select BCM6345_L1_IRQ
275 select BCM7038_L1_IRQ
276 select BCM7120_L2_IRQ
277 select BRCMSTB_L2_IRQ
279 select DMA_NONCOHERENT
280 select SYS_SUPPORTS_32BIT_KERNEL
281 select SYS_SUPPORTS_LITTLE_ENDIAN
282 select SYS_SUPPORTS_BIG_ENDIAN
283 select SYS_SUPPORTS_HIGHMEM
284 select SYS_HAS_CPU_BMIPS32_3300
285 select SYS_HAS_CPU_BMIPS4350
286 select SYS_HAS_CPU_BMIPS4380
287 select SYS_HAS_CPU_BMIPS5000
289 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
290 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
291 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
292 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
293 select HARDIRQS_SW_RESEND
295 Build a generic DT-based kernel image that boots on select
296 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
297 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
298 must be set appropriately for your board.
301 bool "Broadcom BCM47XX based boards"
305 select DMA_NONCOHERENT
308 select SYS_HAS_CPU_MIPS32_R1
309 select NO_EXCEPT_FILL
310 select SYS_SUPPORTS_32BIT_KERNEL
311 select SYS_SUPPORTS_LITTLE_ENDIAN
312 select SYS_SUPPORTS_MIPS16
313 select SYS_SUPPORTS_ZBOOT
314 select SYS_HAS_EARLY_PRINTK
315 select USE_GENERIC_EARLY_PRINTK_8250
317 select LEDS_GPIO_REGISTER
320 select BCM47XX_SSB if !BCM47XX_BCMA
322 Support for BCM47XX based boards
325 bool "Broadcom BCM63XX based boards"
330 select DMA_NONCOHERENT
332 select SYS_SUPPORTS_32BIT_KERNEL
333 select SYS_SUPPORTS_BIG_ENDIAN
334 select SYS_HAS_EARLY_PRINTK
335 select SYS_HAS_CPU_BMIPS32_3300
336 select SYS_HAS_CPU_BMIPS4350
337 select SYS_HAS_CPU_BMIPS4380
340 select MIPS_L1_CACHE_SHIFT_4
341 select HAVE_LEGACY_CLK
343 Support for BCM63XX based boards
350 select DMA_NONCOHERENT
356 select PCI_GT64XXX_PCI0
357 select SYS_HAS_CPU_NEVADA
358 select SYS_HAS_EARLY_PRINTK
359 select SYS_SUPPORTS_32BIT_KERNEL
360 select SYS_SUPPORTS_64BIT_KERNEL
361 select SYS_SUPPORTS_LITTLE_ENDIAN
362 select USE_GENERIC_EARLY_PRINTK_8250
364 config MACH_DECSTATION
368 select CEVT_R4K if CPU_R4X00
370 select CSRC_R4K if CPU_R4X00
371 select CPU_DADDI_WORKAROUNDS if 64BIT
372 select CPU_R4000_WORKAROUNDS if 64BIT
373 select CPU_R4400_WORKAROUNDS if 64BIT
374 select DMA_NONCOHERENT
377 select SYS_HAS_CPU_R3000
378 select SYS_HAS_CPU_R4X00
379 select SYS_SUPPORTS_32BIT_KERNEL
380 select SYS_SUPPORTS_64BIT_KERNEL
381 select SYS_SUPPORTS_LITTLE_ENDIAN
382 select SYS_SUPPORTS_128HZ
383 select SYS_SUPPORTS_256HZ
384 select SYS_SUPPORTS_1024HZ
385 select MIPS_L1_CACHE_SHIFT_4
387 This enables support for DEC's MIPS based workstations. For details
388 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
389 DECstation porting pages on <http://decstation.unix-ag.org/>.
391 If you have one of the following DECstation Models you definitely
392 want to choose R4xx0 for the CPU Type:
399 otherwise choose R3000.
402 bool "Jazz family of machines"
405 select ARCH_MIGHT_HAVE_PC_PARPORT
406 select ARCH_MIGHT_HAVE_PC_SERIO
410 select ARCH_MAY_HAVE_PC_FDC
413 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
414 select GENERIC_ISA_DMA
415 select HAVE_PCSPKR_PLATFORM
420 select SYS_HAS_CPU_R4X00
421 select SYS_SUPPORTS_32BIT_KERNEL
422 select SYS_SUPPORTS_64BIT_KERNEL
423 select SYS_SUPPORTS_100HZ
424 select SYS_SUPPORTS_LITTLE_ENDIAN
426 This a family of machines based on the MIPS R4030 chipset which was
427 used by several vendors to build RISC/os and Windows NT workstations.
428 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
429 Olivetti M700-10 workstations.
431 config MACH_INGENIC_SOC
432 bool "Ingenic SoC based machines"
435 select SYS_SUPPORTS_ZBOOT_UART16550
436 select CPU_SUPPORTS_CPUFREQ
437 select MIPS_EXTERNAL_TIMER
440 bool "Lantiq based platforms"
441 select DMA_NONCOHERENT
445 select SYS_HAS_CPU_MIPS32_R1
446 select SYS_HAS_CPU_MIPS32_R2
447 select SYS_SUPPORTS_BIG_ENDIAN
448 select SYS_SUPPORTS_32BIT_KERNEL
449 select SYS_SUPPORTS_MIPS16
450 select SYS_SUPPORTS_MULTITHREADING
451 select SYS_SUPPORTS_VPE_LOADER
452 select SYS_HAS_EARLY_PRINTK
456 select HAVE_LEGACY_CLK
459 select PINCTRL_LANTIQ
460 select ARCH_HAS_RESET_CONTROLLER
461 select RESET_CONTROLLER
463 config MACH_LOONGSON32
464 bool "Loongson 32-bit family of machines"
465 select SYS_SUPPORTS_ZBOOT
467 This enables support for the Loongson-1 family of machines.
469 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
470 the Institute of Computing Technology (ICT), Chinese Academy of
473 config MACH_LOONGSON2EF
474 bool "Loongson-2E/F family of machines"
475 select SYS_SUPPORTS_ZBOOT
477 This enables the support of early Loongson-2E/F family of machines.
479 config MACH_LOONGSON64
480 bool "Loongson 64-bit family of machines"
481 select ARCH_SPARSEMEM_ENABLE
482 select ARCH_MIGHT_HAVE_PC_PARPORT
483 select ARCH_MIGHT_HAVE_PC_SERIO
484 select GENERIC_ISA_DMA_SUPPORT_BROKEN
494 select NO_EXCEPT_FILL
495 select NR_CPUS_DEFAULT_64
496 select USE_GENERIC_EARLY_PRINTK_8250
497 select PCI_DRIVERS_GENERIC
498 select SYS_HAS_CPU_LOONGSON64
499 select SYS_HAS_EARLY_PRINTK
500 select SYS_SUPPORTS_SMP
501 select SYS_SUPPORTS_HOTPLUG_CPU
502 select SYS_SUPPORTS_NUMA
503 select SYS_SUPPORTS_64BIT_KERNEL
504 select SYS_SUPPORTS_HIGHMEM
505 select SYS_SUPPORTS_LITTLE_ENDIAN
506 select SYS_SUPPORTS_ZBOOT
507 select SYS_SUPPORTS_RELOCATABLE
512 select PCI_HOST_GENERIC
514 This enables the support of Loongson-2/3 family of machines.
516 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
517 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
518 and Loongson-2F which will be removed), developed by the Institute
519 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
522 bool "MIPS Malta board"
523 select ARCH_MAY_HAVE_PC_FDC
524 select ARCH_MIGHT_HAVE_PC_PARPORT
525 select ARCH_MIGHT_HAVE_PC_SERIO
530 select CLKSRC_MIPS_GIC
533 select DMA_NONCOHERENT
534 select GENERIC_ISA_DMA
535 select HAVE_PCSPKR_PLATFORM
541 select MIPS_CPU_SCACHE
543 select MIPS_L1_CACHE_SHIFT_6
545 select PCI_GT64XXX_PCI0
548 select SYS_HAS_CPU_MIPS32_R1
549 select SYS_HAS_CPU_MIPS32_R2
550 select SYS_HAS_CPU_MIPS32_R3_5
551 select SYS_HAS_CPU_MIPS32_R5
552 select SYS_HAS_CPU_MIPS32_R6
553 select SYS_HAS_CPU_MIPS64_R1
554 select SYS_HAS_CPU_MIPS64_R2
555 select SYS_HAS_CPU_MIPS64_R6
556 select SYS_HAS_CPU_NEVADA
557 select SYS_HAS_CPU_RM7000
558 select SYS_SUPPORTS_32BIT_KERNEL
559 select SYS_SUPPORTS_64BIT_KERNEL
560 select SYS_SUPPORTS_BIG_ENDIAN
561 select SYS_SUPPORTS_HIGHMEM
562 select SYS_SUPPORTS_LITTLE_ENDIAN
563 select SYS_SUPPORTS_MICROMIPS
564 select SYS_SUPPORTS_MIPS16
565 select SYS_SUPPORTS_MIPS_CMP
566 select SYS_SUPPORTS_MIPS_CPS
567 select SYS_SUPPORTS_MULTITHREADING
568 select SYS_SUPPORTS_RELOCATABLE
569 select SYS_SUPPORTS_SMARTMIPS
570 select SYS_SUPPORTS_VPE_LOADER
571 select SYS_SUPPORTS_ZBOOT
573 select WAR_ICACHE_REFILLS
574 select ZONE_DMA32 if 64BIT
576 This enables support for the MIPS Technologies Malta evaluation
580 bool "Microchip PIC32 Family"
582 This enables support for the Microchip PIC32 family of platforms.
584 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
588 bool "NEC VR4100 series based machines"
591 select SYS_HAS_CPU_VR41XX
592 select SYS_SUPPORTS_MIPS16
595 config MACH_NINTENDO64
596 bool "Nintendo 64 console"
599 select SYS_HAS_CPU_R4300
600 select SYS_SUPPORTS_BIG_ENDIAN
601 select SYS_SUPPORTS_ZBOOT
602 select SYS_SUPPORTS_32BIT_KERNEL
603 select SYS_SUPPORTS_64BIT_KERNEL
604 select DMA_NONCOHERENT
608 bool "Ralink based machines"
613 select DMA_NONCOHERENT
616 select SYS_HAS_CPU_MIPS32_R1
617 select SYS_HAS_CPU_MIPS32_R2
618 select SYS_SUPPORTS_32BIT_KERNEL
619 select SYS_SUPPORTS_LITTLE_ENDIAN
620 select SYS_SUPPORTS_MIPS16
621 select SYS_SUPPORTS_ZBOOT
622 select SYS_HAS_EARLY_PRINTK
623 select ARCH_HAS_RESET_CONTROLLER
624 select RESET_CONTROLLER
626 config MACH_REALTEK_RTL
627 bool "Realtek RTL838x/RTL839x based machines"
629 select DMA_NONCOHERENT
633 select SYS_HAS_CPU_MIPS32_R1
634 select SYS_HAS_CPU_MIPS32_R2
635 select SYS_SUPPORTS_BIG_ENDIAN
636 select SYS_SUPPORTS_32BIT_KERNEL
637 select SYS_SUPPORTS_MIPS16
638 select SYS_SUPPORTS_MULTITHREADING
639 select SYS_SUPPORTS_VPE_LOADER
640 select SYS_HAS_EARLY_PRINTK
641 select SYS_HAS_EARLY_PRINTK_8250
642 select USE_GENERIC_EARLY_PRINTK_8250
648 bool "SGI IP22 (Indy/Indigo2)"
653 select ARCH_MIGHT_HAVE_PC_SERIO
657 select DEFAULT_SGI_PARTITION
658 select DMA_NONCOHERENT
662 select IP22_CPU_SCACHE
664 select GENERIC_ISA_DMA_SUPPORT_BROKEN
666 select SGI_HAS_INDYDOG
672 select SYS_HAS_CPU_R4X00
673 select SYS_HAS_CPU_R5000
674 select SYS_HAS_EARLY_PRINTK
675 select SYS_SUPPORTS_32BIT_KERNEL
676 select SYS_SUPPORTS_64BIT_KERNEL
677 select SYS_SUPPORTS_BIG_ENDIAN
678 select WAR_R4600_V1_INDEX_ICACHEOP
679 select WAR_R4600_V1_HIT_CACHEOP
680 select WAR_R4600_V2_HIT_CACHEOP
681 select MIPS_L1_CACHE_SHIFT_7
683 This are the SGI Indy, Challenge S and Indigo2, as well as certain
684 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
685 that runs on these, say Y here.
688 bool "SGI IP27 (Origin200/2000)"
689 select ARCH_HAS_PHYS_TO_DMA
690 select ARCH_SPARSEMEM_ENABLE
693 select ARC_CMDLINE_ONLY
695 select DEFAULT_SGI_PARTITION
697 select SYS_HAS_EARLY_PRINTK
700 select IRQ_DOMAIN_HIERARCHY
701 select NR_CPUS_DEFAULT_64
702 select PCI_DRIVERS_GENERIC
703 select PCI_XTALK_BRIDGE
704 select SYS_HAS_CPU_R10000
705 select SYS_SUPPORTS_64BIT_KERNEL
706 select SYS_SUPPORTS_BIG_ENDIAN
707 select SYS_SUPPORTS_NUMA
708 select SYS_SUPPORTS_SMP
709 select WAR_R10000_LLSC
710 select MIPS_L1_CACHE_SHIFT_7
713 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
714 workstations. To compile a Linux kernel that runs on these, say Y
718 bool "SGI IP28 (Indigo2 R10k)"
723 select ARCH_MIGHT_HAVE_PC_SERIO
727 select DEFAULT_SGI_PARTITION
728 select DMA_NONCOHERENT
729 select GENERIC_ISA_DMA_SUPPORT_BROKEN
735 select SGI_HAS_INDYDOG
741 select SYS_HAS_CPU_R10000
742 select SYS_HAS_EARLY_PRINTK
743 select SYS_SUPPORTS_64BIT_KERNEL
744 select SYS_SUPPORTS_BIG_ENDIAN
745 select WAR_R10000_LLSC
746 select MIPS_L1_CACHE_SHIFT_7
748 This is the SGI Indigo2 with R10000 processor. To compile a Linux
749 kernel that runs on these, say Y here.
752 bool "SGI IP30 (Octane/Octane2)"
753 select ARCH_HAS_PHYS_TO_DMA
760 select SYNC_R4K if SMP
764 select IRQ_DOMAIN_HIERARCHY
765 select NR_CPUS_DEFAULT_2
766 select PCI_DRIVERS_GENERIC
767 select PCI_XTALK_BRIDGE
768 select SYS_HAS_EARLY_PRINTK
769 select SYS_HAS_CPU_R10000
770 select SYS_SUPPORTS_64BIT_KERNEL
771 select SYS_SUPPORTS_BIG_ENDIAN
772 select SYS_SUPPORTS_SMP
773 select WAR_R10000_LLSC
774 select MIPS_L1_CACHE_SHIFT_7
777 These are the SGI Octane and Octane2 graphics workstations. To
778 compile a Linux kernel that runs on these, say Y here.
784 select ARCH_HAS_PHYS_TO_DMA
790 select DMA_NONCOHERENT
793 select R5000_CPU_SCACHE
794 select RM7000_CPU_SCACHE
795 select SYS_HAS_CPU_R5000
796 select SYS_HAS_CPU_R10000 if BROKEN
797 select SYS_HAS_CPU_RM7000
798 select SYS_HAS_CPU_NEVADA
799 select SYS_SUPPORTS_64BIT_KERNEL
800 select SYS_SUPPORTS_BIG_ENDIAN
801 select WAR_ICACHE_REFILLS
803 If you want this kernel to run on SGI O2 workstation, say Y here.
806 bool "Sibyte BCM91120C-CRhine"
808 select SIBYTE_BCM1120
810 select SYS_HAS_CPU_SB1
811 select SYS_SUPPORTS_BIG_ENDIAN
812 select SYS_SUPPORTS_LITTLE_ENDIAN
815 bool "Sibyte BCM91120x-Carmel"
817 select SIBYTE_BCM1120
819 select SYS_HAS_CPU_SB1
820 select SYS_SUPPORTS_BIG_ENDIAN
821 select SYS_SUPPORTS_LITTLE_ENDIAN
824 bool "Sibyte BCM91125C-CRhone"
826 select SIBYTE_BCM1125
828 select SYS_HAS_CPU_SB1
829 select SYS_SUPPORTS_BIG_ENDIAN
830 select SYS_SUPPORTS_HIGHMEM
831 select SYS_SUPPORTS_LITTLE_ENDIAN
834 bool "Sibyte BCM91125E-Rhone"
836 select SIBYTE_BCM1125H
838 select SYS_HAS_CPU_SB1
839 select SYS_SUPPORTS_BIG_ENDIAN
840 select SYS_SUPPORTS_LITTLE_ENDIAN
843 bool "Sibyte BCM91250A-SWARM"
845 select HAVE_PATA_PLATFORM
848 select SYS_HAS_CPU_SB1
849 select SYS_SUPPORTS_BIG_ENDIAN
850 select SYS_SUPPORTS_HIGHMEM
851 select SYS_SUPPORTS_LITTLE_ENDIAN
852 select ZONE_DMA32 if 64BIT
853 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
855 config SIBYTE_LITTLESUR
856 bool "Sibyte BCM91250C2-LittleSur"
858 select HAVE_PATA_PLATFORM
861 select SYS_HAS_CPU_SB1
862 select SYS_SUPPORTS_BIG_ENDIAN
863 select SYS_SUPPORTS_HIGHMEM
864 select SYS_SUPPORTS_LITTLE_ENDIAN
865 select ZONE_DMA32 if 64BIT
867 config SIBYTE_SENTOSA
868 bool "Sibyte BCM91250E-Sentosa"
872 select SYS_HAS_CPU_SB1
873 select SYS_SUPPORTS_BIG_ENDIAN
874 select SYS_SUPPORTS_LITTLE_ENDIAN
875 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
878 bool "Sibyte BCM91480B-BigSur"
880 select NR_CPUS_DEFAULT_4
881 select SIBYTE_BCM1x80
883 select SYS_HAS_CPU_SB1
884 select SYS_SUPPORTS_BIG_ENDIAN
885 select SYS_SUPPORTS_HIGHMEM
886 select SYS_SUPPORTS_LITTLE_ENDIAN
887 select ZONE_DMA32 if 64BIT
888 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
891 bool "SNI RM200/300/400"
894 select FW_ARC if CPU_LITTLE_ENDIAN
895 select FW_ARC32 if CPU_LITTLE_ENDIAN
896 select FW_SNIPROM if CPU_BIG_ENDIAN
897 select ARCH_MAY_HAVE_PC_FDC
898 select ARCH_MIGHT_HAVE_PC_PARPORT
899 select ARCH_MIGHT_HAVE_PC_SERIO
903 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
904 select DMA_NONCOHERENT
905 select GENERIC_ISA_DMA
907 select HAVE_PCSPKR_PLATFORM
913 select MIPS_L1_CACHE_SHIFT_6
914 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
915 select SYS_HAS_CPU_R4X00
916 select SYS_HAS_CPU_R5000
917 select SYS_HAS_CPU_R10000
918 select R5000_CPU_SCACHE
919 select SYS_HAS_EARLY_PRINTK
920 select SYS_SUPPORTS_32BIT_KERNEL
921 select SYS_SUPPORTS_64BIT_KERNEL
922 select SYS_SUPPORTS_BIG_ENDIAN
923 select SYS_SUPPORTS_HIGHMEM
924 select SYS_SUPPORTS_LITTLE_ENDIAN
925 select WAR_R4600_V2_HIT_CACHEOP
927 The SNI RM200/300/400 are MIPS-based machines manufactured by
928 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
929 Technology and now in turn merged with Fujitsu. Say Y here to
930 support this machine type.
933 bool "Toshiba TX39 series based machines"
936 bool "Toshiba TX49 series based machines"
937 select WAR_TX49XX_ICACHE_INDEX_INV
939 config MIKROTIK_RB532
940 bool "Mikrotik RB532 boards"
943 select DMA_NONCOHERENT
946 select SYS_HAS_CPU_MIPS32_R1
947 select SYS_SUPPORTS_32BIT_KERNEL
948 select SYS_SUPPORTS_LITTLE_ENDIAN
952 select MIPS_L1_CACHE_SHIFT_4
954 Support the Mikrotik(tm) RouterBoard 532 series,
955 based on the IDT RC32434 SoC.
957 config CAVIUM_OCTEON_SOC
958 bool "Cavium Networks Octeon SoC based boards"
960 select ARCH_HAS_PHYS_TO_DMA
962 select PHYS_ADDR_T_64BIT
963 select SYS_SUPPORTS_64BIT_KERNEL
964 select SYS_SUPPORTS_BIG_ENDIAN
966 select EDAC_ATOMIC_SCRUB
967 select SYS_SUPPORTS_LITTLE_ENDIAN
968 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
969 select SYS_HAS_EARLY_PRINTK
970 select SYS_HAS_CPU_CAVIUM_OCTEON
972 select HAVE_PLAT_DELAY
973 select HAVE_PLAT_FW_INIT_CMDLINE
974 select HAVE_PLAT_MEMCPY
978 select ARCH_SPARSEMEM_ENABLE
979 select SYS_SUPPORTS_SMP
980 select NR_CPUS_DEFAULT_64
981 select MIPS_NR_CPU_NR_MAP_1024
984 select MTD_COMPLEX_MAPPINGS
986 select SYS_SUPPORTS_RELOCATABLE
988 This option supports all of the Octeon reference boards from Cavium
989 Networks. It builds a kernel that dynamically determines the Octeon
990 CPU type and supports all known board reference implementations.
991 Some of the supported boards are:
998 Say Y here for most Octeon reference boards.
1000 config NLM_XLR_BOARD
1001 bool "Netlogic XLR/XLS based systems"
1004 select SYS_HAS_CPU_XLR
1005 select SYS_SUPPORTS_SMP
1007 select SWAP_IO_SPACE
1008 select SYS_SUPPORTS_32BIT_KERNEL
1009 select SYS_SUPPORTS_64BIT_KERNEL
1010 select PHYS_ADDR_T_64BIT
1011 select SYS_SUPPORTS_BIG_ENDIAN
1012 select SYS_SUPPORTS_HIGHMEM
1013 select NR_CPUS_DEFAULT_32
1017 select ZONE_DMA32 if 64BIT
1019 select SYS_HAS_EARLY_PRINTK
1020 select SYS_SUPPORTS_ZBOOT
1021 select SYS_SUPPORTS_ZBOOT_UART16550
1023 Support for systems based on Netlogic XLR and XLS processors.
1024 Say Y here if you have a XLR or XLS based board.
1026 config NLM_XLP_BOARD
1027 bool "Netlogic XLP based systems"
1030 select SYS_HAS_CPU_XLP
1031 select SYS_SUPPORTS_SMP
1033 select SYS_SUPPORTS_32BIT_KERNEL
1034 select SYS_SUPPORTS_64BIT_KERNEL
1035 select PHYS_ADDR_T_64BIT
1037 select SYS_SUPPORTS_BIG_ENDIAN
1038 select SYS_SUPPORTS_LITTLE_ENDIAN
1039 select SYS_SUPPORTS_HIGHMEM
1040 select NR_CPUS_DEFAULT_32
1044 select ZONE_DMA32 if 64BIT
1046 select SYS_HAS_EARLY_PRINTK
1048 select SYS_SUPPORTS_ZBOOT
1049 select SYS_SUPPORTS_ZBOOT_UART16550
1051 This board is based on Netlogic XLP Processor.
1052 Say Y here if you have a XLP based board.
1056 source "arch/mips/alchemy/Kconfig"
1057 source "arch/mips/ath25/Kconfig"
1058 source "arch/mips/ath79/Kconfig"
1059 source "arch/mips/bcm47xx/Kconfig"
1060 source "arch/mips/bcm63xx/Kconfig"
1061 source "arch/mips/bmips/Kconfig"
1062 source "arch/mips/generic/Kconfig"
1063 source "arch/mips/ingenic/Kconfig"
1064 source "arch/mips/jazz/Kconfig"
1065 source "arch/mips/lantiq/Kconfig"
1066 source "arch/mips/pic32/Kconfig"
1067 source "arch/mips/ralink/Kconfig"
1068 source "arch/mips/sgi-ip27/Kconfig"
1069 source "arch/mips/sibyte/Kconfig"
1070 source "arch/mips/txx9/Kconfig"
1071 source "arch/mips/vr41xx/Kconfig"
1072 source "arch/mips/cavium-octeon/Kconfig"
1073 source "arch/mips/loongson2ef/Kconfig"
1074 source "arch/mips/loongson32/Kconfig"
1075 source "arch/mips/loongson64/Kconfig"
1076 source "arch/mips/netlogic/Kconfig"
1080 config GENERIC_HWEIGHT
1084 config GENERIC_CALIBRATE_DELAY
1088 config SCHED_OMIT_FRAME_POINTER
1093 # Select some configuration options automatically based on user selections.
1098 config ARCH_MAY_HAVE_PC_FDC
1129 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1135 config MIPS_CLOCK_VSYSCALL
1136 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1145 config ARCH_SUPPORTS_UPROBES
1148 config DMA_PERDEV_COHERENT
1150 select ARCH_HAS_SETUP_DMA_OPS
1151 select DMA_NONCOHERENT
1153 config DMA_NONCOHERENT
1156 # MIPS allows mixing "slightly different" Cacheability and Coherency
1157 # Attribute bits. It is believed that the uncached access through
1158 # KSEG1 and the implementation specific "uncached accelerated" used
1159 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1160 # significant advantages.
1162 select ARCH_HAS_DMA_WRITE_COMBINE
1163 select ARCH_HAS_DMA_PREP_COHERENT
1164 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1165 select ARCH_HAS_DMA_SET_UNCACHED
1166 select DMA_NONCOHERENT_MMAP
1167 select NEED_DMA_MAP_STATE
1169 config SYS_HAS_EARLY_PRINTK
1172 config SYS_SUPPORTS_HOTPLUG_CPU
1175 config MIPS_BONITO64
1184 config NO_IOPORT_MAP
1188 def_bool CPU_NO_LOAD_STORE_LR
1190 config GENERIC_ISA_DMA
1192 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1195 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1197 select GENERIC_ISA_DMA
1199 config HAVE_PLAT_DELAY
1202 config HAVE_PLAT_FW_INIT_CMDLINE
1205 config HAVE_PLAT_MEMCPY
1211 config SYS_SUPPORTS_RELOCATABLE
1214 Selected if the platform supports relocating the kernel.
1215 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1216 to allow access to command line and entropy sources.
1218 config MIPS_CBPF_JIT
1220 depends on BPF_JIT && HAVE_CBPF_JIT
1222 config MIPS_EBPF_JIT
1224 depends on BPF_JIT && HAVE_EBPF_JIT
1228 # Endianness selection. Sufficiently obscure so many users don't know what to
1229 # answer,so we try hard to limit the available choices. Also the use of a
1230 # choice statement should be more obvious to the user.
1233 prompt "Endianness selection"
1235 Some MIPS machines can be configured for either little or big endian
1236 byte order. These modes require different kernels and a different
1237 Linux distribution. In general there is one preferred byteorder for a
1238 particular system but some systems are just as commonly used in the
1239 one or the other endianness.
1241 config CPU_BIG_ENDIAN
1243 depends on SYS_SUPPORTS_BIG_ENDIAN
1245 config CPU_LITTLE_ENDIAN
1246 bool "Little endian"
1247 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1254 config SYS_SUPPORTS_APM_EMULATION
1257 config SYS_SUPPORTS_BIG_ENDIAN
1260 config SYS_SUPPORTS_LITTLE_ENDIAN
1263 config MIPS_HUGE_TLB_SUPPORT
1264 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1278 config PCI_GT64XXX_PCI0
1281 config PCI_XTALK_BRIDGE
1284 config NO_EXCEPT_FILL
1290 config SWAP_IO_SPACE
1293 config SGI_HAS_INDYDOG
1305 config SGI_HAS_ZILOG
1308 config SGI_HAS_I8042
1311 config DEFAULT_SGI_PARTITION
1323 config MIPS_L1_CACHE_SHIFT_4
1326 config MIPS_L1_CACHE_SHIFT_5
1329 config MIPS_L1_CACHE_SHIFT_6
1332 config MIPS_L1_CACHE_SHIFT_7
1335 config MIPS_L1_CACHE_SHIFT
1337 default "7" if MIPS_L1_CACHE_SHIFT_7
1338 default "6" if MIPS_L1_CACHE_SHIFT_6
1339 default "5" if MIPS_L1_CACHE_SHIFT_5
1340 default "4" if MIPS_L1_CACHE_SHIFT_4
1343 config ARC_CMDLINE_ONLY
1347 bool "ARC console support"
1348 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1362 menu "CPU selection"
1368 config CPU_LOONGSON64
1369 bool "Loongson 64-bit CPU"
1370 depends on SYS_HAS_CPU_LOONGSON64
1371 select ARCH_HAS_PHYS_TO_DMA
1373 select CPU_HAS_PREFETCH
1374 select CPU_SUPPORTS_64BIT_KERNEL
1375 select CPU_SUPPORTS_HIGHMEM
1376 select CPU_SUPPORTS_HUGEPAGES
1377 select CPU_SUPPORTS_MSA
1378 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1379 select CPU_MIPSR2_IRQ_VI
1380 select WEAK_ORDERING
1381 select WEAK_REORDERING_BEYOND_LLSC
1382 select MIPS_ASID_BITS_VARIABLE
1383 select MIPS_PGD_C0_CONTEXT
1384 select MIPS_L1_CACHE_SHIFT_6
1385 select MIPS_FP_SUPPORT
1390 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1391 cores implements the MIPS64R2 instruction set with many extensions,
1392 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1393 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1394 Loongson-2E/2F is not covered here and will be removed in future.
1396 config LOONGSON3_ENHANCEMENT
1397 bool "New Loongson-3 CPU Enhancements"
1399 depends on CPU_LOONGSON64
1401 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1402 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1403 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1404 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1405 Fast TLB refill support, etc.
1407 This option enable those enhancements which are not probed at run
1408 time. If you want a generic kernel to run on all Loongson 3 machines,
1409 please say 'N' here. If you want a high-performance kernel to run on
1410 new Loongson-3 machines only, please say 'Y' here.
1412 config CPU_LOONGSON3_WORKAROUNDS
1413 bool "Old Loongson-3 LLSC Workarounds"
1415 depends on CPU_LOONGSON64
1417 Loongson-3 processors have the llsc issues which require workarounds.
1418 Without workarounds the system may hang unexpectedly.
1420 Newer Loongson-3 will fix these issues and no workarounds are needed.
1421 The workarounds have no significant side effect on them but may
1422 decrease the performance of the system so this option should be
1423 disabled unless the kernel is intended to be run on old systems.
1425 If unsure, please say Y.
1427 config CPU_LOONGSON3_CPUCFG_EMULATION
1428 bool "Emulate the CPUCFG instruction on older Loongson cores"
1430 depends on CPU_LOONGSON64
1432 Loongson-3A R4 and newer have the CPUCFG instruction available for
1433 userland to query CPU capabilities, much like CPUID on x86. This
1434 option provides emulation of the instruction on older Loongson
1435 cores, back to Loongson-3A1000.
1437 If unsure, please say Y.
1439 config CPU_LOONGSON2E
1441 depends on SYS_HAS_CPU_LOONGSON2E
1442 select CPU_LOONGSON2EF
1444 The Loongson 2E processor implements the MIPS III instruction set
1445 with many extensions.
1447 It has an internal FPGA northbridge, which is compatible to
1450 config CPU_LOONGSON2F
1452 depends on SYS_HAS_CPU_LOONGSON2F
1453 select CPU_LOONGSON2EF
1456 The Loongson 2F processor implements the MIPS III instruction set
1457 with many extensions.
1459 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1460 have a similar programming interface with FPGA northbridge used in
1463 config CPU_LOONGSON1B
1465 depends on SYS_HAS_CPU_LOONGSON1B
1466 select CPU_LOONGSON32
1467 select LEDS_GPIO_REGISTER
1469 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1470 Release 1 instruction set and part of the MIPS32 Release 2
1473 config CPU_LOONGSON1C
1475 depends on SYS_HAS_CPU_LOONGSON1C
1476 select CPU_LOONGSON32
1477 select LEDS_GPIO_REGISTER
1479 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1480 Release 1 instruction set and part of the MIPS32 Release 2
1483 config CPU_MIPS32_R1
1484 bool "MIPS32 Release 1"
1485 depends on SYS_HAS_CPU_MIPS32_R1
1486 select CPU_HAS_PREFETCH
1487 select CPU_SUPPORTS_32BIT_KERNEL
1488 select CPU_SUPPORTS_HIGHMEM
1490 Choose this option to build a kernel for release 1 or later of the
1491 MIPS32 architecture. Most modern embedded systems with a 32-bit
1492 MIPS processor are based on a MIPS32 processor. If you know the
1493 specific type of processor in your system, choose those that one
1494 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1495 Release 2 of the MIPS32 architecture is available since several
1496 years so chances are you even have a MIPS32 Release 2 processor
1497 in which case you should choose CPU_MIPS32_R2 instead for better
1500 config CPU_MIPS32_R2
1501 bool "MIPS32 Release 2"
1502 depends on SYS_HAS_CPU_MIPS32_R2
1503 select CPU_HAS_PREFETCH
1504 select CPU_SUPPORTS_32BIT_KERNEL
1505 select CPU_SUPPORTS_HIGHMEM
1506 select CPU_SUPPORTS_MSA
1509 Choose this option to build a kernel for release 2 or later of the
1510 MIPS32 architecture. Most modern embedded systems with a 32-bit
1511 MIPS processor are based on a MIPS32 processor. If you know the
1512 specific type of processor in your system, choose those that one
1513 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1515 config CPU_MIPS32_R5
1516 bool "MIPS32 Release 5"
1517 depends on SYS_HAS_CPU_MIPS32_R5
1518 select CPU_HAS_PREFETCH
1519 select CPU_SUPPORTS_32BIT_KERNEL
1520 select CPU_SUPPORTS_HIGHMEM
1521 select CPU_SUPPORTS_MSA
1523 select MIPS_O32_FP64_SUPPORT
1525 Choose this option to build a kernel for release 5 or later of the
1526 MIPS32 architecture. New MIPS processors, starting with the Warrior
1527 family, are based on a MIPS32r5 processor. If you own an older
1528 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1530 config CPU_MIPS32_R6
1531 bool "MIPS32 Release 6"
1532 depends on SYS_HAS_CPU_MIPS32_R6
1533 select CPU_HAS_PREFETCH
1534 select CPU_NO_LOAD_STORE_LR
1535 select CPU_SUPPORTS_32BIT_KERNEL
1536 select CPU_SUPPORTS_HIGHMEM
1537 select CPU_SUPPORTS_MSA
1539 select MIPS_O32_FP64_SUPPORT
1541 Choose this option to build a kernel for release 6 or later of the
1542 MIPS32 architecture. New MIPS processors, starting with the Warrior
1543 family, are based on a MIPS32r6 processor. If you own an older
1544 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1546 config CPU_MIPS64_R1
1547 bool "MIPS64 Release 1"
1548 depends on SYS_HAS_CPU_MIPS64_R1
1549 select CPU_HAS_PREFETCH
1550 select CPU_SUPPORTS_32BIT_KERNEL
1551 select CPU_SUPPORTS_64BIT_KERNEL
1552 select CPU_SUPPORTS_HIGHMEM
1553 select CPU_SUPPORTS_HUGEPAGES
1555 Choose this option to build a kernel for release 1 or later of the
1556 MIPS64 architecture. Many modern embedded systems with a 64-bit
1557 MIPS processor are based on a MIPS64 processor. If you know the
1558 specific type of processor in your system, choose those that one
1559 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1560 Release 2 of the MIPS64 architecture is available since several
1561 years so chances are you even have a MIPS64 Release 2 processor
1562 in which case you should choose CPU_MIPS64_R2 instead for better
1565 config CPU_MIPS64_R2
1566 bool "MIPS64 Release 2"
1567 depends on SYS_HAS_CPU_MIPS64_R2
1568 select CPU_HAS_PREFETCH
1569 select CPU_SUPPORTS_32BIT_KERNEL
1570 select CPU_SUPPORTS_64BIT_KERNEL
1571 select CPU_SUPPORTS_HIGHMEM
1572 select CPU_SUPPORTS_HUGEPAGES
1573 select CPU_SUPPORTS_MSA
1576 Choose this option to build a kernel for release 2 or later of the
1577 MIPS64 architecture. Many modern embedded systems with a 64-bit
1578 MIPS processor are based on a MIPS64 processor. If you know the
1579 specific type of processor in your system, choose those that one
1580 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1582 config CPU_MIPS64_R5
1583 bool "MIPS64 Release 5"
1584 depends on SYS_HAS_CPU_MIPS64_R5
1585 select CPU_HAS_PREFETCH
1586 select CPU_SUPPORTS_32BIT_KERNEL
1587 select CPU_SUPPORTS_64BIT_KERNEL
1588 select CPU_SUPPORTS_HIGHMEM
1589 select CPU_SUPPORTS_HUGEPAGES
1590 select CPU_SUPPORTS_MSA
1591 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1594 Choose this option to build a kernel for release 5 or later of the
1595 MIPS64 architecture. This is a intermediate MIPS architecture
1596 release partly implementing release 6 features. Though there is no
1597 any hardware known to be based on this release.
1599 config CPU_MIPS64_R6
1600 bool "MIPS64 Release 6"
1601 depends on SYS_HAS_CPU_MIPS64_R6
1602 select CPU_HAS_PREFETCH
1603 select CPU_NO_LOAD_STORE_LR
1604 select CPU_SUPPORTS_32BIT_KERNEL
1605 select CPU_SUPPORTS_64BIT_KERNEL
1606 select CPU_SUPPORTS_HIGHMEM
1607 select CPU_SUPPORTS_HUGEPAGES
1608 select CPU_SUPPORTS_MSA
1609 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1612 Choose this option to build a kernel for release 6 or later of the
1613 MIPS64 architecture. New MIPS processors, starting with the Warrior
1614 family, are based on a MIPS64r6 processor. If you own an older
1615 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1618 bool "MIPS Warrior P5600"
1619 depends on SYS_HAS_CPU_P5600
1620 select CPU_HAS_PREFETCH
1621 select CPU_SUPPORTS_32BIT_KERNEL
1622 select CPU_SUPPORTS_HIGHMEM
1623 select CPU_SUPPORTS_MSA
1624 select CPU_SUPPORTS_CPUFREQ
1625 select CPU_MIPSR2_IRQ_VI
1626 select CPU_MIPSR2_IRQ_EI
1628 select MIPS_O32_FP64_SUPPORT
1630 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1631 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1632 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1633 level features like up to six P5600 calculation cores, CM2 with L2
1634 cache, IOCU/IOMMU (though might be unused depending on the system-
1635 specific IP core configuration), GIC, CPC, virtualisation module,
1640 depends on SYS_HAS_CPU_R3000
1643 select CPU_SUPPORTS_32BIT_KERNEL
1644 select CPU_SUPPORTS_HIGHMEM
1646 Please make sure to pick the right CPU type. Linux/MIPS is not
1647 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1648 *not* work on R4000 machines and vice versa. However, since most
1649 of the supported machines have an R4000 (or similar) CPU, R4x00
1650 might be a safe bet. If the resulting kernel does not work,
1651 try to recompile with R3000.
1655 depends on SYS_HAS_CPU_TX39XX
1656 select CPU_SUPPORTS_32BIT_KERNEL
1661 depends on SYS_HAS_CPU_VR41XX
1662 select CPU_SUPPORTS_32BIT_KERNEL
1663 select CPU_SUPPORTS_64BIT_KERNEL
1665 The options selects support for the NEC VR4100 series of processors.
1666 Only choose this option if you have one of these processors as a
1667 kernel built with this option will not run on any other type of
1668 processor or vice versa.
1672 depends on SYS_HAS_CPU_R4300
1673 select CPU_SUPPORTS_32BIT_KERNEL
1674 select CPU_SUPPORTS_64BIT_KERNEL
1675 select CPU_HAS_LOAD_STORE_LR
1677 MIPS Technologies R4300-series processors.
1681 depends on SYS_HAS_CPU_R4X00
1682 select CPU_SUPPORTS_32BIT_KERNEL
1683 select CPU_SUPPORTS_64BIT_KERNEL
1684 select CPU_SUPPORTS_HUGEPAGES
1686 MIPS Technologies R4000-series processors other than 4300, including
1687 the R4000, R4400, R4600, and 4700.
1691 depends on SYS_HAS_CPU_TX49XX
1692 select CPU_HAS_PREFETCH
1693 select CPU_SUPPORTS_32BIT_KERNEL
1694 select CPU_SUPPORTS_64BIT_KERNEL
1695 select CPU_SUPPORTS_HUGEPAGES
1699 depends on SYS_HAS_CPU_R5000
1700 select CPU_SUPPORTS_32BIT_KERNEL
1701 select CPU_SUPPORTS_64BIT_KERNEL
1702 select CPU_SUPPORTS_HUGEPAGES
1704 MIPS Technologies R5000-series processors other than the Nevada.
1708 depends on SYS_HAS_CPU_R5500
1709 select CPU_SUPPORTS_32BIT_KERNEL
1710 select CPU_SUPPORTS_64BIT_KERNEL
1711 select CPU_SUPPORTS_HUGEPAGES
1713 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1718 depends on SYS_HAS_CPU_NEVADA
1719 select CPU_SUPPORTS_32BIT_KERNEL
1720 select CPU_SUPPORTS_64BIT_KERNEL
1721 select CPU_SUPPORTS_HUGEPAGES
1723 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1727 depends on SYS_HAS_CPU_R10000
1728 select CPU_HAS_PREFETCH
1729 select CPU_SUPPORTS_32BIT_KERNEL
1730 select CPU_SUPPORTS_64BIT_KERNEL
1731 select CPU_SUPPORTS_HIGHMEM
1732 select CPU_SUPPORTS_HUGEPAGES
1734 MIPS Technologies R10000-series processors.
1738 depends on SYS_HAS_CPU_RM7000
1739 select CPU_HAS_PREFETCH
1740 select CPU_SUPPORTS_32BIT_KERNEL
1741 select CPU_SUPPORTS_64BIT_KERNEL
1742 select CPU_SUPPORTS_HIGHMEM
1743 select CPU_SUPPORTS_HUGEPAGES
1747 depends on SYS_HAS_CPU_SB1
1748 select CPU_SUPPORTS_32BIT_KERNEL
1749 select CPU_SUPPORTS_64BIT_KERNEL
1750 select CPU_SUPPORTS_HIGHMEM
1751 select CPU_SUPPORTS_HUGEPAGES
1752 select WEAK_ORDERING
1754 config CPU_CAVIUM_OCTEON
1755 bool "Cavium Octeon processor"
1756 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1757 select CPU_HAS_PREFETCH
1758 select CPU_SUPPORTS_64BIT_KERNEL
1759 select WEAK_ORDERING
1760 select CPU_SUPPORTS_HIGHMEM
1761 select CPU_SUPPORTS_HUGEPAGES
1762 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1763 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1764 select MIPS_L1_CACHE_SHIFT_7
1767 The Cavium Octeon processor is a highly integrated chip containing
1768 many ethernet hardware widgets for networking tasks. The processor
1769 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1770 Full details can be found at http://www.caviumnetworks.com.
1773 bool "Broadcom BMIPS"
1774 depends on SYS_HAS_CPU_BMIPS
1776 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1777 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1778 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1779 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1780 select CPU_SUPPORTS_32BIT_KERNEL
1781 select DMA_NONCOHERENT
1783 select SWAP_IO_SPACE
1784 select WEAK_ORDERING
1785 select CPU_SUPPORTS_HIGHMEM
1786 select CPU_HAS_PREFETCH
1787 select CPU_SUPPORTS_CPUFREQ
1788 select MIPS_EXTERNAL_TIMER
1790 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1793 bool "Netlogic XLR SoC"
1794 depends on SYS_HAS_CPU_XLR
1795 select CPU_SUPPORTS_32BIT_KERNEL
1796 select CPU_SUPPORTS_64BIT_KERNEL
1797 select CPU_SUPPORTS_HIGHMEM
1798 select CPU_SUPPORTS_HUGEPAGES
1799 select WEAK_ORDERING
1800 select WEAK_REORDERING_BEYOND_LLSC
1802 Netlogic Microsystems XLR/XLS processors.
1805 bool "Netlogic XLP SoC"
1806 depends on SYS_HAS_CPU_XLP
1807 select CPU_SUPPORTS_32BIT_KERNEL
1808 select CPU_SUPPORTS_64BIT_KERNEL
1809 select CPU_SUPPORTS_HIGHMEM
1810 select WEAK_ORDERING
1811 select WEAK_REORDERING_BEYOND_LLSC
1812 select CPU_HAS_PREFETCH
1814 select CPU_SUPPORTS_HUGEPAGES
1815 select MIPS_ASID_BITS_VARIABLE
1817 Netlogic Microsystems XLP processors.
1820 config CPU_MIPS32_3_5_FEATURES
1821 bool "MIPS32 Release 3.5 Features"
1822 depends on SYS_HAS_CPU_MIPS32_R3_5
1823 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1826 Choose this option to build a kernel for release 2 or later of the
1827 MIPS32 architecture including features from the 3.5 release such as
1828 support for Enhanced Virtual Addressing (EVA).
1830 config CPU_MIPS32_3_5_EVA
1831 bool "Enhanced Virtual Addressing (EVA)"
1832 depends on CPU_MIPS32_3_5_FEATURES
1836 Choose this option if you want to enable the Enhanced Virtual
1837 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1838 One of its primary benefits is an increase in the maximum size
1839 of lowmem (up to 3GB). If unsure, say 'N' here.
1841 config CPU_MIPS32_R5_FEATURES
1842 bool "MIPS32 Release 5 Features"
1843 depends on SYS_HAS_CPU_MIPS32_R5
1844 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1846 Choose this option to build a kernel for release 2 or later of the
1847 MIPS32 architecture including features from release 5 such as
1848 support for Extended Physical Addressing (XPA).
1850 config CPU_MIPS32_R5_XPA
1851 bool "Extended Physical Addressing (XPA)"
1852 depends on CPU_MIPS32_R5_FEATURES
1854 depends on !PAGE_SIZE_4KB
1855 depends on SYS_SUPPORTS_HIGHMEM
1858 select PHYS_ADDR_T_64BIT
1861 Choose this option if you want to enable the Extended Physical
1862 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1863 benefit is to increase physical addressing equal to or greater
1864 than 40 bits. Note that this has the side effect of turning on
1865 64-bit addressing which in turn makes the PTEs 64-bit in size.
1866 If unsure, say 'N' here.
1869 config CPU_NOP_WORKAROUNDS
1872 config CPU_JUMP_WORKAROUNDS
1875 config CPU_LOONGSON2F_WORKAROUNDS
1876 bool "Loongson 2F Workarounds"
1878 select CPU_NOP_WORKAROUNDS
1879 select CPU_JUMP_WORKAROUNDS
1881 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1882 require workarounds. Without workarounds the system may hang
1883 unexpectedly. For more information please refer to the gas
1884 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1886 Loongson 2F03 and later have fixed these issues and no workarounds
1887 are needed. The workarounds have no significant side effect on them
1888 but may decrease the performance of the system so this option should
1889 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1892 If unsure, please say Y.
1893 endif # CPU_LOONGSON2F
1895 config SYS_SUPPORTS_ZBOOT
1897 select HAVE_KERNEL_GZIP
1898 select HAVE_KERNEL_BZIP2
1899 select HAVE_KERNEL_LZ4
1900 select HAVE_KERNEL_LZMA
1901 select HAVE_KERNEL_LZO
1902 select HAVE_KERNEL_XZ
1903 select HAVE_KERNEL_ZSTD
1905 config SYS_SUPPORTS_ZBOOT_UART16550
1907 select SYS_SUPPORTS_ZBOOT
1909 config SYS_SUPPORTS_ZBOOT_UART_PROM
1911 select SYS_SUPPORTS_ZBOOT
1913 config CPU_LOONGSON2EF
1915 select CPU_SUPPORTS_32BIT_KERNEL
1916 select CPU_SUPPORTS_64BIT_KERNEL
1917 select CPU_SUPPORTS_HIGHMEM
1918 select CPU_SUPPORTS_HUGEPAGES
1919 select ARCH_HAS_PHYS_TO_DMA
1921 config CPU_LOONGSON32
1925 select CPU_HAS_PREFETCH
1926 select CPU_SUPPORTS_32BIT_KERNEL
1927 select CPU_SUPPORTS_HIGHMEM
1928 select CPU_SUPPORTS_CPUFREQ
1930 config CPU_BMIPS32_3300
1931 select SMP_UP if SMP
1934 config CPU_BMIPS4350
1936 select SYS_SUPPORTS_SMP
1937 select SYS_SUPPORTS_HOTPLUG_CPU
1939 config CPU_BMIPS4380
1941 select MIPS_L1_CACHE_SHIFT_6
1942 select SYS_SUPPORTS_SMP
1943 select SYS_SUPPORTS_HOTPLUG_CPU
1946 config CPU_BMIPS5000
1948 select MIPS_CPU_SCACHE
1949 select MIPS_L1_CACHE_SHIFT_7
1950 select SYS_SUPPORTS_SMP
1951 select SYS_SUPPORTS_HOTPLUG_CPU
1954 config SYS_HAS_CPU_LOONGSON64
1956 select CPU_SUPPORTS_CPUFREQ
1959 config SYS_HAS_CPU_LOONGSON2E
1962 config SYS_HAS_CPU_LOONGSON2F
1964 select CPU_SUPPORTS_CPUFREQ
1965 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1967 config SYS_HAS_CPU_LOONGSON1B
1970 config SYS_HAS_CPU_LOONGSON1C
1973 config SYS_HAS_CPU_MIPS32_R1
1976 config SYS_HAS_CPU_MIPS32_R2
1979 config SYS_HAS_CPU_MIPS32_R3_5
1982 config SYS_HAS_CPU_MIPS32_R5
1984 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1986 config SYS_HAS_CPU_MIPS32_R6
1988 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1990 config SYS_HAS_CPU_MIPS64_R1
1993 config SYS_HAS_CPU_MIPS64_R2
1996 config SYS_HAS_CPU_MIPS64_R5
1998 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2000 config SYS_HAS_CPU_MIPS64_R6
2002 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2004 config SYS_HAS_CPU_P5600
2006 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2008 config SYS_HAS_CPU_R3000
2011 config SYS_HAS_CPU_TX39XX
2014 config SYS_HAS_CPU_VR41XX
2017 config SYS_HAS_CPU_R4300
2020 config SYS_HAS_CPU_R4X00
2023 config SYS_HAS_CPU_TX49XX
2026 config SYS_HAS_CPU_R5000
2029 config SYS_HAS_CPU_R5500
2032 config SYS_HAS_CPU_NEVADA
2035 config SYS_HAS_CPU_R10000
2037 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2039 config SYS_HAS_CPU_RM7000
2042 config SYS_HAS_CPU_SB1
2045 config SYS_HAS_CPU_CAVIUM_OCTEON
2048 config SYS_HAS_CPU_BMIPS
2051 config SYS_HAS_CPU_BMIPS32_3300
2053 select SYS_HAS_CPU_BMIPS
2055 config SYS_HAS_CPU_BMIPS4350
2057 select SYS_HAS_CPU_BMIPS
2059 config SYS_HAS_CPU_BMIPS4380
2061 select SYS_HAS_CPU_BMIPS
2063 config SYS_HAS_CPU_BMIPS5000
2065 select SYS_HAS_CPU_BMIPS
2066 select ARCH_HAS_SYNC_DMA_FOR_CPU
2068 config SYS_HAS_CPU_XLR
2071 config SYS_HAS_CPU_XLP
2075 # CPU may reorder R->R, R->W, W->R, W->W
2076 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2078 config WEAK_ORDERING
2082 # CPU may reorder reads and writes beyond LL/SC
2083 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2085 config WEAK_REORDERING_BEYOND_LLSC
2090 # These two indicate any level of the MIPS32 and MIPS64 architecture
2094 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2095 CPU_MIPS32_R6 || CPU_P5600
2099 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2100 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2103 # These indicate the revision of the architecture
2107 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2111 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2113 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2118 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2120 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2125 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2127 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2128 select HAVE_ARCH_BITREVERSE
2129 select MIPS_ASID_BITS_VARIABLE
2130 select MIPS_CRC_SUPPORT
2133 config TARGET_ISA_REV
2135 default 1 if CPU_MIPSR1
2136 default 2 if CPU_MIPSR2
2137 default 5 if CPU_MIPSR5
2138 default 6 if CPU_MIPSR6
2141 Reflects the ISA revision being targeted by the kernel build. This
2142 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2150 config SYS_SUPPORTS_32BIT_KERNEL
2152 config SYS_SUPPORTS_64BIT_KERNEL
2154 config CPU_SUPPORTS_32BIT_KERNEL
2156 config CPU_SUPPORTS_64BIT_KERNEL
2158 config CPU_SUPPORTS_CPUFREQ
2160 config CPU_SUPPORTS_ADDRWINCFG
2162 config CPU_SUPPORTS_HUGEPAGES
2164 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2165 config MIPS_PGD_C0_CONTEXT
2168 default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2171 # Set to y for ptrace access to watch registers.
2173 config HARDWARE_WATCHPOINTS
2175 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2180 prompt "Kernel code model"
2182 You should only select this option if you have a workload that
2183 actually benefits from 64-bit processing or if your machine has
2184 large memory. You will only be presented a single option in this
2185 menu if your system does not support both 32-bit and 64-bit kernels.
2188 bool "32-bit kernel"
2189 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2192 Select this option if you want to build a 32-bit kernel.
2195 bool "64-bit kernel"
2196 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2198 Select this option if you want to build a 64-bit kernel.
2202 config MIPS_VA_BITS_48
2203 bool "48 bits virtual memory"
2206 Support a maximum at least 48 bits of application virtual
2207 memory. Default is 40 bits or less, depending on the CPU.
2208 For page sizes 16k and above, this option results in a small
2209 memory overhead for page tables. For 4k page size, a fourth
2210 level of page tables is added which imposes both a memory
2211 overhead as well as slower TLB fault handling.
2216 prompt "Kernel page size"
2217 default PAGE_SIZE_4KB
2219 config PAGE_SIZE_4KB
2221 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2223 This option select the standard 4kB Linux page size. On some
2224 R3000-family processors this is the only available page size. Using
2225 4kB page size will minimize memory consumption and is therefore
2226 recommended for low memory systems.
2228 config PAGE_SIZE_8KB
2230 depends on CPU_CAVIUM_OCTEON
2231 depends on !MIPS_VA_BITS_48
2233 Using 8kB page size will result in higher performance kernel at
2234 the price of higher memory consumption. This option is available
2235 only on cnMIPS processors. Note that you will need a suitable Linux
2236 distribution to support this.
2238 config PAGE_SIZE_16KB
2240 depends on !CPU_R3000 && !CPU_TX39XX
2242 Using 16kB page size will result in higher performance kernel at
2243 the price of higher memory consumption. This option is available on
2244 all non-R3000 family processors. Note that you will need a suitable
2245 Linux distribution to support this.
2247 config PAGE_SIZE_32KB
2249 depends on CPU_CAVIUM_OCTEON
2250 depends on !MIPS_VA_BITS_48
2252 Using 32kB page size will result in higher performance kernel at
2253 the price of higher memory consumption. This option is available
2254 only on cnMIPS cores. Note that you will need a suitable Linux
2255 distribution to support this.
2257 config PAGE_SIZE_64KB
2259 depends on !CPU_R3000 && !CPU_TX39XX
2261 Using 64kB page size will result in higher performance kernel at
2262 the price of higher memory consumption. This option is available on
2263 all non-R3000 family processor. Not that at the time of this
2264 writing this option is still high experimental.
2268 config FORCE_MAX_ZONEORDER
2269 int "Maximum zone order"
2270 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2271 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2272 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2273 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2274 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2275 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2279 The kernel memory allocator divides physically contiguous memory
2280 blocks into "zones", where each zone is a power of two number of
2281 pages. This option selects the largest power of two that the kernel
2282 keeps in the memory allocator. If you need to allocate very large
2283 blocks of physically contiguous memory, then you may need to
2284 increase this value.
2286 This config option is actually maximum order plus one. For example,
2287 a value of 11 means that the largest free memory block is 2^10 pages.
2289 The page size is not necessarily 4KB. Keep this in mind
2290 when choosing a value for this option.
2295 config IP22_CPU_SCACHE
2300 # Support for a MIPS32 / MIPS64 style S-caches
2302 config MIPS_CPU_SCACHE
2306 config R5000_CPU_SCACHE
2310 config RM7000_CPU_SCACHE
2314 config SIBYTE_DMA_PAGEOPS
2315 bool "Use DMA to clear/copy pages"
2318 Instead of using the CPU to zero and copy pages, use a Data Mover
2319 channel. These DMA channels are otherwise unused by the standard
2320 SiByte Linux port. Seems to give a small performance benefit.
2322 config CPU_HAS_PREFETCH
2325 config CPU_GENERIC_DUMP_TLB
2327 default y if !(CPU_R3000 || CPU_TX39XX)
2329 config MIPS_FP_SUPPORT
2330 bool "Floating Point support" if EXPERT
2333 Select y to include support for floating point in the kernel
2334 including initialization of FPU hardware, FP context save & restore
2335 and emulation of an FPU where necessary. Without this support any
2336 userland program attempting to use floating point instructions will
2339 If you know that your userland will not attempt to use floating point
2340 instructions then you can say n here to shrink the kernel a little.
2344 config CPU_R2300_FPU
2346 depends on MIPS_FP_SUPPORT
2347 default y if CPU_R3000 || CPU_TX39XX
2354 depends on MIPS_FP_SUPPORT
2355 default y if !CPU_R2300_FPU
2357 config CPU_R4K_CACHE_TLB
2359 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2362 bool "MIPS MT SMP support (1 TC on each available VPE)"
2364 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2365 select CPU_MIPSR2_IRQ_VI
2366 select CPU_MIPSR2_IRQ_EI
2371 select SYS_SUPPORTS_SMP
2372 select SYS_SUPPORTS_SCHED_SMT
2373 select MIPS_PERF_SHARED_TC_COUNTERS
2375 This is a kernel model which is known as SMVP. This is supported
2376 on cores with the MT ASE and uses the available VPEs to implement
2377 virtual processors which supports SMP. This is equivalent to the
2378 Intel Hyperthreading feature. For further information go to
2379 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2385 bool "SMT (multithreading) scheduler support"
2386 depends on SYS_SUPPORTS_SCHED_SMT
2389 SMT scheduler support improves the CPU scheduler's decision making
2390 when dealing with MIPS MT enabled cores at a cost of slightly
2391 increased overhead in some places. If unsure say N here.
2393 config SYS_SUPPORTS_SCHED_SMT
2396 config SYS_SUPPORTS_MULTITHREADING
2399 config MIPS_MT_FPAFF
2400 bool "Dynamic FPU affinity for FP-intensive threads"
2402 depends on MIPS_MT_SMP
2404 config MIPSR2_TO_R6_EMULATOR
2405 bool "MIPS R2-to-R6 emulator"
2406 depends on CPU_MIPSR6
2407 depends on MIPS_FP_SUPPORT
2410 Choose this option if you want to run non-R6 MIPS userland code.
2411 Even if you say 'Y' here, the emulator will still be disabled by
2412 default. You can enable it using the 'mipsr2emu' kernel option.
2413 The only reason this is a build-time option is to save ~14K from the
2416 config SYS_SUPPORTS_VPE_LOADER
2418 depends on SYS_SUPPORTS_MULTITHREADING
2420 Indicates that the platform supports the VPE loader, and provides
2423 config MIPS_VPE_LOADER
2424 bool "VPE loader support."
2425 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2426 select CPU_MIPSR2_IRQ_VI
2427 select CPU_MIPSR2_IRQ_EI
2430 Includes a loader for loading an elf relocatable object
2431 onto another VPE and running it.
2433 config MIPS_VPE_LOADER_CMP
2436 depends on MIPS_VPE_LOADER && MIPS_CMP
2438 config MIPS_VPE_LOADER_MT
2441 depends on MIPS_VPE_LOADER && !MIPS_CMP
2443 config MIPS_VPE_LOADER_TOM
2444 bool "Load VPE program into memory hidden from linux"
2445 depends on MIPS_VPE_LOADER
2448 The loader can use memory that is present but has been hidden from
2449 Linux using the kernel command line option "mem=xxMB". It's up to
2450 you to ensure the amount you put in the option and the space your
2451 program requires is less or equal to the amount physically present.
2453 config MIPS_VPE_APSP_API
2454 bool "Enable support for AP/SP API (RTLX)"
2455 depends on MIPS_VPE_LOADER
2457 config MIPS_VPE_APSP_API_CMP
2460 depends on MIPS_VPE_APSP_API && MIPS_CMP
2462 config MIPS_VPE_APSP_API_MT
2465 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2468 bool "MIPS CMP framework support (DEPRECATED)"
2469 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2472 select SYS_SUPPORTS_SMP
2473 select WEAK_ORDERING
2476 Select this if you are using a bootloader which implements the "CMP
2477 framework" protocol (ie. YAMON) and want your kernel to make use of
2478 its ability to start secondary CPUs.
2480 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2484 bool "MIPS Coherent Processing System support"
2485 depends on SYS_SUPPORTS_MIPS_CPS
2487 select MIPS_CPS_PM if HOTPLUG_CPU
2489 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2490 select SYS_SUPPORTS_HOTPLUG_CPU
2491 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2492 select SYS_SUPPORTS_SMP
2493 select WEAK_ORDERING
2494 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2496 Select this if you wish to run an SMP kernel across multiple cores
2497 within a MIPS Coherent Processing System. When this option is
2498 enabled the kernel will probe for other cores and boot them with
2499 no external assistance. It is safe to enable this when hardware
2500 support is unavailable.
2513 config SB1_PASS_2_WORKAROUNDS
2515 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2518 config SB1_PASS_2_1_WORKAROUNDS
2520 depends on CPU_SB1 && CPU_SB1_PASS_2
2524 prompt "SmartMIPS or microMIPS ASE support"
2526 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2529 Select this if you want neither microMIPS nor SmartMIPS support
2531 config CPU_HAS_SMARTMIPS
2532 depends on SYS_SUPPORTS_SMARTMIPS
2535 SmartMIPS is a extension of the MIPS32 architecture aimed at
2536 increased security at both hardware and software level for
2537 smartcards. Enabling this option will allow proper use of the
2538 SmartMIPS instructions by Linux applications. However a kernel with
2539 this option will not work on a MIPS core without SmartMIPS core. If
2540 you don't know you probably don't have SmartMIPS and should say N
2543 config CPU_MICROMIPS
2544 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2547 When this option is enabled the kernel will be built using the
2553 bool "Support for the MIPS SIMD Architecture"
2554 depends on CPU_SUPPORTS_MSA
2555 depends on MIPS_FP_SUPPORT
2556 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2558 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2559 and a set of SIMD instructions to operate on them. When this option
2560 is enabled the kernel will support allocating & switching MSA
2561 vector register contexts. If you know that your kernel will only be
2562 running on CPUs which do not support MSA or that your userland will
2563 not be making use of it then you may wish to say N here to reduce
2564 the size & complexity of your kernel.
2575 depends on !CPU_DIEI_BROKEN
2578 config CPU_DIEI_BROKEN
2584 config CPU_NO_LOAD_STORE_LR
2587 CPU lacks support for unaligned load and store instructions:
2588 LWL, LWR, SWL, SWR (Load/store word left/right).
2589 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2593 # Vectored interrupt mode is an R2 feature
2595 config CPU_MIPSR2_IRQ_VI
2599 # Extended interrupt mode is an R2 feature
2601 config CPU_MIPSR2_IRQ_EI
2606 depends on !CPU_R3000
2612 config CPU_DADDI_WORKAROUNDS
2615 config CPU_R4000_WORKAROUNDS
2617 select CPU_R4400_WORKAROUNDS
2619 config CPU_R4400_WORKAROUNDS
2622 config CPU_R4X00_BUGS64
2624 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2626 config MIPS_ASID_SHIFT
2628 default 6 if CPU_R3000 || CPU_TX39XX
2631 config MIPS_ASID_BITS
2633 default 0 if MIPS_ASID_BITS_VARIABLE
2634 default 6 if CPU_R3000 || CPU_TX39XX
2637 config MIPS_ASID_BITS_VARIABLE
2640 config MIPS_CRC_SUPPORT
2643 # R4600 erratum. Due to the lack of errata information the exact
2644 # technical details aren't known. I've experimentally found that disabling
2645 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2647 config WAR_R4600_V1_INDEX_ICACHEOP
2650 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2652 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2653 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2654 # executed if there is no other dcache activity. If the dcache is
2655 # accessed for another instruction immediately preceding when these
2656 # cache instructions are executing, it is possible that the dcache
2657 # tag match outputs used by these cache instructions will be
2658 # incorrect. These cache instructions should be preceded by at least
2659 # four instructions that are not any kind of load or store
2662 # This is not allowed: lw
2666 # cache Hit_Writeback_Invalidate_D
2668 # This is allowed: lw
2673 # cache Hit_Writeback_Invalidate_D
2674 config WAR_R4600_V1_HIT_CACHEOP
2677 # Writeback and invalidate the primary cache dcache before DMA.
2679 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2680 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2681 # operate correctly if the internal data cache refill buffer is empty. These
2682 # CACHE instructions should be separated from any potential data cache miss
2683 # by a load instruction to an uncached address to empty the response buffer."
2684 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2686 config WAR_R4600_V2_HIT_CACHEOP
2689 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2690 # the line which this instruction itself exists, the following
2691 # operation is not guaranteed."
2693 # Workaround: do two phase flushing for Index_Invalidate_I
2694 config WAR_TX49XX_ICACHE_INDEX_INV
2697 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2698 # opposes it being called that) where invalid instructions in the same
2699 # I-cache line worth of instructions being fetched may case spurious
2701 config WAR_ICACHE_REFILLS
2704 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2705 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2706 config WAR_R10000_LLSC
2709 # 34K core erratum: "Problems Executing the TLBR Instruction"
2710 config WAR_MIPS34K_MISSED_ITLB
2714 # - Highmem only makes sense for the 32-bit kernel.
2715 # - The current highmem code will only work properly on physically indexed
2716 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2717 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2718 # moment we protect the user and offer the highmem option only on machines
2719 # where it's known to be safe. This will not offer highmem on a few systems
2720 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2721 # indexed CPUs but we're playing safe.
2722 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2723 # know they might have memory configurations that could make use of highmem
2727 bool "High Memory Support"
2728 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2731 config CPU_SUPPORTS_HIGHMEM
2734 config SYS_SUPPORTS_HIGHMEM
2737 config SYS_SUPPORTS_SMARTMIPS
2740 config SYS_SUPPORTS_MICROMIPS
2743 config SYS_SUPPORTS_MIPS16
2746 This option must be set if a kernel might be executed on a MIPS16-
2747 enabled CPU even if MIPS16 is not actually being used. In other
2748 words, it makes the kernel MIPS16-tolerant.
2750 config CPU_SUPPORTS_MSA
2753 config ARCH_FLATMEM_ENABLE
2755 depends on !NUMA && !CPU_LOONGSON2EF
2757 config ARCH_SPARSEMEM_ENABLE
2759 select SPARSEMEM_STATIC if !SGI_IP27
2763 depends on SYS_SUPPORTS_NUMA
2766 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2767 Access). This option improves performance on systems with more
2768 than two nodes; on two node systems it is generally better to
2769 leave it disabled; on single node systems leave this option
2772 config SYS_SUPPORTS_NUMA
2775 config HAVE_SETUP_PER_CPU_AREA
2779 config NEED_PER_CPU_EMBED_FIRST_CHUNK
2784 bool "Relocatable kernel"
2785 depends on SYS_SUPPORTS_RELOCATABLE
2786 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2787 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2788 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2789 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2792 This builds a kernel image that retains relocation information
2793 so it can be loaded someplace besides the default 1MB.
2794 The relocations make the kernel binary about 15% larger,
2795 but are discarded at runtime
2797 config RELOCATION_TABLE_SIZE
2798 hex "Relocation table size"
2799 depends on RELOCATABLE
2800 range 0x0 0x01000000
2801 default "0x00200000" if CPU_LOONGSON64
2802 default "0x00100000"
2804 A table of relocation data will be appended to the kernel binary
2805 and parsed at boot to fix up the relocated kernel.
2807 This option allows the amount of space reserved for the table to be
2808 adjusted, although the default of 1Mb should be ok in most cases.
2810 The build will fail and a valid size suggested if this is too small.
2812 If unsure, leave at the default value.
2814 config RANDOMIZE_BASE
2815 bool "Randomize the address of the kernel image"
2816 depends on RELOCATABLE
2818 Randomizes the physical and virtual address at which the
2819 kernel image is loaded, as a security feature that
2820 deters exploit attempts relying on knowledge of the location
2821 of kernel internals.
2823 Entropy is generated using any coprocessor 0 registers available.
2825 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2829 config RANDOMIZE_BASE_MAX_OFFSET
2830 hex "Maximum kASLR offset" if EXPERT
2831 depends on RANDOMIZE_BASE
2832 range 0x0 0x40000000 if EVA || 64BIT
2833 range 0x0 0x08000000
2834 default "0x01000000"
2836 When kASLR is active, this provides the maximum offset that will
2837 be applied to the kernel image. It should be set according to the
2838 amount of physical RAM available in the target system minus
2839 PHYSICAL_START and must be a power of 2.
2841 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2842 EVA or 64-bit. The default is 16Mb.
2849 config HW_PERF_EVENTS
2850 bool "Enable hardware performance counter support for perf events"
2851 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2854 Enable hardware performance counter support for perf events. If
2855 disabled, perf events will use software events only.
2858 bool "Enable DMI scanning"
2859 depends on MACH_LOONGSON64
2860 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2863 Enabled scanning of DMI to identify machine quirks. Say Y
2864 here unless you have verified that your setup is not
2865 affected by entries in the DMI blacklist. Required by PNP
2869 bool "Multi-Processing support"
2870 depends on SYS_SUPPORTS_SMP
2872 This enables support for systems with more than one CPU. If you have
2873 a system with only one CPU, say N. If you have a system with more
2874 than one CPU, say Y.
2876 If you say N here, the kernel will run on uni- and multiprocessor
2877 machines, but will use only one CPU of a multiprocessor machine. If
2878 you say Y here, the kernel will run on many, but not all,
2879 uniprocessor machines. On a uniprocessor machine, the kernel
2880 will run faster if you say N here.
2882 People using multiprocessor machines who say Y here should also say
2883 Y to "Enhanced Real Time Clock Support", below.
2885 See also the SMP-HOWTO available at
2886 <https://www.tldp.org/docs.html#howto>.
2888 If you don't know what to do here, say N.
2891 bool "Support for hot-pluggable CPUs"
2892 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2894 Say Y here to allow turning CPUs off and on. CPUs can be
2895 controlled through /sys/devices/system/cpu.
2896 (Note: power management support will enable this option
2897 automatically on SMP systems. )
2898 Say N if you want to disable CPU hotplug.
2903 config SYS_SUPPORTS_MIPS_CMP
2906 config SYS_SUPPORTS_MIPS_CPS
2909 config SYS_SUPPORTS_SMP
2912 config NR_CPUS_DEFAULT_4
2915 config NR_CPUS_DEFAULT_8
2918 config NR_CPUS_DEFAULT_16
2921 config NR_CPUS_DEFAULT_32
2924 config NR_CPUS_DEFAULT_64
2928 int "Maximum number of CPUs (2-256)"
2931 default "4" if NR_CPUS_DEFAULT_4
2932 default "8" if NR_CPUS_DEFAULT_8
2933 default "16" if NR_CPUS_DEFAULT_16
2934 default "32" if NR_CPUS_DEFAULT_32
2935 default "64" if NR_CPUS_DEFAULT_64
2937 This allows you to specify the maximum number of CPUs which this
2938 kernel will support. The maximum supported value is 32 for 32-bit
2939 kernel and 64 for 64-bit kernels; the minimum value which makes
2940 sense is 1 for Qemu (useful only for kernel debugging purposes)
2941 and 2 for all others.
2943 This is purely to save memory - each supported CPU adds
2944 approximately eight kilobytes to the kernel image. For best
2945 performance should round up your number of processors to the next
2948 config MIPS_PERF_SHARED_TC_COUNTERS
2951 config MIPS_NR_CPU_NR_MAP_1024
2954 config MIPS_NR_CPU_NR_MAP
2957 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2958 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2961 # Timer Interrupt Frequency Configuration
2965 prompt "Timer frequency"
2968 Allows the configuration of the timer frequency.
2971 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2974 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2977 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2980 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2983 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2986 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2989 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2992 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2996 config SYS_SUPPORTS_24HZ
2999 config SYS_SUPPORTS_48HZ
3002 config SYS_SUPPORTS_100HZ
3005 config SYS_SUPPORTS_128HZ
3008 config SYS_SUPPORTS_250HZ
3011 config SYS_SUPPORTS_256HZ
3014 config SYS_SUPPORTS_1000HZ
3017 config SYS_SUPPORTS_1024HZ
3020 config SYS_SUPPORTS_ARBIT_HZ
3022 default y if !SYS_SUPPORTS_24HZ && \
3023 !SYS_SUPPORTS_48HZ && \
3024 !SYS_SUPPORTS_100HZ && \
3025 !SYS_SUPPORTS_128HZ && \
3026 !SYS_SUPPORTS_250HZ && \
3027 !SYS_SUPPORTS_256HZ && \
3028 !SYS_SUPPORTS_1000HZ && \
3029 !SYS_SUPPORTS_1024HZ
3035 default 100 if HZ_100
3036 default 128 if HZ_128
3037 default 250 if HZ_250
3038 default 256 if HZ_256
3039 default 1000 if HZ_1000
3040 default 1024 if HZ_1024
3043 def_bool HIGH_RES_TIMERS
3046 bool "Kexec system call"
3049 kexec is a system call that implements the ability to shutdown your
3050 current kernel, and to start another kernel. It is like a reboot
3051 but it is independent of the system firmware. And like a reboot
3052 you can start any kernel with it, not just Linux.
3054 The name comes from the similarity to the exec system call.
3056 It is an ongoing process to be certain the hardware in a machine
3057 is properly shutdown, so do not be surprised if this code does not
3058 initially work for you. As of this writing the exact hardware
3059 interface is strongly in flux, so no good recommendation can be
3063 bool "Kernel crash dumps"
3065 Generate crash dump after being started by kexec.
3066 This should be normally only set in special crash dump kernels
3067 which are loaded in the main kernel with kexec-tools into
3068 a specially reserved region and then later executed after
3069 a crash by kdump/kexec. The crash dump kernel must be compiled
3070 to a memory address not used by the main kernel or firmware using
3073 config PHYSICAL_START
3074 hex "Physical address where the kernel is loaded"
3075 default "0xffffffff84000000"
3076 depends on CRASH_DUMP
3078 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3079 If you plan to use kernel for capturing the crash dump change
3080 this value to start of the reserved region (the "X" value as
3081 specified in the "crashkernel=YM@XM" command line boot parameter
3082 passed to the panic-ed kernel).
3084 config MIPS_O32_FP64_SUPPORT
3085 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3086 depends on 32BIT || MIPS32_O32
3088 When this is enabled, the kernel will support use of 64-bit floating
3089 point registers with binaries using the O32 ABI along with the
3090 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3091 32-bit MIPS systems this support is at the cost of increasing the
3092 size and complexity of the compiled FPU emulator. Thus if you are
3093 running a MIPS32 system and know that none of your userland binaries
3094 will require 64-bit floating point, you may wish to reduce the size
3095 of your kernel & potentially improve FP emulation performance by
3098 Although binutils currently supports use of this flag the details
3099 concerning its effect upon the O32 ABI in userland are still being
3100 worked on. In order to avoid userland becoming dependent upon current
3101 behaviour before the details have been finalised, this option should
3102 be considered experimental and only enabled by those working upon
3110 select OF_EARLY_FLATTREE
3120 prompt "Kernel appended dtb support" if USE_OF
3121 default MIPS_NO_APPENDED_DTB
3123 config MIPS_NO_APPENDED_DTB
3126 Do not enable appended dtb support.
3128 config MIPS_ELF_APPENDED_DTB
3131 With this option, the boot code will look for a device tree binary
3132 DTB) included in the vmlinux ELF section .appended_dtb. By default
3133 it is empty and the DTB can be appended using binutils command
3136 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3138 This is meant as a backward compatibility convenience for those
3139 systems with a bootloader that can't be upgraded to accommodate
3140 the documented boot protocol using a device tree.
3142 config MIPS_RAW_APPENDED_DTB
3143 bool "vmlinux.bin or vmlinuz.bin"
3145 With this option, the boot code will look for a device tree binary
3146 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3147 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3149 This is meant as a backward compatibility convenience for those
3150 systems with a bootloader that can't be upgraded to accommodate
3151 the documented boot protocol using a device tree.
3153 Beware that there is very little in terms of protection against
3154 this option being confused by leftover garbage in memory that might
3155 look like a DTB header after a reboot if no actual DTB is appended
3156 to vmlinux.bin. Do not leave this option active in a production kernel
3157 if you don't intend to always append a DTB.
3161 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3162 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3163 !MACH_LOONGSON64 && !MIPS_MALTA && \
3165 default MIPS_CMDLINE_FROM_BOOTLOADER
3167 config MIPS_CMDLINE_FROM_DTB
3169 bool "Dtb kernel arguments if available"
3171 config MIPS_CMDLINE_DTB_EXTEND
3173 bool "Extend dtb kernel arguments with bootloader arguments"
3175 config MIPS_CMDLINE_FROM_BOOTLOADER
3176 bool "Bootloader kernel arguments if available"
3178 config MIPS_CMDLINE_BUILTIN_EXTEND
3179 depends on CMDLINE_BOOL
3180 bool "Extend builtin kernel arguments with bootloader arguments"
3185 config LOCKDEP_SUPPORT
3189 config STACKTRACE_SUPPORT
3193 config PGTABLE_LEVELS
3195 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3196 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3199 config MIPS_AUTO_PFN_OFFSET
3202 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3204 config PCI_DRIVERS_GENERIC
3205 select PCI_DOMAINS_GENERIC if PCI
3208 config PCI_DRIVERS_LEGACY
3209 def_bool !PCI_DRIVERS_GENERIC
3210 select NO_GENERIC_PCI_IOPORT_MAP
3211 select PCI_DOMAINS if PCI
3214 # ISA support is now enabled via select. Too many systems still have the one
3215 # or other ISA chip on the board that users don't know about so don't expect
3216 # users to choose the right thing ...
3222 bool "TURBOchannel support"
3223 depends on MACH_DECSTATION
3225 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3226 processors. TURBOchannel programming specifications are available
3228 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3230 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3231 Linux driver support status is documented at:
3232 <http://www.linux-mips.org/wiki/DECstation>
3238 config ARCH_MMAP_RND_BITS_MIN
3242 config ARCH_MMAP_RND_BITS_MAX
3246 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3249 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3256 select MIPS_EXTERNAL_TIMER
3262 config MIPS32_COMPAT
3268 config SYSVIPC_COMPAT
3272 bool "Kernel support for o32 binaries"
3274 select ARCH_WANT_OLD_COMPAT_IPC
3276 select MIPS32_COMPAT
3277 select SYSVIPC_COMPAT if SYSVIPC
3279 Select this option if you want to run o32 binaries. These are pure
3280 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3281 existing binaries are in this format.
3286 bool "Kernel support for n32 binaries"
3288 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3290 select MIPS32_COMPAT
3291 select SYSVIPC_COMPAT if SYSVIPC
3293 Select this option if you want to run n32 binaries. These are
3294 64-bit binaries using 32-bit quantities for addressing and certain
3295 data that would normally be 64-bit. They are used in special
3300 menu "Power management options"
3302 config ARCH_HIBERNATION_POSSIBLE
3304 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3306 config ARCH_SUSPEND_POSSIBLE
3308 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3310 source "kernel/power/Kconfig"
3314 config MIPS_EXTERNAL_TIMER
3317 menu "CPU Power Management"
3319 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3320 source "drivers/cpufreq/Kconfig"
3323 source "drivers/cpuidle/Kconfig"
3327 source "arch/mips/kvm/Kconfig"
3329 source "arch/mips/vdso/Kconfig"