1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_CPU_FINALIZE_INIT
8 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
9 select ARCH_HAS_FORTIFY_SOURCE
11 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
12 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
13 select ARCH_HAS_STRNCPY_FROM_USER
14 select ARCH_HAS_STRNLEN_USER
15 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
16 select ARCH_HAS_UBSAN_SANITIZE_ALL
17 select ARCH_HAS_GCOV_PROFILE_ALL
18 select ARCH_KEEP_MEMBLOCK
19 select ARCH_SUPPORTS_UPROBES
20 select ARCH_USE_BUILTIN_BSWAP
21 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
22 select ARCH_USE_MEMTEST
23 select ARCH_USE_QUEUED_RWLOCKS
24 select ARCH_USE_QUEUED_SPINLOCKS
25 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
26 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
27 select ARCH_WANT_IPC_PARSE_VERSION
28 select ARCH_WANT_LD_ORPHAN_WARN
29 select BUILDTIME_TABLE_SORT
30 select CLONE_BACKWARDS
31 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
32 select CPU_PM if CPU_IDLE
33 select GENERIC_ATOMIC64 if !64BIT
34 select GENERIC_CMOS_UPDATE
35 select GENERIC_CPU_AUTOPROBE
36 select GENERIC_FIND_FIRST_BIT
37 select GENERIC_GETTIMEOFDAY
39 select GENERIC_IRQ_PROBE
40 select GENERIC_IRQ_SHOW
41 select GENERIC_ISA_DMA if EISA
42 select GENERIC_LIB_ASHLDI3
43 select GENERIC_LIB_ASHRDI3
44 select GENERIC_LIB_CMPDI2
45 select GENERIC_LIB_LSHRDI3
46 select GENERIC_LIB_UCMPDI2
47 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
48 select GENERIC_SMP_IDLE_THREAD
49 select GENERIC_TIME_VSYSCALL
50 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
51 select HANDLE_DOMAIN_IRQ
52 select HAVE_ARCH_COMPILER_H
53 select HAVE_ARCH_JUMP_LABEL
54 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
55 select HAVE_ARCH_MMAP_RND_BITS if MMU
56 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
57 select HAVE_ARCH_SECCOMP_FILTER
58 select HAVE_ARCH_TRACEHOOK
59 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
60 select HAVE_ASM_MODVERSIONS
61 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
62 select HAVE_CONTEXT_TRACKING
64 select HAVE_C_RECORDMCOUNT
65 select HAVE_DEBUG_KMEMLEAK
66 select HAVE_DEBUG_STACKOVERFLOW
67 select HAVE_DMA_CONTIGUOUS
68 select HAVE_DYNAMIC_FTRACE
69 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
70 select HAVE_EXIT_THREAD
72 select HAVE_FTRACE_MCOUNT_RECORD
73 select HAVE_FUNCTION_GRAPH_TRACER
74 select HAVE_FUNCTION_TRACER
75 select HAVE_GCC_PLUGINS
76 select HAVE_GENERIC_VDSO
77 select HAVE_IOREMAP_PROT
78 select HAVE_IRQ_EXIT_ON_IRQ_STACK
79 select HAVE_IRQ_TIME_ACCOUNTING
81 select HAVE_KRETPROBES
82 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
83 select HAVE_MOD_ARCH_SPECIFIC
85 select HAVE_PATA_PLATFORM
86 select HAVE_PERF_EVENTS
88 select HAVE_PERF_USER_STACK_DUMP
89 select HAVE_REGS_AND_STACK_ACCESS_API
91 select HAVE_SPARSE_SYSCALL_NR
92 select HAVE_STACKPROTECTOR
93 select HAVE_SYSCALL_TRACEPOINTS
94 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
95 select IRQ_FORCED_THREADING
97 select MODULES_USE_ELF_REL if MODULES
98 select MODULES_USE_ELF_RELA if MODULES && 64BIT
99 select PERF_USE_VMALLOC
100 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
102 select SYSCTL_EXCEPTION_TRACE
103 select TRACE_IRQFLAGS_SUPPORT
105 select ARCH_HAS_ELFCORE_COMPAT
107 config MIPS_FIXUP_BIGPHYS_ADDR
115 select SYS_SUPPORTS_32BIT_KERNEL
116 select SYS_SUPPORTS_LITTLE_ENDIAN
117 select SYS_SUPPORTS_ZBOOT
118 select DMA_NONCOHERENT
119 select ARCH_HAS_SYNC_DMA_FOR_CPU
124 select GENERIC_IRQ_CHIP
125 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
127 select CPU_SUPPORTS_CPUFREQ
128 select MIPS_EXTERNAL_TIMER
130 menu "Machine selection"
134 default MIPS_GENERIC_KERNEL
136 config MIPS_GENERIC_KERNEL
137 bool "Generic board-agnostic MIPS kernel"
138 select ARCH_HAS_SETUP_DMA_OPS
143 select CLKSRC_MIPS_GIC
145 select CPU_MIPSR2_IRQ_EI
146 select CPU_MIPSR2_IRQ_VI
148 select DMA_NONCOHERENT
151 select MIPS_AUTO_PFN_OFFSET
152 select MIPS_CPU_SCACHE
154 select MIPS_L1_CACHE_SHIFT_7
155 select NO_EXCEPT_FILL
156 select PCI_DRIVERS_GENERIC
159 select SYS_HAS_CPU_MIPS32_R1
160 select SYS_HAS_CPU_MIPS32_R2
161 select SYS_HAS_CPU_MIPS32_R6
162 select SYS_HAS_CPU_MIPS64_R1
163 select SYS_HAS_CPU_MIPS64_R2
164 select SYS_HAS_CPU_MIPS64_R6
165 select SYS_SUPPORTS_32BIT_KERNEL
166 select SYS_SUPPORTS_64BIT_KERNEL
167 select SYS_SUPPORTS_BIG_ENDIAN
168 select SYS_SUPPORTS_HIGHMEM
169 select SYS_SUPPORTS_LITTLE_ENDIAN
170 select SYS_SUPPORTS_MICROMIPS
171 select SYS_SUPPORTS_MIPS16
172 select SYS_SUPPORTS_MIPS_CPS
173 select SYS_SUPPORTS_MULTITHREADING
174 select SYS_SUPPORTS_RELOCATABLE
175 select SYS_SUPPORTS_SMARTMIPS
176 select SYS_SUPPORTS_ZBOOT
178 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
179 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
180 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
181 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
182 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
183 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
186 Select this to build a kernel which aims to support multiple boards,
187 generally using a flattened device tree passed from the bootloader
188 using the boot protocol defined in the UHI (Unified Hosting
189 Interface) specification.
192 bool "Alchemy processor based machines"
193 select PHYS_ADDR_T_64BIT
197 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
198 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
199 select SYS_HAS_CPU_MIPS32_R1
200 select SYS_SUPPORTS_32BIT_KERNEL
201 select SYS_SUPPORTS_APM_EMULATION
203 select SYS_SUPPORTS_ZBOOT
207 bool "Texas Instruments AR7"
210 select DMA_NONCOHERENT
214 select NO_EXCEPT_FILL
216 select SYS_HAS_CPU_MIPS32_R1
217 select SYS_HAS_EARLY_PRINTK
218 select SYS_SUPPORTS_32BIT_KERNEL
219 select SYS_SUPPORTS_LITTLE_ENDIAN
220 select SYS_SUPPORTS_MIPS16
221 select SYS_SUPPORTS_ZBOOT_UART16550
225 Support for the Texas Instruments AR7 System-on-a-Chip
226 family: TNETD7100, 7200 and 7300.
229 bool "Atheros AR231x/AR531x SoC support"
232 select DMA_NONCOHERENT
235 select SYS_HAS_CPU_MIPS32_R1
236 select SYS_SUPPORTS_BIG_ENDIAN
237 select SYS_SUPPORTS_32BIT_KERNEL
238 select SYS_HAS_EARLY_PRINTK
240 Support for Atheros AR231x and Atheros AR531x based boards
243 bool "Atheros AR71XX/AR724X/AR913X based boards"
244 select ARCH_HAS_RESET_CONTROLLER
248 select DMA_NONCOHERENT
253 select SYS_HAS_CPU_MIPS32_R2
254 select SYS_HAS_EARLY_PRINTK
255 select SYS_SUPPORTS_32BIT_KERNEL
256 select SYS_SUPPORTS_BIG_ENDIAN
257 select SYS_SUPPORTS_MIPS16
258 select SYS_SUPPORTS_ZBOOT_UART_PROM
260 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
262 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
265 bool "Broadcom Generic BMIPS kernel"
266 select ARCH_HAS_RESET_CONTROLLER
267 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
268 select ARCH_HAS_PHYS_TO_DMA
270 select NO_EXCEPT_FILL
276 select BCM6345_L1_IRQ
277 select BCM7038_L1_IRQ
278 select BCM7120_L2_IRQ
279 select BRCMSTB_L2_IRQ
281 select DMA_NONCOHERENT
282 select SYS_SUPPORTS_32BIT_KERNEL
283 select SYS_SUPPORTS_LITTLE_ENDIAN
284 select SYS_SUPPORTS_BIG_ENDIAN
285 select SYS_SUPPORTS_HIGHMEM
286 select SYS_HAS_CPU_BMIPS32_3300
287 select SYS_HAS_CPU_BMIPS4350
288 select SYS_HAS_CPU_BMIPS4380
289 select SYS_HAS_CPU_BMIPS5000
291 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
292 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
293 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
294 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
295 select HARDIRQS_SW_RESEND
297 Build a generic DT-based kernel image that boots on select
298 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
299 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
300 must be set appropriately for your board.
303 bool "Broadcom BCM47XX based boards"
307 select DMA_NONCOHERENT
310 select SYS_HAS_CPU_MIPS32_R1
311 select NO_EXCEPT_FILL
312 select SYS_SUPPORTS_32BIT_KERNEL
313 select SYS_SUPPORTS_LITTLE_ENDIAN
314 select SYS_SUPPORTS_MIPS16
315 select SYS_SUPPORTS_ZBOOT
316 select SYS_HAS_EARLY_PRINTK
317 select USE_GENERIC_EARLY_PRINTK_8250
319 select LEDS_GPIO_REGISTER
322 select BCM47XX_SSB if !BCM47XX_BCMA
324 Support for BCM47XX based boards
327 bool "Broadcom BCM63XX based boards"
332 select DMA_NONCOHERENT
334 select SYS_SUPPORTS_32BIT_KERNEL
335 select SYS_SUPPORTS_BIG_ENDIAN
336 select SYS_HAS_EARLY_PRINTK
337 select SYS_HAS_CPU_BMIPS32_3300
338 select SYS_HAS_CPU_BMIPS4350
339 select SYS_HAS_CPU_BMIPS4380
342 select MIPS_L1_CACHE_SHIFT_4
343 select HAVE_LEGACY_CLK
345 Support for BCM63XX based boards
352 select DMA_NONCOHERENT
358 select PCI_GT64XXX_PCI0
359 select SYS_HAS_CPU_NEVADA
360 select SYS_HAS_EARLY_PRINTK
361 select SYS_SUPPORTS_32BIT_KERNEL
362 select SYS_SUPPORTS_64BIT_KERNEL
363 select SYS_SUPPORTS_LITTLE_ENDIAN
364 select USE_GENERIC_EARLY_PRINTK_8250
366 config MACH_DECSTATION
370 select CEVT_R4K if CPU_R4X00
372 select CSRC_R4K if CPU_R4X00
373 select CPU_DADDI_WORKAROUNDS if 64BIT
374 select CPU_R4000_WORKAROUNDS if 64BIT
375 select CPU_R4400_WORKAROUNDS if 64BIT
376 select DMA_NONCOHERENT
379 select SYS_HAS_CPU_R3000
380 select SYS_HAS_CPU_R4X00
381 select SYS_SUPPORTS_32BIT_KERNEL
382 select SYS_SUPPORTS_64BIT_KERNEL
383 select SYS_SUPPORTS_LITTLE_ENDIAN
384 select SYS_SUPPORTS_128HZ
385 select SYS_SUPPORTS_256HZ
386 select SYS_SUPPORTS_1024HZ
387 select MIPS_L1_CACHE_SHIFT_4
389 This enables support for DEC's MIPS based workstations. For details
390 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
391 DECstation porting pages on <http://decstation.unix-ag.org/>.
393 If you have one of the following DECstation Models you definitely
394 want to choose R4xx0 for the CPU Type:
401 otherwise choose R3000.
404 bool "Jazz family of machines"
407 select ARCH_MIGHT_HAVE_PC_PARPORT
408 select ARCH_MIGHT_HAVE_PC_SERIO
412 select ARCH_MAY_HAVE_PC_FDC
415 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
416 select GENERIC_ISA_DMA
417 select HAVE_PCSPKR_PLATFORM
422 select SYS_HAS_CPU_R4X00
423 select SYS_SUPPORTS_32BIT_KERNEL
424 select SYS_SUPPORTS_64BIT_KERNEL
425 select SYS_SUPPORTS_100HZ
426 select SYS_SUPPORTS_LITTLE_ENDIAN
428 This a family of machines based on the MIPS R4030 chipset which was
429 used by several vendors to build RISC/os and Windows NT workstations.
430 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
431 Olivetti M700-10 workstations.
433 config MACH_INGENIC_SOC
434 bool "Ingenic SoC based machines"
437 select SYS_SUPPORTS_ZBOOT_UART16550
438 select CPU_SUPPORTS_CPUFREQ
439 select MIPS_EXTERNAL_TIMER
442 bool "Lantiq based platforms"
443 select DMA_NONCOHERENT
447 select SYS_HAS_CPU_MIPS32_R1
448 select SYS_HAS_CPU_MIPS32_R2
449 select SYS_SUPPORTS_BIG_ENDIAN
450 select SYS_SUPPORTS_32BIT_KERNEL
451 select SYS_SUPPORTS_MIPS16
452 select SYS_SUPPORTS_MULTITHREADING
453 select SYS_SUPPORTS_VPE_LOADER
454 select SYS_HAS_EARLY_PRINTK
458 select HAVE_LEGACY_CLK
461 select PINCTRL_LANTIQ
462 select ARCH_HAS_RESET_CONTROLLER
463 select RESET_CONTROLLER
465 config MACH_LOONGSON32
466 bool "Loongson 32-bit family of machines"
467 select SYS_SUPPORTS_ZBOOT
469 This enables support for the Loongson-1 family of machines.
471 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
472 the Institute of Computing Technology (ICT), Chinese Academy of
475 config MACH_LOONGSON2EF
476 bool "Loongson-2E/F family of machines"
477 select SYS_SUPPORTS_ZBOOT
479 This enables the support of early Loongson-2E/F family of machines.
481 config MACH_LOONGSON64
482 bool "Loongson 64-bit family of machines"
483 select ARCH_SPARSEMEM_ENABLE
484 select ARCH_MIGHT_HAVE_PC_PARPORT
485 select ARCH_MIGHT_HAVE_PC_SERIO
486 select GENERIC_ISA_DMA_SUPPORT_BROKEN
496 select NO_EXCEPT_FILL
497 select NR_CPUS_DEFAULT_64
498 select USE_GENERIC_EARLY_PRINTK_8250
499 select PCI_DRIVERS_GENERIC
500 select SYS_HAS_CPU_LOONGSON64
501 select SYS_HAS_EARLY_PRINTK
502 select SYS_SUPPORTS_SMP
503 select SYS_SUPPORTS_HOTPLUG_CPU
504 select SYS_SUPPORTS_NUMA
505 select SYS_SUPPORTS_64BIT_KERNEL
506 select SYS_SUPPORTS_HIGHMEM
507 select SYS_SUPPORTS_LITTLE_ENDIAN
508 select SYS_SUPPORTS_ZBOOT
509 select SYS_SUPPORTS_RELOCATABLE
514 select PCI_HOST_GENERIC
516 This enables the support of Loongson-2/3 family of machines.
518 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
519 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
520 and Loongson-2F which will be removed), developed by the Institute
521 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
524 bool "MIPS Malta board"
525 select ARCH_MAY_HAVE_PC_FDC
526 select ARCH_MIGHT_HAVE_PC_PARPORT
527 select ARCH_MIGHT_HAVE_PC_SERIO
532 select CLKSRC_MIPS_GIC
535 select DMA_NONCOHERENT
536 select GENERIC_ISA_DMA
537 select HAVE_PCSPKR_PLATFORM
543 select MIPS_CPU_SCACHE
545 select MIPS_L1_CACHE_SHIFT_6
547 select PCI_GT64XXX_PCI0
550 select SYS_HAS_CPU_MIPS32_R1
551 select SYS_HAS_CPU_MIPS32_R2
552 select SYS_HAS_CPU_MIPS32_R3_5
553 select SYS_HAS_CPU_MIPS32_R5
554 select SYS_HAS_CPU_MIPS32_R6
555 select SYS_HAS_CPU_MIPS64_R1
556 select SYS_HAS_CPU_MIPS64_R2
557 select SYS_HAS_CPU_MIPS64_R6
558 select SYS_HAS_CPU_NEVADA
559 select SYS_HAS_CPU_RM7000
560 select SYS_SUPPORTS_32BIT_KERNEL
561 select SYS_SUPPORTS_64BIT_KERNEL
562 select SYS_SUPPORTS_BIG_ENDIAN
563 select SYS_SUPPORTS_HIGHMEM
564 select SYS_SUPPORTS_LITTLE_ENDIAN
565 select SYS_SUPPORTS_MICROMIPS
566 select SYS_SUPPORTS_MIPS16
567 select SYS_SUPPORTS_MIPS_CMP
568 select SYS_SUPPORTS_MIPS_CPS
569 select SYS_SUPPORTS_MULTITHREADING
570 select SYS_SUPPORTS_RELOCATABLE
571 select SYS_SUPPORTS_SMARTMIPS
572 select SYS_SUPPORTS_VPE_LOADER
573 select SYS_SUPPORTS_ZBOOT
575 select WAR_ICACHE_REFILLS
576 select ZONE_DMA32 if 64BIT
578 This enables support for the MIPS Technologies Malta evaluation
582 bool "Microchip PIC32 Family"
584 This enables support for the Microchip PIC32 family of platforms.
586 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
590 bool "NEC VR4100 series based machines"
593 select SYS_HAS_CPU_VR41XX
594 select SYS_SUPPORTS_MIPS16
597 config MACH_NINTENDO64
598 bool "Nintendo 64 console"
601 select SYS_HAS_CPU_R4300
602 select SYS_SUPPORTS_BIG_ENDIAN
603 select SYS_SUPPORTS_ZBOOT
604 select SYS_SUPPORTS_32BIT_KERNEL
605 select SYS_SUPPORTS_64BIT_KERNEL
606 select DMA_NONCOHERENT
610 bool "Ralink based machines"
615 select DMA_NONCOHERENT
618 select SYS_HAS_CPU_MIPS32_R1
619 select SYS_HAS_CPU_MIPS32_R2
620 select SYS_SUPPORTS_32BIT_KERNEL
621 select SYS_SUPPORTS_LITTLE_ENDIAN
622 select SYS_SUPPORTS_MIPS16
623 select SYS_SUPPORTS_ZBOOT
624 select SYS_HAS_EARLY_PRINTK
625 select ARCH_HAS_RESET_CONTROLLER
626 select RESET_CONTROLLER
628 config MACH_REALTEK_RTL
629 bool "Realtek RTL838x/RTL839x based machines"
631 select DMA_NONCOHERENT
635 select SYS_HAS_CPU_MIPS32_R1
636 select SYS_HAS_CPU_MIPS32_R2
637 select SYS_SUPPORTS_BIG_ENDIAN
638 select SYS_SUPPORTS_32BIT_KERNEL
639 select SYS_SUPPORTS_MIPS16
640 select SYS_SUPPORTS_MULTITHREADING
641 select SYS_SUPPORTS_VPE_LOADER
642 select SYS_HAS_EARLY_PRINTK
643 select SYS_HAS_EARLY_PRINTK_8250
644 select USE_GENERIC_EARLY_PRINTK_8250
650 bool "SGI IP22 (Indy/Indigo2)"
655 select ARCH_MIGHT_HAVE_PC_SERIO
659 select DEFAULT_SGI_PARTITION
660 select DMA_NONCOHERENT
664 select IP22_CPU_SCACHE
666 select GENERIC_ISA_DMA_SUPPORT_BROKEN
668 select SGI_HAS_INDYDOG
674 select SYS_HAS_CPU_R4X00
675 select SYS_HAS_CPU_R5000
676 select SYS_HAS_EARLY_PRINTK
677 select SYS_SUPPORTS_32BIT_KERNEL
678 select SYS_SUPPORTS_64BIT_KERNEL
679 select SYS_SUPPORTS_BIG_ENDIAN
680 select WAR_R4600_V1_INDEX_ICACHEOP
681 select WAR_R4600_V1_HIT_CACHEOP
682 select WAR_R4600_V2_HIT_CACHEOP
683 select MIPS_L1_CACHE_SHIFT_7
685 This are the SGI Indy, Challenge S and Indigo2, as well as certain
686 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
687 that runs on these, say Y here.
690 bool "SGI IP27 (Origin200/2000)"
691 select ARCH_HAS_PHYS_TO_DMA
692 select ARCH_SPARSEMEM_ENABLE
695 select ARC_CMDLINE_ONLY
697 select DEFAULT_SGI_PARTITION
699 select SYS_HAS_EARLY_PRINTK
702 select IRQ_DOMAIN_HIERARCHY
703 select NR_CPUS_DEFAULT_64
704 select PCI_DRIVERS_GENERIC
705 select PCI_XTALK_BRIDGE
706 select SYS_HAS_CPU_R10000
707 select SYS_SUPPORTS_64BIT_KERNEL
708 select SYS_SUPPORTS_BIG_ENDIAN
709 select SYS_SUPPORTS_NUMA
710 select SYS_SUPPORTS_SMP
711 select WAR_R10000_LLSC
712 select MIPS_L1_CACHE_SHIFT_7
715 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
716 workstations. To compile a Linux kernel that runs on these, say Y
720 bool "SGI IP28 (Indigo2 R10k)"
725 select ARCH_MIGHT_HAVE_PC_SERIO
729 select DEFAULT_SGI_PARTITION
730 select DMA_NONCOHERENT
731 select GENERIC_ISA_DMA_SUPPORT_BROKEN
737 select SGI_HAS_INDYDOG
743 select SYS_HAS_CPU_R10000
744 select SYS_HAS_EARLY_PRINTK
745 select SYS_SUPPORTS_64BIT_KERNEL
746 select SYS_SUPPORTS_BIG_ENDIAN
747 select WAR_R10000_LLSC
748 select MIPS_L1_CACHE_SHIFT_7
750 This is the SGI Indigo2 with R10000 processor. To compile a Linux
751 kernel that runs on these, say Y here.
754 bool "SGI IP30 (Octane/Octane2)"
755 select ARCH_HAS_PHYS_TO_DMA
762 select SYNC_R4K if SMP
766 select IRQ_DOMAIN_HIERARCHY
767 select NR_CPUS_DEFAULT_2
768 select PCI_DRIVERS_GENERIC
769 select PCI_XTALK_BRIDGE
770 select SYS_HAS_EARLY_PRINTK
771 select SYS_HAS_CPU_R10000
772 select SYS_SUPPORTS_64BIT_KERNEL
773 select SYS_SUPPORTS_BIG_ENDIAN
774 select SYS_SUPPORTS_SMP
775 select WAR_R10000_LLSC
776 select MIPS_L1_CACHE_SHIFT_7
779 These are the SGI Octane and Octane2 graphics workstations. To
780 compile a Linux kernel that runs on these, say Y here.
786 select ARCH_HAS_PHYS_TO_DMA
792 select DMA_NONCOHERENT
795 select R5000_CPU_SCACHE
796 select RM7000_CPU_SCACHE
797 select SYS_HAS_CPU_R5000
798 select SYS_HAS_CPU_R10000 if BROKEN
799 select SYS_HAS_CPU_RM7000
800 select SYS_HAS_CPU_NEVADA
801 select SYS_SUPPORTS_64BIT_KERNEL
802 select SYS_SUPPORTS_BIG_ENDIAN
803 select WAR_ICACHE_REFILLS
805 If you want this kernel to run on SGI O2 workstation, say Y here.
808 bool "Sibyte BCM91120C-CRhine"
810 select SIBYTE_BCM1120
812 select SYS_HAS_CPU_SB1
813 select SYS_SUPPORTS_BIG_ENDIAN
814 select SYS_SUPPORTS_LITTLE_ENDIAN
817 bool "Sibyte BCM91120x-Carmel"
819 select SIBYTE_BCM1120
821 select SYS_HAS_CPU_SB1
822 select SYS_SUPPORTS_BIG_ENDIAN
823 select SYS_SUPPORTS_LITTLE_ENDIAN
826 bool "Sibyte BCM91125C-CRhone"
828 select SIBYTE_BCM1125
830 select SYS_HAS_CPU_SB1
831 select SYS_SUPPORTS_BIG_ENDIAN
832 select SYS_SUPPORTS_HIGHMEM
833 select SYS_SUPPORTS_LITTLE_ENDIAN
836 bool "Sibyte BCM91125E-Rhone"
838 select SIBYTE_BCM1125H
840 select SYS_HAS_CPU_SB1
841 select SYS_SUPPORTS_BIG_ENDIAN
842 select SYS_SUPPORTS_LITTLE_ENDIAN
845 bool "Sibyte BCM91250A-SWARM"
847 select HAVE_PATA_PLATFORM
850 select SYS_HAS_CPU_SB1
851 select SYS_SUPPORTS_BIG_ENDIAN
852 select SYS_SUPPORTS_HIGHMEM
853 select SYS_SUPPORTS_LITTLE_ENDIAN
854 select ZONE_DMA32 if 64BIT
855 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
857 config SIBYTE_LITTLESUR
858 bool "Sibyte BCM91250C2-LittleSur"
860 select HAVE_PATA_PLATFORM
863 select SYS_HAS_CPU_SB1
864 select SYS_SUPPORTS_BIG_ENDIAN
865 select SYS_SUPPORTS_HIGHMEM
866 select SYS_SUPPORTS_LITTLE_ENDIAN
867 select ZONE_DMA32 if 64BIT
869 config SIBYTE_SENTOSA
870 bool "Sibyte BCM91250E-Sentosa"
874 select SYS_HAS_CPU_SB1
875 select SYS_SUPPORTS_BIG_ENDIAN
876 select SYS_SUPPORTS_LITTLE_ENDIAN
877 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
880 bool "Sibyte BCM91480B-BigSur"
882 select NR_CPUS_DEFAULT_4
883 select SIBYTE_BCM1x80
885 select SYS_HAS_CPU_SB1
886 select SYS_SUPPORTS_BIG_ENDIAN
887 select SYS_SUPPORTS_HIGHMEM
888 select SYS_SUPPORTS_LITTLE_ENDIAN
889 select ZONE_DMA32 if 64BIT
890 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
893 bool "SNI RM200/300/400"
896 select FW_ARC if CPU_LITTLE_ENDIAN
897 select FW_ARC32 if CPU_LITTLE_ENDIAN
898 select FW_SNIPROM if CPU_BIG_ENDIAN
899 select ARCH_MAY_HAVE_PC_FDC
900 select ARCH_MIGHT_HAVE_PC_PARPORT
901 select ARCH_MIGHT_HAVE_PC_SERIO
905 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
906 select DMA_NONCOHERENT
907 select GENERIC_ISA_DMA
909 select HAVE_PCSPKR_PLATFORM
915 select MIPS_L1_CACHE_SHIFT_6
916 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
917 select SYS_HAS_CPU_R4X00
918 select SYS_HAS_CPU_R5000
919 select SYS_HAS_CPU_R10000
920 select R5000_CPU_SCACHE
921 select SYS_HAS_EARLY_PRINTK
922 select SYS_SUPPORTS_32BIT_KERNEL
923 select SYS_SUPPORTS_64BIT_KERNEL
924 select SYS_SUPPORTS_BIG_ENDIAN
925 select SYS_SUPPORTS_HIGHMEM
926 select SYS_SUPPORTS_LITTLE_ENDIAN
927 select WAR_R4600_V2_HIT_CACHEOP
929 The SNI RM200/300/400 are MIPS-based machines manufactured by
930 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
931 Technology and now in turn merged with Fujitsu. Say Y here to
932 support this machine type.
935 bool "Toshiba TX39 series based machines"
938 bool "Toshiba TX49 series based machines"
939 select WAR_TX49XX_ICACHE_INDEX_INV
941 config MIKROTIK_RB532
942 bool "Mikrotik RB532 boards"
945 select DMA_NONCOHERENT
948 select SYS_HAS_CPU_MIPS32_R1
949 select SYS_SUPPORTS_32BIT_KERNEL
950 select SYS_SUPPORTS_LITTLE_ENDIAN
954 select MIPS_L1_CACHE_SHIFT_4
956 Support the Mikrotik(tm) RouterBoard 532 series,
957 based on the IDT RC32434 SoC.
959 config CAVIUM_OCTEON_SOC
960 bool "Cavium Networks Octeon SoC based boards"
962 select ARCH_HAS_PHYS_TO_DMA
964 select PHYS_ADDR_T_64BIT
965 select SYS_SUPPORTS_64BIT_KERNEL
966 select SYS_SUPPORTS_BIG_ENDIAN
968 select EDAC_ATOMIC_SCRUB
969 select SYS_SUPPORTS_LITTLE_ENDIAN
970 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
971 select SYS_HAS_EARLY_PRINTK
972 select SYS_HAS_CPU_CAVIUM_OCTEON
974 select HAVE_PLAT_DELAY
975 select HAVE_PLAT_FW_INIT_CMDLINE
976 select HAVE_PLAT_MEMCPY
980 select ARCH_SPARSEMEM_ENABLE
981 select SYS_SUPPORTS_SMP
982 select NR_CPUS_DEFAULT_64
983 select MIPS_NR_CPU_NR_MAP_1024
986 select MTD_COMPLEX_MAPPINGS
988 select SYS_SUPPORTS_RELOCATABLE
990 This option supports all of the Octeon reference boards from Cavium
991 Networks. It builds a kernel that dynamically determines the Octeon
992 CPU type and supports all known board reference implementations.
993 Some of the supported boards are:
1000 Say Y here for most Octeon reference boards.
1002 config NLM_XLR_BOARD
1003 bool "Netlogic XLR/XLS based systems"
1006 select SYS_HAS_CPU_XLR
1007 select SYS_SUPPORTS_SMP
1009 select SWAP_IO_SPACE
1010 select SYS_SUPPORTS_32BIT_KERNEL
1011 select SYS_SUPPORTS_64BIT_KERNEL
1012 select PHYS_ADDR_T_64BIT
1013 select SYS_SUPPORTS_BIG_ENDIAN
1014 select SYS_SUPPORTS_HIGHMEM
1015 select NR_CPUS_DEFAULT_32
1019 select ZONE_DMA32 if 64BIT
1021 select SYS_HAS_EARLY_PRINTK
1022 select SYS_SUPPORTS_ZBOOT
1023 select SYS_SUPPORTS_ZBOOT_UART16550
1025 Support for systems based on Netlogic XLR and XLS processors.
1026 Say Y here if you have a XLR or XLS based board.
1028 config NLM_XLP_BOARD
1029 bool "Netlogic XLP based systems"
1032 select SYS_HAS_CPU_XLP
1033 select SYS_SUPPORTS_SMP
1035 select SYS_SUPPORTS_32BIT_KERNEL
1036 select SYS_SUPPORTS_64BIT_KERNEL
1037 select PHYS_ADDR_T_64BIT
1039 select SYS_SUPPORTS_BIG_ENDIAN
1040 select SYS_SUPPORTS_LITTLE_ENDIAN
1041 select SYS_SUPPORTS_HIGHMEM
1042 select NR_CPUS_DEFAULT_32
1046 select ZONE_DMA32 if 64BIT
1048 select SYS_HAS_EARLY_PRINTK
1050 select SYS_SUPPORTS_ZBOOT
1051 select SYS_SUPPORTS_ZBOOT_UART16550
1053 This board is based on Netlogic XLP Processor.
1054 Say Y here if you have a XLP based board.
1058 source "arch/mips/alchemy/Kconfig"
1059 source "arch/mips/ath25/Kconfig"
1060 source "arch/mips/ath79/Kconfig"
1061 source "arch/mips/bcm47xx/Kconfig"
1062 source "arch/mips/bcm63xx/Kconfig"
1063 source "arch/mips/bmips/Kconfig"
1064 source "arch/mips/generic/Kconfig"
1065 source "arch/mips/ingenic/Kconfig"
1066 source "arch/mips/jazz/Kconfig"
1067 source "arch/mips/lantiq/Kconfig"
1068 source "arch/mips/pic32/Kconfig"
1069 source "arch/mips/ralink/Kconfig"
1070 source "arch/mips/sgi-ip27/Kconfig"
1071 source "arch/mips/sibyte/Kconfig"
1072 source "arch/mips/txx9/Kconfig"
1073 source "arch/mips/vr41xx/Kconfig"
1074 source "arch/mips/cavium-octeon/Kconfig"
1075 source "arch/mips/loongson2ef/Kconfig"
1076 source "arch/mips/loongson32/Kconfig"
1077 source "arch/mips/loongson64/Kconfig"
1078 source "arch/mips/netlogic/Kconfig"
1082 config GENERIC_HWEIGHT
1086 config GENERIC_CALIBRATE_DELAY
1090 config SCHED_OMIT_FRAME_POINTER
1095 # Select some configuration options automatically based on user selections.
1100 config ARCH_MAY_HAVE_PC_FDC
1131 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1137 config MIPS_CLOCK_VSYSCALL
1138 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1147 config ARCH_SUPPORTS_UPROBES
1150 config DMA_PERDEV_COHERENT
1152 select ARCH_HAS_SETUP_DMA_OPS
1153 select DMA_NONCOHERENT
1155 config DMA_NONCOHERENT
1158 # MIPS allows mixing "slightly different" Cacheability and Coherency
1159 # Attribute bits. It is believed that the uncached access through
1160 # KSEG1 and the implementation specific "uncached accelerated" used
1161 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1162 # significant advantages.
1164 select ARCH_HAS_DMA_WRITE_COMBINE
1165 select ARCH_HAS_DMA_PREP_COHERENT
1166 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1167 select ARCH_HAS_DMA_SET_UNCACHED
1168 select DMA_NONCOHERENT_MMAP
1169 select NEED_DMA_MAP_STATE
1171 config SYS_HAS_EARLY_PRINTK
1174 config SYS_SUPPORTS_HOTPLUG_CPU
1177 config MIPS_BONITO64
1186 config NO_IOPORT_MAP
1190 def_bool CPU_NO_LOAD_STORE_LR
1192 config GENERIC_ISA_DMA
1194 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1197 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1199 select GENERIC_ISA_DMA
1201 config HAVE_PLAT_DELAY
1204 config HAVE_PLAT_FW_INIT_CMDLINE
1207 config HAVE_PLAT_MEMCPY
1213 config SYS_SUPPORTS_RELOCATABLE
1216 Selected if the platform supports relocating the kernel.
1217 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1218 to allow access to command line and entropy sources.
1220 config MIPS_CBPF_JIT
1222 depends on BPF_JIT && HAVE_CBPF_JIT
1224 config MIPS_EBPF_JIT
1226 depends on BPF_JIT && HAVE_EBPF_JIT
1230 # Endianness selection. Sufficiently obscure so many users don't know what to
1231 # answer,so we try hard to limit the available choices. Also the use of a
1232 # choice statement should be more obvious to the user.
1235 prompt "Endianness selection"
1237 Some MIPS machines can be configured for either little or big endian
1238 byte order. These modes require different kernels and a different
1239 Linux distribution. In general there is one preferred byteorder for a
1240 particular system but some systems are just as commonly used in the
1241 one or the other endianness.
1243 config CPU_BIG_ENDIAN
1245 depends on SYS_SUPPORTS_BIG_ENDIAN
1247 config CPU_LITTLE_ENDIAN
1248 bool "Little endian"
1249 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1256 config SYS_SUPPORTS_APM_EMULATION
1259 config SYS_SUPPORTS_BIG_ENDIAN
1262 config SYS_SUPPORTS_LITTLE_ENDIAN
1265 config MIPS_HUGE_TLB_SUPPORT
1266 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1280 config PCI_GT64XXX_PCI0
1283 config PCI_XTALK_BRIDGE
1286 config NO_EXCEPT_FILL
1292 config SWAP_IO_SPACE
1295 config SGI_HAS_INDYDOG
1307 config SGI_HAS_ZILOG
1310 config SGI_HAS_I8042
1313 config DEFAULT_SGI_PARTITION
1325 config MIPS_L1_CACHE_SHIFT_4
1328 config MIPS_L1_CACHE_SHIFT_5
1331 config MIPS_L1_CACHE_SHIFT_6
1334 config MIPS_L1_CACHE_SHIFT_7
1337 config MIPS_L1_CACHE_SHIFT
1339 default "7" if MIPS_L1_CACHE_SHIFT_7
1340 default "6" if MIPS_L1_CACHE_SHIFT_6
1341 default "5" if MIPS_L1_CACHE_SHIFT_5
1342 default "4" if MIPS_L1_CACHE_SHIFT_4
1345 config ARC_CMDLINE_ONLY
1349 bool "ARC console support"
1350 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1364 menu "CPU selection"
1370 config CPU_LOONGSON64
1371 bool "Loongson 64-bit CPU"
1372 depends on SYS_HAS_CPU_LOONGSON64
1373 select ARCH_HAS_PHYS_TO_DMA
1375 select CPU_HAS_PREFETCH
1376 select CPU_SUPPORTS_64BIT_KERNEL
1377 select CPU_SUPPORTS_HIGHMEM
1378 select CPU_SUPPORTS_HUGEPAGES
1379 select CPU_SUPPORTS_MSA
1380 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1381 select CPU_MIPSR2_IRQ_VI
1382 select WEAK_ORDERING
1383 select WEAK_REORDERING_BEYOND_LLSC
1384 select MIPS_ASID_BITS_VARIABLE
1385 select MIPS_PGD_C0_CONTEXT
1386 select MIPS_L1_CACHE_SHIFT_6
1387 select MIPS_FP_SUPPORT
1392 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1393 cores implements the MIPS64R2 instruction set with many extensions,
1394 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1395 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1396 Loongson-2E/2F is not covered here and will be removed in future.
1398 config LOONGSON3_ENHANCEMENT
1399 bool "New Loongson-3 CPU Enhancements"
1401 depends on CPU_LOONGSON64
1403 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1404 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1405 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1406 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1407 Fast TLB refill support, etc.
1409 This option enable those enhancements which are not probed at run
1410 time. If you want a generic kernel to run on all Loongson 3 machines,
1411 please say 'N' here. If you want a high-performance kernel to run on
1412 new Loongson-3 machines only, please say 'Y' here.
1414 config CPU_LOONGSON3_WORKAROUNDS
1415 bool "Old Loongson-3 LLSC Workarounds"
1417 depends on CPU_LOONGSON64
1419 Loongson-3 processors have the llsc issues which require workarounds.
1420 Without workarounds the system may hang unexpectedly.
1422 Newer Loongson-3 will fix these issues and no workarounds are needed.
1423 The workarounds have no significant side effect on them but may
1424 decrease the performance of the system so this option should be
1425 disabled unless the kernel is intended to be run on old systems.
1427 If unsure, please say Y.
1429 config CPU_LOONGSON3_CPUCFG_EMULATION
1430 bool "Emulate the CPUCFG instruction on older Loongson cores"
1432 depends on CPU_LOONGSON64
1434 Loongson-3A R4 and newer have the CPUCFG instruction available for
1435 userland to query CPU capabilities, much like CPUID on x86. This
1436 option provides emulation of the instruction on older Loongson
1437 cores, back to Loongson-3A1000.
1439 If unsure, please say Y.
1441 config CPU_LOONGSON2E
1443 depends on SYS_HAS_CPU_LOONGSON2E
1444 select CPU_LOONGSON2EF
1446 The Loongson 2E processor implements the MIPS III instruction set
1447 with many extensions.
1449 It has an internal FPGA northbridge, which is compatible to
1452 config CPU_LOONGSON2F
1454 depends on SYS_HAS_CPU_LOONGSON2F
1455 select CPU_LOONGSON2EF
1458 The Loongson 2F processor implements the MIPS III instruction set
1459 with many extensions.
1461 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1462 have a similar programming interface with FPGA northbridge used in
1465 config CPU_LOONGSON1B
1467 depends on SYS_HAS_CPU_LOONGSON1B
1468 select CPU_LOONGSON32
1469 select LEDS_GPIO_REGISTER
1471 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1472 Release 1 instruction set and part of the MIPS32 Release 2
1475 config CPU_LOONGSON1C
1477 depends on SYS_HAS_CPU_LOONGSON1C
1478 select CPU_LOONGSON32
1479 select LEDS_GPIO_REGISTER
1481 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1482 Release 1 instruction set and part of the MIPS32 Release 2
1485 config CPU_MIPS32_R1
1486 bool "MIPS32 Release 1"
1487 depends on SYS_HAS_CPU_MIPS32_R1
1488 select CPU_HAS_PREFETCH
1489 select CPU_SUPPORTS_32BIT_KERNEL
1490 select CPU_SUPPORTS_HIGHMEM
1492 Choose this option to build a kernel for release 1 or later of the
1493 MIPS32 architecture. Most modern embedded systems with a 32-bit
1494 MIPS processor are based on a MIPS32 processor. If you know the
1495 specific type of processor in your system, choose those that one
1496 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1497 Release 2 of the MIPS32 architecture is available since several
1498 years so chances are you even have a MIPS32 Release 2 processor
1499 in which case you should choose CPU_MIPS32_R2 instead for better
1502 config CPU_MIPS32_R2
1503 bool "MIPS32 Release 2"
1504 depends on SYS_HAS_CPU_MIPS32_R2
1505 select CPU_HAS_PREFETCH
1506 select CPU_SUPPORTS_32BIT_KERNEL
1507 select CPU_SUPPORTS_HIGHMEM
1508 select CPU_SUPPORTS_MSA
1511 Choose this option to build a kernel for release 2 or later of the
1512 MIPS32 architecture. Most modern embedded systems with a 32-bit
1513 MIPS processor are based on a MIPS32 processor. If you know the
1514 specific type of processor in your system, choose those that one
1515 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1517 config CPU_MIPS32_R5
1518 bool "MIPS32 Release 5"
1519 depends on SYS_HAS_CPU_MIPS32_R5
1520 select CPU_HAS_PREFETCH
1521 select CPU_SUPPORTS_32BIT_KERNEL
1522 select CPU_SUPPORTS_HIGHMEM
1523 select CPU_SUPPORTS_MSA
1525 select MIPS_O32_FP64_SUPPORT
1527 Choose this option to build a kernel for release 5 or later of the
1528 MIPS32 architecture. New MIPS processors, starting with the Warrior
1529 family, are based on a MIPS32r5 processor. If you own an older
1530 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1532 config CPU_MIPS32_R6
1533 bool "MIPS32 Release 6"
1534 depends on SYS_HAS_CPU_MIPS32_R6
1535 select CPU_HAS_PREFETCH
1536 select CPU_NO_LOAD_STORE_LR
1537 select CPU_SUPPORTS_32BIT_KERNEL
1538 select CPU_SUPPORTS_HIGHMEM
1539 select CPU_SUPPORTS_MSA
1541 select MIPS_O32_FP64_SUPPORT
1543 Choose this option to build a kernel for release 6 or later of the
1544 MIPS32 architecture. New MIPS processors, starting with the Warrior
1545 family, are based on a MIPS32r6 processor. If you own an older
1546 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1548 config CPU_MIPS64_R1
1549 bool "MIPS64 Release 1"
1550 depends on SYS_HAS_CPU_MIPS64_R1
1551 select CPU_HAS_PREFETCH
1552 select CPU_SUPPORTS_32BIT_KERNEL
1553 select CPU_SUPPORTS_64BIT_KERNEL
1554 select CPU_SUPPORTS_HIGHMEM
1555 select CPU_SUPPORTS_HUGEPAGES
1557 Choose this option to build a kernel for release 1 or later of the
1558 MIPS64 architecture. Many modern embedded systems with a 64-bit
1559 MIPS processor are based on a MIPS64 processor. If you know the
1560 specific type of processor in your system, choose those that one
1561 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1562 Release 2 of the MIPS64 architecture is available since several
1563 years so chances are you even have a MIPS64 Release 2 processor
1564 in which case you should choose CPU_MIPS64_R2 instead for better
1567 config CPU_MIPS64_R2
1568 bool "MIPS64 Release 2"
1569 depends on SYS_HAS_CPU_MIPS64_R2
1570 select CPU_HAS_PREFETCH
1571 select CPU_SUPPORTS_32BIT_KERNEL
1572 select CPU_SUPPORTS_64BIT_KERNEL
1573 select CPU_SUPPORTS_HIGHMEM
1574 select CPU_SUPPORTS_HUGEPAGES
1575 select CPU_SUPPORTS_MSA
1578 Choose this option to build a kernel for release 2 or later of the
1579 MIPS64 architecture. Many modern embedded systems with a 64-bit
1580 MIPS processor are based on a MIPS64 processor. If you know the
1581 specific type of processor in your system, choose those that one
1582 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1584 config CPU_MIPS64_R5
1585 bool "MIPS64 Release 5"
1586 depends on SYS_HAS_CPU_MIPS64_R5
1587 select CPU_HAS_PREFETCH
1588 select CPU_SUPPORTS_32BIT_KERNEL
1589 select CPU_SUPPORTS_64BIT_KERNEL
1590 select CPU_SUPPORTS_HIGHMEM
1591 select CPU_SUPPORTS_HUGEPAGES
1592 select CPU_SUPPORTS_MSA
1593 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1596 Choose this option to build a kernel for release 5 or later of the
1597 MIPS64 architecture. This is a intermediate MIPS architecture
1598 release partly implementing release 6 features. Though there is no
1599 any hardware known to be based on this release.
1601 config CPU_MIPS64_R6
1602 bool "MIPS64 Release 6"
1603 depends on SYS_HAS_CPU_MIPS64_R6
1604 select CPU_HAS_PREFETCH
1605 select CPU_NO_LOAD_STORE_LR
1606 select CPU_SUPPORTS_32BIT_KERNEL
1607 select CPU_SUPPORTS_64BIT_KERNEL
1608 select CPU_SUPPORTS_HIGHMEM
1609 select CPU_SUPPORTS_HUGEPAGES
1610 select CPU_SUPPORTS_MSA
1611 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1614 Choose this option to build a kernel for release 6 or later of the
1615 MIPS64 architecture. New MIPS processors, starting with the Warrior
1616 family, are based on a MIPS64r6 processor. If you own an older
1617 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1620 bool "MIPS Warrior P5600"
1621 depends on SYS_HAS_CPU_P5600
1622 select CPU_HAS_PREFETCH
1623 select CPU_SUPPORTS_32BIT_KERNEL
1624 select CPU_SUPPORTS_HIGHMEM
1625 select CPU_SUPPORTS_MSA
1626 select CPU_SUPPORTS_CPUFREQ
1627 select CPU_MIPSR2_IRQ_VI
1628 select CPU_MIPSR2_IRQ_EI
1630 select MIPS_O32_FP64_SUPPORT
1632 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1633 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1634 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1635 level features like up to six P5600 calculation cores, CM2 with L2
1636 cache, IOCU/IOMMU (though might be unused depending on the system-
1637 specific IP core configuration), GIC, CPC, virtualisation module,
1642 depends on SYS_HAS_CPU_R3000
1645 select CPU_SUPPORTS_32BIT_KERNEL
1646 select CPU_SUPPORTS_HIGHMEM
1648 Please make sure to pick the right CPU type. Linux/MIPS is not
1649 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1650 *not* work on R4000 machines and vice versa. However, since most
1651 of the supported machines have an R4000 (or similar) CPU, R4x00
1652 might be a safe bet. If the resulting kernel does not work,
1653 try to recompile with R3000.
1657 depends on SYS_HAS_CPU_TX39XX
1658 select CPU_SUPPORTS_32BIT_KERNEL
1663 depends on SYS_HAS_CPU_VR41XX
1664 select CPU_SUPPORTS_32BIT_KERNEL
1665 select CPU_SUPPORTS_64BIT_KERNEL
1667 The options selects support for the NEC VR4100 series of processors.
1668 Only choose this option if you have one of these processors as a
1669 kernel built with this option will not run on any other type of
1670 processor or vice versa.
1674 depends on SYS_HAS_CPU_R4300
1675 select CPU_SUPPORTS_32BIT_KERNEL
1676 select CPU_SUPPORTS_64BIT_KERNEL
1677 select CPU_HAS_LOAD_STORE_LR
1679 MIPS Technologies R4300-series processors.
1683 depends on SYS_HAS_CPU_R4X00
1684 select CPU_SUPPORTS_32BIT_KERNEL
1685 select CPU_SUPPORTS_64BIT_KERNEL
1686 select CPU_SUPPORTS_HUGEPAGES
1688 MIPS Technologies R4000-series processors other than 4300, including
1689 the R4000, R4400, R4600, and 4700.
1693 depends on SYS_HAS_CPU_TX49XX
1694 select CPU_HAS_PREFETCH
1695 select CPU_SUPPORTS_32BIT_KERNEL
1696 select CPU_SUPPORTS_64BIT_KERNEL
1697 select CPU_SUPPORTS_HUGEPAGES
1701 depends on SYS_HAS_CPU_R5000
1702 select CPU_SUPPORTS_32BIT_KERNEL
1703 select CPU_SUPPORTS_64BIT_KERNEL
1704 select CPU_SUPPORTS_HUGEPAGES
1706 MIPS Technologies R5000-series processors other than the Nevada.
1710 depends on SYS_HAS_CPU_R5500
1711 select CPU_SUPPORTS_32BIT_KERNEL
1712 select CPU_SUPPORTS_64BIT_KERNEL
1713 select CPU_SUPPORTS_HUGEPAGES
1715 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1720 depends on SYS_HAS_CPU_NEVADA
1721 select CPU_SUPPORTS_32BIT_KERNEL
1722 select CPU_SUPPORTS_64BIT_KERNEL
1723 select CPU_SUPPORTS_HUGEPAGES
1725 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1729 depends on SYS_HAS_CPU_R10000
1730 select CPU_HAS_PREFETCH
1731 select CPU_SUPPORTS_32BIT_KERNEL
1732 select CPU_SUPPORTS_64BIT_KERNEL
1733 select CPU_SUPPORTS_HIGHMEM
1734 select CPU_SUPPORTS_HUGEPAGES
1736 MIPS Technologies R10000-series processors.
1740 depends on SYS_HAS_CPU_RM7000
1741 select CPU_HAS_PREFETCH
1742 select CPU_SUPPORTS_32BIT_KERNEL
1743 select CPU_SUPPORTS_64BIT_KERNEL
1744 select CPU_SUPPORTS_HIGHMEM
1745 select CPU_SUPPORTS_HUGEPAGES
1749 depends on SYS_HAS_CPU_SB1
1750 select CPU_SUPPORTS_32BIT_KERNEL
1751 select CPU_SUPPORTS_64BIT_KERNEL
1752 select CPU_SUPPORTS_HIGHMEM
1753 select CPU_SUPPORTS_HUGEPAGES
1754 select WEAK_ORDERING
1756 config CPU_CAVIUM_OCTEON
1757 bool "Cavium Octeon processor"
1758 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1759 select CPU_HAS_PREFETCH
1760 select CPU_SUPPORTS_64BIT_KERNEL
1761 select WEAK_ORDERING
1762 select CPU_SUPPORTS_HIGHMEM
1763 select CPU_SUPPORTS_HUGEPAGES
1764 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1765 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1766 select MIPS_L1_CACHE_SHIFT_7
1769 The Cavium Octeon processor is a highly integrated chip containing
1770 many ethernet hardware widgets for networking tasks. The processor
1771 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1772 Full details can be found at http://www.caviumnetworks.com.
1775 bool "Broadcom BMIPS"
1776 depends on SYS_HAS_CPU_BMIPS
1778 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1779 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1780 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1781 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1782 select CPU_SUPPORTS_32BIT_KERNEL
1783 select DMA_NONCOHERENT
1785 select SWAP_IO_SPACE
1786 select WEAK_ORDERING
1787 select CPU_SUPPORTS_HIGHMEM
1788 select CPU_HAS_PREFETCH
1789 select CPU_SUPPORTS_CPUFREQ
1790 select MIPS_EXTERNAL_TIMER
1792 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1795 bool "Netlogic XLR SoC"
1796 depends on SYS_HAS_CPU_XLR
1797 select CPU_SUPPORTS_32BIT_KERNEL
1798 select CPU_SUPPORTS_64BIT_KERNEL
1799 select CPU_SUPPORTS_HIGHMEM
1800 select CPU_SUPPORTS_HUGEPAGES
1801 select WEAK_ORDERING
1802 select WEAK_REORDERING_BEYOND_LLSC
1804 Netlogic Microsystems XLR/XLS processors.
1807 bool "Netlogic XLP SoC"
1808 depends on SYS_HAS_CPU_XLP
1809 select CPU_SUPPORTS_32BIT_KERNEL
1810 select CPU_SUPPORTS_64BIT_KERNEL
1811 select CPU_SUPPORTS_HIGHMEM
1812 select WEAK_ORDERING
1813 select WEAK_REORDERING_BEYOND_LLSC
1814 select CPU_HAS_PREFETCH
1816 select CPU_SUPPORTS_HUGEPAGES
1817 select MIPS_ASID_BITS_VARIABLE
1819 Netlogic Microsystems XLP processors.
1822 config CPU_MIPS32_3_5_FEATURES
1823 bool "MIPS32 Release 3.5 Features"
1824 depends on SYS_HAS_CPU_MIPS32_R3_5
1825 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1828 Choose this option to build a kernel for release 2 or later of the
1829 MIPS32 architecture including features from the 3.5 release such as
1830 support for Enhanced Virtual Addressing (EVA).
1832 config CPU_MIPS32_3_5_EVA
1833 bool "Enhanced Virtual Addressing (EVA)"
1834 depends on CPU_MIPS32_3_5_FEATURES
1838 Choose this option if you want to enable the Enhanced Virtual
1839 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1840 One of its primary benefits is an increase in the maximum size
1841 of lowmem (up to 3GB). If unsure, say 'N' here.
1843 config CPU_MIPS32_R5_FEATURES
1844 bool "MIPS32 Release 5 Features"
1845 depends on SYS_HAS_CPU_MIPS32_R5
1846 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1848 Choose this option to build a kernel for release 2 or later of the
1849 MIPS32 architecture including features from release 5 such as
1850 support for Extended Physical Addressing (XPA).
1852 config CPU_MIPS32_R5_XPA
1853 bool "Extended Physical Addressing (XPA)"
1854 depends on CPU_MIPS32_R5_FEATURES
1856 depends on !PAGE_SIZE_4KB
1857 depends on SYS_SUPPORTS_HIGHMEM
1860 select PHYS_ADDR_T_64BIT
1863 Choose this option if you want to enable the Extended Physical
1864 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1865 benefit is to increase physical addressing equal to or greater
1866 than 40 bits. Note that this has the side effect of turning on
1867 64-bit addressing which in turn makes the PTEs 64-bit in size.
1868 If unsure, say 'N' here.
1871 config CPU_NOP_WORKAROUNDS
1874 config CPU_JUMP_WORKAROUNDS
1877 config CPU_LOONGSON2F_WORKAROUNDS
1878 bool "Loongson 2F Workarounds"
1880 select CPU_NOP_WORKAROUNDS
1881 select CPU_JUMP_WORKAROUNDS
1883 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1884 require workarounds. Without workarounds the system may hang
1885 unexpectedly. For more information please refer to the gas
1886 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1888 Loongson 2F03 and later have fixed these issues and no workarounds
1889 are needed. The workarounds have no significant side effect on them
1890 but may decrease the performance of the system so this option should
1891 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1894 If unsure, please say Y.
1895 endif # CPU_LOONGSON2F
1897 config SYS_SUPPORTS_ZBOOT
1899 select HAVE_KERNEL_GZIP
1900 select HAVE_KERNEL_BZIP2
1901 select HAVE_KERNEL_LZ4
1902 select HAVE_KERNEL_LZMA
1903 select HAVE_KERNEL_LZO
1904 select HAVE_KERNEL_XZ
1905 select HAVE_KERNEL_ZSTD
1907 config SYS_SUPPORTS_ZBOOT_UART16550
1909 select SYS_SUPPORTS_ZBOOT
1911 config SYS_SUPPORTS_ZBOOT_UART_PROM
1913 select SYS_SUPPORTS_ZBOOT
1915 config CPU_LOONGSON2EF
1917 select CPU_SUPPORTS_32BIT_KERNEL
1918 select CPU_SUPPORTS_64BIT_KERNEL
1919 select CPU_SUPPORTS_HIGHMEM
1920 select CPU_SUPPORTS_HUGEPAGES
1921 select ARCH_HAS_PHYS_TO_DMA
1923 config CPU_LOONGSON32
1927 select CPU_HAS_PREFETCH
1928 select CPU_SUPPORTS_32BIT_KERNEL
1929 select CPU_SUPPORTS_HIGHMEM
1930 select CPU_SUPPORTS_CPUFREQ
1932 config CPU_BMIPS32_3300
1933 select SMP_UP if SMP
1936 config CPU_BMIPS4350
1938 select SYS_SUPPORTS_SMP
1939 select SYS_SUPPORTS_HOTPLUG_CPU
1941 config CPU_BMIPS4380
1943 select MIPS_L1_CACHE_SHIFT_6
1944 select SYS_SUPPORTS_SMP
1945 select SYS_SUPPORTS_HOTPLUG_CPU
1948 config CPU_BMIPS5000
1950 select MIPS_CPU_SCACHE
1951 select MIPS_L1_CACHE_SHIFT_7
1952 select SYS_SUPPORTS_SMP
1953 select SYS_SUPPORTS_HOTPLUG_CPU
1956 config SYS_HAS_CPU_LOONGSON64
1958 select CPU_SUPPORTS_CPUFREQ
1961 config SYS_HAS_CPU_LOONGSON2E
1964 config SYS_HAS_CPU_LOONGSON2F
1966 select CPU_SUPPORTS_CPUFREQ
1967 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1969 config SYS_HAS_CPU_LOONGSON1B
1972 config SYS_HAS_CPU_LOONGSON1C
1975 config SYS_HAS_CPU_MIPS32_R1
1978 config SYS_HAS_CPU_MIPS32_R2
1981 config SYS_HAS_CPU_MIPS32_R3_5
1984 config SYS_HAS_CPU_MIPS32_R5
1986 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1988 config SYS_HAS_CPU_MIPS32_R6
1990 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1992 config SYS_HAS_CPU_MIPS64_R1
1995 config SYS_HAS_CPU_MIPS64_R2
1998 config SYS_HAS_CPU_MIPS64_R5
2000 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2002 config SYS_HAS_CPU_MIPS64_R6
2004 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2006 config SYS_HAS_CPU_P5600
2008 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2010 config SYS_HAS_CPU_R3000
2013 config SYS_HAS_CPU_TX39XX
2016 config SYS_HAS_CPU_VR41XX
2019 config SYS_HAS_CPU_R4300
2022 config SYS_HAS_CPU_R4X00
2025 config SYS_HAS_CPU_TX49XX
2028 config SYS_HAS_CPU_R5000
2031 config SYS_HAS_CPU_R5500
2034 config SYS_HAS_CPU_NEVADA
2037 config SYS_HAS_CPU_R10000
2039 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2041 config SYS_HAS_CPU_RM7000
2044 config SYS_HAS_CPU_SB1
2047 config SYS_HAS_CPU_CAVIUM_OCTEON
2050 config SYS_HAS_CPU_BMIPS
2053 config SYS_HAS_CPU_BMIPS32_3300
2055 select SYS_HAS_CPU_BMIPS
2057 config SYS_HAS_CPU_BMIPS4350
2059 select SYS_HAS_CPU_BMIPS
2061 config SYS_HAS_CPU_BMIPS4380
2063 select SYS_HAS_CPU_BMIPS
2065 config SYS_HAS_CPU_BMIPS5000
2067 select SYS_HAS_CPU_BMIPS
2068 select ARCH_HAS_SYNC_DMA_FOR_CPU
2070 config SYS_HAS_CPU_XLR
2073 config SYS_HAS_CPU_XLP
2077 # CPU may reorder R->R, R->W, W->R, W->W
2078 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2080 config WEAK_ORDERING
2084 # CPU may reorder reads and writes beyond LL/SC
2085 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2087 config WEAK_REORDERING_BEYOND_LLSC
2092 # These two indicate any level of the MIPS32 and MIPS64 architecture
2096 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2097 CPU_MIPS32_R6 || CPU_P5600
2101 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2102 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2105 # These indicate the revision of the architecture
2109 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2113 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2115 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2120 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2122 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2127 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2129 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2130 select HAVE_ARCH_BITREVERSE
2131 select MIPS_ASID_BITS_VARIABLE
2132 select MIPS_CRC_SUPPORT
2135 config TARGET_ISA_REV
2137 default 1 if CPU_MIPSR1
2138 default 2 if CPU_MIPSR2
2139 default 5 if CPU_MIPSR5
2140 default 6 if CPU_MIPSR6
2143 Reflects the ISA revision being targeted by the kernel build. This
2144 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2152 config SYS_SUPPORTS_32BIT_KERNEL
2154 config SYS_SUPPORTS_64BIT_KERNEL
2156 config CPU_SUPPORTS_32BIT_KERNEL
2158 config CPU_SUPPORTS_64BIT_KERNEL
2160 config CPU_SUPPORTS_CPUFREQ
2162 config CPU_SUPPORTS_ADDRWINCFG
2164 config CPU_SUPPORTS_HUGEPAGES
2166 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2167 config MIPS_PGD_C0_CONTEXT
2170 default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2173 # Set to y for ptrace access to watch registers.
2175 config HARDWARE_WATCHPOINTS
2177 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2182 prompt "Kernel code model"
2184 You should only select this option if you have a workload that
2185 actually benefits from 64-bit processing or if your machine has
2186 large memory. You will only be presented a single option in this
2187 menu if your system does not support both 32-bit and 64-bit kernels.
2190 bool "32-bit kernel"
2191 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2194 Select this option if you want to build a 32-bit kernel.
2197 bool "64-bit kernel"
2198 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2200 Select this option if you want to build a 64-bit kernel.
2204 config MIPS_VA_BITS_48
2205 bool "48 bits virtual memory"
2208 Support a maximum at least 48 bits of application virtual
2209 memory. Default is 40 bits or less, depending on the CPU.
2210 For page sizes 16k and above, this option results in a small
2211 memory overhead for page tables. For 4k page size, a fourth
2212 level of page tables is added which imposes both a memory
2213 overhead as well as slower TLB fault handling.
2218 prompt "Kernel page size"
2219 default PAGE_SIZE_4KB
2221 config PAGE_SIZE_4KB
2223 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2225 This option select the standard 4kB Linux page size. On some
2226 R3000-family processors this is the only available page size. Using
2227 4kB page size will minimize memory consumption and is therefore
2228 recommended for low memory systems.
2230 config PAGE_SIZE_8KB
2232 depends on CPU_CAVIUM_OCTEON
2233 depends on !MIPS_VA_BITS_48
2235 Using 8kB page size will result in higher performance kernel at
2236 the price of higher memory consumption. This option is available
2237 only on cnMIPS processors. Note that you will need a suitable Linux
2238 distribution to support this.
2240 config PAGE_SIZE_16KB
2242 depends on !CPU_R3000 && !CPU_TX39XX
2244 Using 16kB page size will result in higher performance kernel at
2245 the price of higher memory consumption. This option is available on
2246 all non-R3000 family processors. Note that you will need a suitable
2247 Linux distribution to support this.
2249 config PAGE_SIZE_32KB
2251 depends on CPU_CAVIUM_OCTEON
2252 depends on !MIPS_VA_BITS_48
2254 Using 32kB page size will result in higher performance kernel at
2255 the price of higher memory consumption. This option is available
2256 only on cnMIPS cores. Note that you will need a suitable Linux
2257 distribution to support this.
2259 config PAGE_SIZE_64KB
2261 depends on !CPU_R3000 && !CPU_TX39XX
2263 Using 64kB page size will result in higher performance kernel at
2264 the price of higher memory consumption. This option is available on
2265 all non-R3000 family processor. Not that at the time of this
2266 writing this option is still high experimental.
2270 config FORCE_MAX_ZONEORDER
2271 int "Maximum zone order"
2272 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2273 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2274 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2275 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2276 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2277 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2281 The kernel memory allocator divides physically contiguous memory
2282 blocks into "zones", where each zone is a power of two number of
2283 pages. This option selects the largest power of two that the kernel
2284 keeps in the memory allocator. If you need to allocate very large
2285 blocks of physically contiguous memory, then you may need to
2286 increase this value.
2288 This config option is actually maximum order plus one. For example,
2289 a value of 11 means that the largest free memory block is 2^10 pages.
2291 The page size is not necessarily 4KB. Keep this in mind
2292 when choosing a value for this option.
2297 config IP22_CPU_SCACHE
2302 # Support for a MIPS32 / MIPS64 style S-caches
2304 config MIPS_CPU_SCACHE
2308 config R5000_CPU_SCACHE
2312 config RM7000_CPU_SCACHE
2316 config SIBYTE_DMA_PAGEOPS
2317 bool "Use DMA to clear/copy pages"
2320 Instead of using the CPU to zero and copy pages, use a Data Mover
2321 channel. These DMA channels are otherwise unused by the standard
2322 SiByte Linux port. Seems to give a small performance benefit.
2324 config CPU_HAS_PREFETCH
2327 config CPU_GENERIC_DUMP_TLB
2329 default y if !(CPU_R3000 || CPU_TX39XX)
2331 config MIPS_FP_SUPPORT
2332 bool "Floating Point support" if EXPERT
2335 Select y to include support for floating point in the kernel
2336 including initialization of FPU hardware, FP context save & restore
2337 and emulation of an FPU where necessary. Without this support any
2338 userland program attempting to use floating point instructions will
2341 If you know that your userland will not attempt to use floating point
2342 instructions then you can say n here to shrink the kernel a little.
2346 config CPU_R2300_FPU
2348 depends on MIPS_FP_SUPPORT
2349 default y if CPU_R3000 || CPU_TX39XX
2356 depends on MIPS_FP_SUPPORT
2357 default y if !CPU_R2300_FPU
2359 config CPU_R4K_CACHE_TLB
2361 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2364 bool "MIPS MT SMP support (1 TC on each available VPE)"
2366 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2367 select CPU_MIPSR2_IRQ_VI
2368 select CPU_MIPSR2_IRQ_EI
2373 select SYS_SUPPORTS_SMP
2374 select SYS_SUPPORTS_SCHED_SMT
2375 select MIPS_PERF_SHARED_TC_COUNTERS
2377 This is a kernel model which is known as SMVP. This is supported
2378 on cores with the MT ASE and uses the available VPEs to implement
2379 virtual processors which supports SMP. This is equivalent to the
2380 Intel Hyperthreading feature. For further information go to
2381 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2387 bool "SMT (multithreading) scheduler support"
2388 depends on SYS_SUPPORTS_SCHED_SMT
2391 SMT scheduler support improves the CPU scheduler's decision making
2392 when dealing with MIPS MT enabled cores at a cost of slightly
2393 increased overhead in some places. If unsure say N here.
2395 config SYS_SUPPORTS_SCHED_SMT
2398 config SYS_SUPPORTS_MULTITHREADING
2401 config MIPS_MT_FPAFF
2402 bool "Dynamic FPU affinity for FP-intensive threads"
2404 depends on MIPS_MT_SMP
2406 config MIPSR2_TO_R6_EMULATOR
2407 bool "MIPS R2-to-R6 emulator"
2408 depends on CPU_MIPSR6
2409 depends on MIPS_FP_SUPPORT
2412 Choose this option if you want to run non-R6 MIPS userland code.
2413 Even if you say 'Y' here, the emulator will still be disabled by
2414 default. You can enable it using the 'mipsr2emu' kernel option.
2415 The only reason this is a build-time option is to save ~14K from the
2418 config SYS_SUPPORTS_VPE_LOADER
2420 depends on SYS_SUPPORTS_MULTITHREADING
2422 Indicates that the platform supports the VPE loader, and provides
2425 config MIPS_VPE_LOADER
2426 bool "VPE loader support."
2427 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2428 select CPU_MIPSR2_IRQ_VI
2429 select CPU_MIPSR2_IRQ_EI
2432 Includes a loader for loading an elf relocatable object
2433 onto another VPE and running it.
2435 config MIPS_VPE_LOADER_CMP
2438 depends on MIPS_VPE_LOADER && MIPS_CMP
2440 config MIPS_VPE_LOADER_MT
2443 depends on MIPS_VPE_LOADER && !MIPS_CMP
2445 config MIPS_VPE_LOADER_TOM
2446 bool "Load VPE program into memory hidden from linux"
2447 depends on MIPS_VPE_LOADER
2450 The loader can use memory that is present but has been hidden from
2451 Linux using the kernel command line option "mem=xxMB". It's up to
2452 you to ensure the amount you put in the option and the space your
2453 program requires is less or equal to the amount physically present.
2455 config MIPS_VPE_APSP_API
2456 bool "Enable support for AP/SP API (RTLX)"
2457 depends on MIPS_VPE_LOADER
2459 config MIPS_VPE_APSP_API_CMP
2462 depends on MIPS_VPE_APSP_API && MIPS_CMP
2464 config MIPS_VPE_APSP_API_MT
2467 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2470 bool "MIPS CMP framework support (DEPRECATED)"
2471 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2474 select SYS_SUPPORTS_SMP
2475 select WEAK_ORDERING
2478 Select this if you are using a bootloader which implements the "CMP
2479 framework" protocol (ie. YAMON) and want your kernel to make use of
2480 its ability to start secondary CPUs.
2482 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2486 bool "MIPS Coherent Processing System support"
2487 depends on SYS_SUPPORTS_MIPS_CPS
2489 select MIPS_CPS_PM if HOTPLUG_CPU
2491 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2492 select SYS_SUPPORTS_HOTPLUG_CPU
2493 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2494 select SYS_SUPPORTS_SMP
2495 select WEAK_ORDERING
2496 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2498 Select this if you wish to run an SMP kernel across multiple cores
2499 within a MIPS Coherent Processing System. When this option is
2500 enabled the kernel will probe for other cores and boot them with
2501 no external assistance. It is safe to enable this when hardware
2502 support is unavailable.
2515 config SB1_PASS_2_WORKAROUNDS
2517 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2520 config SB1_PASS_2_1_WORKAROUNDS
2522 depends on CPU_SB1 && CPU_SB1_PASS_2
2526 prompt "SmartMIPS or microMIPS ASE support"
2528 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2531 Select this if you want neither microMIPS nor SmartMIPS support
2533 config CPU_HAS_SMARTMIPS
2534 depends on SYS_SUPPORTS_SMARTMIPS
2537 SmartMIPS is a extension of the MIPS32 architecture aimed at
2538 increased security at both hardware and software level for
2539 smartcards. Enabling this option will allow proper use of the
2540 SmartMIPS instructions by Linux applications. However a kernel with
2541 this option will not work on a MIPS core without SmartMIPS core. If
2542 you don't know you probably don't have SmartMIPS and should say N
2545 config CPU_MICROMIPS
2546 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2549 When this option is enabled the kernel will be built using the
2555 bool "Support for the MIPS SIMD Architecture"
2556 depends on CPU_SUPPORTS_MSA
2557 depends on MIPS_FP_SUPPORT
2558 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2560 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2561 and a set of SIMD instructions to operate on them. When this option
2562 is enabled the kernel will support allocating & switching MSA
2563 vector register contexts. If you know that your kernel will only be
2564 running on CPUs which do not support MSA or that your userland will
2565 not be making use of it then you may wish to say N here to reduce
2566 the size & complexity of your kernel.
2577 depends on !CPU_DIEI_BROKEN
2580 config CPU_DIEI_BROKEN
2586 config CPU_NO_LOAD_STORE_LR
2589 CPU lacks support for unaligned load and store instructions:
2590 LWL, LWR, SWL, SWR (Load/store word left/right).
2591 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2595 # Vectored interrupt mode is an R2 feature
2597 config CPU_MIPSR2_IRQ_VI
2601 # Extended interrupt mode is an R2 feature
2603 config CPU_MIPSR2_IRQ_EI
2608 depends on !CPU_R3000
2614 config CPU_DADDI_WORKAROUNDS
2617 config CPU_R4000_WORKAROUNDS
2619 select CPU_R4400_WORKAROUNDS
2621 config CPU_R4400_WORKAROUNDS
2624 config CPU_R4X00_BUGS64
2626 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2628 config MIPS_ASID_SHIFT
2630 default 6 if CPU_R3000 || CPU_TX39XX
2633 config MIPS_ASID_BITS
2635 default 0 if MIPS_ASID_BITS_VARIABLE
2636 default 6 if CPU_R3000 || CPU_TX39XX
2639 config MIPS_ASID_BITS_VARIABLE
2642 config MIPS_CRC_SUPPORT
2645 # R4600 erratum. Due to the lack of errata information the exact
2646 # technical details aren't known. I've experimentally found that disabling
2647 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2649 config WAR_R4600_V1_INDEX_ICACHEOP
2652 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2654 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2655 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2656 # executed if there is no other dcache activity. If the dcache is
2657 # accessed for another instruction immediately preceding when these
2658 # cache instructions are executing, it is possible that the dcache
2659 # tag match outputs used by these cache instructions will be
2660 # incorrect. These cache instructions should be preceded by at least
2661 # four instructions that are not any kind of load or store
2664 # This is not allowed: lw
2668 # cache Hit_Writeback_Invalidate_D
2670 # This is allowed: lw
2675 # cache Hit_Writeback_Invalidate_D
2676 config WAR_R4600_V1_HIT_CACHEOP
2679 # Writeback and invalidate the primary cache dcache before DMA.
2681 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2682 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2683 # operate correctly if the internal data cache refill buffer is empty. These
2684 # CACHE instructions should be separated from any potential data cache miss
2685 # by a load instruction to an uncached address to empty the response buffer."
2686 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2688 config WAR_R4600_V2_HIT_CACHEOP
2691 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2692 # the line which this instruction itself exists, the following
2693 # operation is not guaranteed."
2695 # Workaround: do two phase flushing for Index_Invalidate_I
2696 config WAR_TX49XX_ICACHE_INDEX_INV
2699 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2700 # opposes it being called that) where invalid instructions in the same
2701 # I-cache line worth of instructions being fetched may case spurious
2703 config WAR_ICACHE_REFILLS
2706 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2707 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2708 config WAR_R10000_LLSC
2711 # 34K core erratum: "Problems Executing the TLBR Instruction"
2712 config WAR_MIPS34K_MISSED_ITLB
2716 # - Highmem only makes sense for the 32-bit kernel.
2717 # - The current highmem code will only work properly on physically indexed
2718 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2719 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2720 # moment we protect the user and offer the highmem option only on machines
2721 # where it's known to be safe. This will not offer highmem on a few systems
2722 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2723 # indexed CPUs but we're playing safe.
2724 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2725 # know they might have memory configurations that could make use of highmem
2729 bool "High Memory Support"
2730 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2733 config CPU_SUPPORTS_HIGHMEM
2736 config SYS_SUPPORTS_HIGHMEM
2739 config SYS_SUPPORTS_SMARTMIPS
2742 config SYS_SUPPORTS_MICROMIPS
2745 config SYS_SUPPORTS_MIPS16
2748 This option must be set if a kernel might be executed on a MIPS16-
2749 enabled CPU even if MIPS16 is not actually being used. In other
2750 words, it makes the kernel MIPS16-tolerant.
2752 config CPU_SUPPORTS_MSA
2755 config ARCH_FLATMEM_ENABLE
2757 depends on !NUMA && !CPU_LOONGSON2EF
2759 config ARCH_SPARSEMEM_ENABLE
2761 select SPARSEMEM_STATIC if !SGI_IP27
2765 depends on SYS_SUPPORTS_NUMA
2768 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2769 Access). This option improves performance on systems with more
2770 than two nodes; on two node systems it is generally better to
2771 leave it disabled; on single node systems leave this option
2774 config SYS_SUPPORTS_NUMA
2777 config HAVE_SETUP_PER_CPU_AREA
2781 config NEED_PER_CPU_EMBED_FIRST_CHUNK
2786 bool "Relocatable kernel"
2787 depends on SYS_SUPPORTS_RELOCATABLE
2788 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2789 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2790 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2791 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2794 This builds a kernel image that retains relocation information
2795 so it can be loaded someplace besides the default 1MB.
2796 The relocations make the kernel binary about 15% larger,
2797 but are discarded at runtime
2799 config RELOCATION_TABLE_SIZE
2800 hex "Relocation table size"
2801 depends on RELOCATABLE
2802 range 0x0 0x01000000
2803 default "0x00200000" if CPU_LOONGSON64
2804 default "0x00100000"
2806 A table of relocation data will be appended to the kernel binary
2807 and parsed at boot to fix up the relocated kernel.
2809 This option allows the amount of space reserved for the table to be
2810 adjusted, although the default of 1Mb should be ok in most cases.
2812 The build will fail and a valid size suggested if this is too small.
2814 If unsure, leave at the default value.
2816 config RANDOMIZE_BASE
2817 bool "Randomize the address of the kernel image"
2818 depends on RELOCATABLE
2820 Randomizes the physical and virtual address at which the
2821 kernel image is loaded, as a security feature that
2822 deters exploit attempts relying on knowledge of the location
2823 of kernel internals.
2825 Entropy is generated using any coprocessor 0 registers available.
2827 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2831 config RANDOMIZE_BASE_MAX_OFFSET
2832 hex "Maximum kASLR offset" if EXPERT
2833 depends on RANDOMIZE_BASE
2834 range 0x0 0x40000000 if EVA || 64BIT
2835 range 0x0 0x08000000
2836 default "0x01000000"
2838 When kASLR is active, this provides the maximum offset that will
2839 be applied to the kernel image. It should be set according to the
2840 amount of physical RAM available in the target system minus
2841 PHYSICAL_START and must be a power of 2.
2843 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2844 EVA or 64-bit. The default is 16Mb.
2851 config HW_PERF_EVENTS
2852 bool "Enable hardware performance counter support for perf events"
2853 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2856 Enable hardware performance counter support for perf events. If
2857 disabled, perf events will use software events only.
2860 bool "Enable DMI scanning"
2861 depends on MACH_LOONGSON64
2862 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2865 Enabled scanning of DMI to identify machine quirks. Say Y
2866 here unless you have verified that your setup is not
2867 affected by entries in the DMI blacklist. Required by PNP
2871 bool "Multi-Processing support"
2872 depends on SYS_SUPPORTS_SMP
2874 This enables support for systems with more than one CPU. If you have
2875 a system with only one CPU, say N. If you have a system with more
2876 than one CPU, say Y.
2878 If you say N here, the kernel will run on uni- and multiprocessor
2879 machines, but will use only one CPU of a multiprocessor machine. If
2880 you say Y here, the kernel will run on many, but not all,
2881 uniprocessor machines. On a uniprocessor machine, the kernel
2882 will run faster if you say N here.
2884 People using multiprocessor machines who say Y here should also say
2885 Y to "Enhanced Real Time Clock Support", below.
2887 See also the SMP-HOWTO available at
2888 <https://www.tldp.org/docs.html#howto>.
2890 If you don't know what to do here, say N.
2893 bool "Support for hot-pluggable CPUs"
2894 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2896 Say Y here to allow turning CPUs off and on. CPUs can be
2897 controlled through /sys/devices/system/cpu.
2898 (Note: power management support will enable this option
2899 automatically on SMP systems. )
2900 Say N if you want to disable CPU hotplug.
2905 config SYS_SUPPORTS_MIPS_CMP
2908 config SYS_SUPPORTS_MIPS_CPS
2911 config SYS_SUPPORTS_SMP
2914 config NR_CPUS_DEFAULT_4
2917 config NR_CPUS_DEFAULT_8
2920 config NR_CPUS_DEFAULT_16
2923 config NR_CPUS_DEFAULT_32
2926 config NR_CPUS_DEFAULT_64
2930 int "Maximum number of CPUs (2-256)"
2933 default "4" if NR_CPUS_DEFAULT_4
2934 default "8" if NR_CPUS_DEFAULT_8
2935 default "16" if NR_CPUS_DEFAULT_16
2936 default "32" if NR_CPUS_DEFAULT_32
2937 default "64" if NR_CPUS_DEFAULT_64
2939 This allows you to specify the maximum number of CPUs which this
2940 kernel will support. The maximum supported value is 32 for 32-bit
2941 kernel and 64 for 64-bit kernels; the minimum value which makes
2942 sense is 1 for Qemu (useful only for kernel debugging purposes)
2943 and 2 for all others.
2945 This is purely to save memory - each supported CPU adds
2946 approximately eight kilobytes to the kernel image. For best
2947 performance should round up your number of processors to the next
2950 config MIPS_PERF_SHARED_TC_COUNTERS
2953 config MIPS_NR_CPU_NR_MAP_1024
2956 config MIPS_NR_CPU_NR_MAP
2959 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2960 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2963 # Timer Interrupt Frequency Configuration
2967 prompt "Timer frequency"
2970 Allows the configuration of the timer frequency.
2973 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2976 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2979 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2982 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2985 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2988 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2991 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2994 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2998 config SYS_SUPPORTS_24HZ
3001 config SYS_SUPPORTS_48HZ
3004 config SYS_SUPPORTS_100HZ
3007 config SYS_SUPPORTS_128HZ
3010 config SYS_SUPPORTS_250HZ
3013 config SYS_SUPPORTS_256HZ
3016 config SYS_SUPPORTS_1000HZ
3019 config SYS_SUPPORTS_1024HZ
3022 config SYS_SUPPORTS_ARBIT_HZ
3024 default y if !SYS_SUPPORTS_24HZ && \
3025 !SYS_SUPPORTS_48HZ && \
3026 !SYS_SUPPORTS_100HZ && \
3027 !SYS_SUPPORTS_128HZ && \
3028 !SYS_SUPPORTS_250HZ && \
3029 !SYS_SUPPORTS_256HZ && \
3030 !SYS_SUPPORTS_1000HZ && \
3031 !SYS_SUPPORTS_1024HZ
3037 default 100 if HZ_100
3038 default 128 if HZ_128
3039 default 250 if HZ_250
3040 default 256 if HZ_256
3041 default 1000 if HZ_1000
3042 default 1024 if HZ_1024
3045 def_bool HIGH_RES_TIMERS
3048 bool "Kexec system call"
3051 kexec is a system call that implements the ability to shutdown your
3052 current kernel, and to start another kernel. It is like a reboot
3053 but it is independent of the system firmware. And like a reboot
3054 you can start any kernel with it, not just Linux.
3056 The name comes from the similarity to the exec system call.
3058 It is an ongoing process to be certain the hardware in a machine
3059 is properly shutdown, so do not be surprised if this code does not
3060 initially work for you. As of this writing the exact hardware
3061 interface is strongly in flux, so no good recommendation can be
3065 bool "Kernel crash dumps"
3067 Generate crash dump after being started by kexec.
3068 This should be normally only set in special crash dump kernels
3069 which are loaded in the main kernel with kexec-tools into
3070 a specially reserved region and then later executed after
3071 a crash by kdump/kexec. The crash dump kernel must be compiled
3072 to a memory address not used by the main kernel or firmware using
3075 config PHYSICAL_START
3076 hex "Physical address where the kernel is loaded"
3077 default "0xffffffff84000000"
3078 depends on CRASH_DUMP
3080 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3081 If you plan to use kernel for capturing the crash dump change
3082 this value to start of the reserved region (the "X" value as
3083 specified in the "crashkernel=YM@XM" command line boot parameter
3084 passed to the panic-ed kernel).
3086 config MIPS_O32_FP64_SUPPORT
3087 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3088 depends on 32BIT || MIPS32_O32
3090 When this is enabled, the kernel will support use of 64-bit floating
3091 point registers with binaries using the O32 ABI along with the
3092 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3093 32-bit MIPS systems this support is at the cost of increasing the
3094 size and complexity of the compiled FPU emulator. Thus if you are
3095 running a MIPS32 system and know that none of your userland binaries
3096 will require 64-bit floating point, you may wish to reduce the size
3097 of your kernel & potentially improve FP emulation performance by
3100 Although binutils currently supports use of this flag the details
3101 concerning its effect upon the O32 ABI in userland are still being
3102 worked on. In order to avoid userland becoming dependent upon current
3103 behaviour before the details have been finalised, this option should
3104 be considered experimental and only enabled by those working upon
3112 select OF_EARLY_FLATTREE
3122 prompt "Kernel appended dtb support" if USE_OF
3123 default MIPS_NO_APPENDED_DTB
3125 config MIPS_NO_APPENDED_DTB
3128 Do not enable appended dtb support.
3130 config MIPS_ELF_APPENDED_DTB
3133 With this option, the boot code will look for a device tree binary
3134 DTB) included in the vmlinux ELF section .appended_dtb. By default
3135 it is empty and the DTB can be appended using binutils command
3138 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3140 This is meant as a backward compatibility convenience for those
3141 systems with a bootloader that can't be upgraded to accommodate
3142 the documented boot protocol using a device tree.
3144 config MIPS_RAW_APPENDED_DTB
3145 bool "vmlinux.bin or vmlinuz.bin"
3147 With this option, the boot code will look for a device tree binary
3148 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3149 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3151 This is meant as a backward compatibility convenience for those
3152 systems with a bootloader that can't be upgraded to accommodate
3153 the documented boot protocol using a device tree.
3155 Beware that there is very little in terms of protection against
3156 this option being confused by leftover garbage in memory that might
3157 look like a DTB header after a reboot if no actual DTB is appended
3158 to vmlinux.bin. Do not leave this option active in a production kernel
3159 if you don't intend to always append a DTB.
3163 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3164 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3165 !MACH_LOONGSON64 && !MIPS_MALTA && \
3167 default MIPS_CMDLINE_FROM_BOOTLOADER
3169 config MIPS_CMDLINE_FROM_DTB
3171 bool "Dtb kernel arguments if available"
3173 config MIPS_CMDLINE_DTB_EXTEND
3175 bool "Extend dtb kernel arguments with bootloader arguments"
3177 config MIPS_CMDLINE_FROM_BOOTLOADER
3178 bool "Bootloader kernel arguments if available"
3180 config MIPS_CMDLINE_BUILTIN_EXTEND
3181 depends on CMDLINE_BOOL
3182 bool "Extend builtin kernel arguments with bootloader arguments"
3187 config LOCKDEP_SUPPORT
3191 config STACKTRACE_SUPPORT
3195 config PGTABLE_LEVELS
3197 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3198 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3201 config MIPS_AUTO_PFN_OFFSET
3204 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3206 config PCI_DRIVERS_GENERIC
3207 select PCI_DOMAINS_GENERIC if PCI
3210 config PCI_DRIVERS_LEGACY
3211 def_bool !PCI_DRIVERS_GENERIC
3212 select NO_GENERIC_PCI_IOPORT_MAP
3213 select PCI_DOMAINS if PCI
3216 # ISA support is now enabled via select. Too many systems still have the one
3217 # or other ISA chip on the board that users don't know about so don't expect
3218 # users to choose the right thing ...
3224 bool "TURBOchannel support"
3225 depends on MACH_DECSTATION
3227 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3228 processors. TURBOchannel programming specifications are available
3230 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3232 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3233 Linux driver support status is documented at:
3234 <http://www.linux-mips.org/wiki/DECstation>
3240 config ARCH_MMAP_RND_BITS_MIN
3244 config ARCH_MMAP_RND_BITS_MAX
3248 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3251 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3258 select MIPS_EXTERNAL_TIMER
3264 config MIPS32_COMPAT
3270 config SYSVIPC_COMPAT
3274 bool "Kernel support for o32 binaries"
3276 select ARCH_WANT_OLD_COMPAT_IPC
3278 select MIPS32_COMPAT
3279 select SYSVIPC_COMPAT if SYSVIPC
3281 Select this option if you want to run o32 binaries. These are pure
3282 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3283 existing binaries are in this format.
3288 bool "Kernel support for n32 binaries"
3290 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3292 select MIPS32_COMPAT
3293 select SYSVIPC_COMPAT if SYSVIPC
3295 Select this option if you want to run n32 binaries. These are
3296 64-bit binaries using 32-bit quantities for addressing and certain
3297 data that would normally be 64-bit. They are used in special
3302 menu "Power management options"
3304 config ARCH_HIBERNATION_POSSIBLE
3306 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3308 config ARCH_SUSPEND_POSSIBLE
3310 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3312 source "kernel/power/Kconfig"
3316 config MIPS_EXTERNAL_TIMER
3319 menu "CPU Power Management"
3321 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3322 source "drivers/cpufreq/Kconfig"
3325 source "drivers/cpuidle/Kconfig"
3329 source "arch/mips/kvm/Kconfig"
3331 source "arch/mips/vdso/Kconfig"