1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Generic support for queying CPU info
5 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
6 * Copyright (C) 2007-2009 PetaLogix
7 * Copyright (C) 2007 John Williams <jwilliams@itee.uq.edu.au>
10 #ifndef _ASM_MICROBLAZE_CPUINFO_H
11 #define _ASM_MICROBLAZE_CPUINFO_H
15 /* CPU Version and FPGA Family code conversion table type */
21 extern const struct cpu_ver_key cpu_ver_lookup[];
23 struct family_string_key {
28 extern const struct family_string_key family_string_lookup[];
31 /* Core CPU configuration */
45 u32 icache_line_length;
47 unsigned long icache_base;
48 unsigned long icache_high;
53 u32 dcache_line_length;
56 unsigned long dcache_base;
57 unsigned long dcache_high;
66 /* CPU interrupt line info */
72 /* HW debug support */
77 u32 cpu_clock_freq; /* store real freq of cpu */
87 extern struct cpuinfo cpuinfo;
89 /* fwd declarations of the various CPUinfo populators */
90 void setup_cpuinfo(void);
91 void setup_cpuinfo_clk(void);
93 void set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu);
94 void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu);
96 static inline unsigned int fcpu(struct device_node *cpu, char *n)
100 of_property_read_u32(cpu, n, &val);
105 #endif /* _ASM_MICROBLAZE_CPUINFO_H */