2 * Meta exception handling.
4 * Copyright (C) 2005,2006,2007,2008,2009,2012 Imagination Technologies Ltd.
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
11 #include <linux/export.h>
12 #include <linux/sched.h>
13 #include <linux/sched/debug.h>
14 #include <linux/sched/task.h>
15 #include <linux/sched/task_stack.h>
16 #include <linux/signal.h>
17 #include <linux/kernel.h>
19 #include <linux/types.h>
20 #include <linux/init.h>
21 #include <linux/interrupt.h>
22 #include <linux/preempt.h>
23 #include <linux/ptrace.h>
24 #include <linux/module.h>
25 #include <linux/kallsyms.h>
26 #include <linux/kdebug.h>
27 #include <linux/kexec.h>
28 #include <linux/unistd.h>
29 #include <linux/smp.h>
30 #include <linux/slab.h>
31 #include <linux/syscalls.h>
34 #include <asm/core_reg.h>
35 #include <asm/irqflags.h>
36 #include <asm/siginfo.h>
37 #include <asm/traps.h>
38 #include <asm/hwthread.h>
39 #include <asm/setup.h>
40 #include <asm/switch.h>
41 #include <asm/user_gateway.h>
42 #include <asm/syscall.h>
43 #include <asm/syscalls.h>
45 /* Passing syscall arguments as long long is quicker. */
46 typedef unsigned int (*LPSYSCALL) (unsigned long long,
51 * Users of LNKSET should compare the bus error bits obtained from DEFR
52 * against TXDEFR_LNKSET_SUCCESS only as the failure code will vary between
53 * different cores revisions.
55 #define TXDEFR_LNKSET_SUCCESS 0x02000000
56 #define TXDEFR_LNKSET_FAILURE 0x04000000
59 * Our global TBI handle. Initialised from setup.c/setup_arch.
61 DECLARE_PER_CPU(PTBI, pTBI);
64 static DEFINE_PER_CPU(unsigned int, trigger_mask);
66 unsigned int global_trigger_mask;
67 EXPORT_SYMBOL(global_trigger_mask);
70 unsigned long per_cpu__stack_save[NR_CPUS];
72 static const char * const trap_names[] = {
73 [TBIXXF_SIGNUM_IIF] = "Illegal instruction fault",
74 [TBIXXF_SIGNUM_PGF] = "Privilege violation",
75 [TBIXXF_SIGNUM_DHF] = "Unaligned data access fault",
76 [TBIXXF_SIGNUM_IGF] = "Code fetch general read failure",
77 [TBIXXF_SIGNUM_DGF] = "Data access general read/write fault",
78 [TBIXXF_SIGNUM_IPF] = "Code fetch page fault",
79 [TBIXXF_SIGNUM_DPF] = "Data access page fault",
80 [TBIXXF_SIGNUM_IHF] = "Instruction breakpoint",
81 [TBIXXF_SIGNUM_DWF] = "Read-only data access fault",
84 const char *trap_name(int trapno)
86 if (trapno >= 0 && trapno < ARRAY_SIZE(trap_names)
87 && trap_names[trapno])
88 return trap_names[trapno];
89 return "Unknown fault";
92 static DEFINE_SPINLOCK(die_lock);
94 void __noreturn die(const char *str, struct pt_regs *regs,
95 long err, unsigned long addr)
97 static int die_counter;
101 spin_lock_irq(&die_lock);
104 pr_err("%s: err %04lx (%s) addr %08lx [#%d]\n", str, err & 0xffff,
105 trap_name(err & 0xffff), addr, ++die_counter);
110 pr_err("Process: %s (pid: %d, stack limit = %p)\n", current->comm,
111 task_pid_nr(current), task_stack_page(current) + THREAD_SIZE);
114 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
115 if (kexec_should_crash(current))
119 panic("Fatal exception in interrupt");
122 panic("Fatal exception");
124 spin_unlock_irq(&die_lock);
129 #ifdef CONFIG_METAG_DSP
131 * The ECH encoding specifies the size of a DSPRAM as,
135 * A "slot" is the size of two DSPRAM bank entries; an entry from
136 * DSPRAM bank A and an entry from DSPRAM bank B. One DSPRAM bank
140 static inline unsigned int decode_dspram_size(unsigned int size)
142 unsigned int _sz = size & 0x7f;
144 return _sz * SLOT_SZ * 4;
147 static void dspram_save(struct meta_ext_context *dsp_ctx,
148 unsigned int ramA_sz, unsigned int ramB_sz)
150 unsigned int ram_sz[2];
156 for (i = 0; i < 2; i++) {
157 if (ram_sz[i] != 0) {
161 sz = decode_dspram_size(ram_sz[i] >> 8);
163 sz = decode_dspram_size(ram_sz[i]);
165 if (dsp_ctx->ram[i] == NULL) {
166 dsp_ctx->ram[i] = kmalloc(sz, GFP_KERNEL);
168 if (dsp_ctx->ram[i] == NULL)
169 panic("couldn't save DSP context");
171 if (ram_sz[i] > dsp_ctx->ram_sz[i]) {
172 kfree(dsp_ctx->ram[i]);
174 dsp_ctx->ram[i] = kmalloc(sz,
177 if (dsp_ctx->ram[i] == NULL)
178 panic("couldn't save DSP context");
183 __TBIDspramSaveA(ram_sz[i], dsp_ctx->ram[i]);
185 __TBIDspramSaveB(ram_sz[i], dsp_ctx->ram[i]);
187 dsp_ctx->ram_sz[i] = ram_sz[i];
191 #endif /* CONFIG_METAG_DSP */
194 * Allow interrupts to be nested and save any "extended" register
195 * context state, e.g. DSP regs and RAMs.
197 static void nest_interrupts(TBIRES State, unsigned long mask)
199 #ifdef CONFIG_METAG_DSP
200 struct meta_ext_context *dsp_ctx;
204 * D0.8 may contain an ECH encoding. The upper 16 bits
205 * tell us what DSP resources the current process is
206 * using. OR the bits into the SaveMask so that
207 * __TBINestInts() knows what resources to save as
208 * part of this context.
210 * Don't save the context if we're nesting interrupts in the
211 * kernel because the kernel doesn't use DSP hardware.
213 D0_8 = __core_reg_get(D0.8);
215 if (D0_8 && (State.Sig.SaveMask & TBICTX_PRIV_BIT)) {
216 State.Sig.SaveMask |= (D0_8 >> 16);
218 dsp_ctx = current->thread.dsp_context;
219 if (dsp_ctx == NULL) {
220 dsp_ctx = kzalloc(sizeof(*dsp_ctx), GFP_KERNEL);
222 panic("couldn't save DSP context: ENOMEM");
224 current->thread.dsp_context = dsp_ctx;
227 current->thread.user_flags |= (D0_8 & 0xffff0000);
228 __TBINestInts(State, &dsp_ctx->regs, mask);
229 dspram_save(dsp_ctx, D0_8 & 0x7f00, D0_8 & 0x007f);
231 __TBINestInts(State, NULL, mask);
233 __TBINestInts(State, NULL, mask);
237 void head_end(TBIRES State, unsigned long mask)
239 unsigned int savemask = (unsigned short)State.Sig.SaveMask;
240 unsigned int ctx_savemask = (unsigned short)State.Sig.pCtx->SaveMask;
242 if (savemask & TBICTX_PRIV_BIT) {
243 ctx_savemask |= TBICTX_PRIV_BIT;
244 current->thread.user_flags = savemask;
247 /* Always undo the sleep bit */
248 ctx_savemask &= ~TBICTX_WAIT_BIT;
250 /* Always save the catch buffer and RD pipe if they are dirty */
251 savemask |= TBICTX_XCBF_BIT;
253 /* Only save the catch and RD if we have not already done so.
254 * Note - the RD bits are in the pCtx only, and not in the
257 if ((savemask & TBICTX_CBUF_BIT) ||
258 (ctx_savemask & TBICTX_CBRP_BIT)) {
259 /* Have we already saved the buffers though?
260 * - See TestTrack 5071 */
261 if (ctx_savemask & TBICTX_XCBF_BIT) {
262 /* Strip off the bits so the call to __TBINestInts
263 * won't save the buffers again. */
264 savemask &= ~TBICTX_CBUF_BIT;
265 ctx_savemask &= ~TBICTX_CBRP_BIT;
269 #ifdef CONFIG_METAG_META21
271 unsigned int depth, txdefr;
276 * The process may have been interrupted after a LNKSET, but
277 * before it could read the DEFR state, so we mustn't lose that
278 * state or it could end up retrying an atomic operation that
281 * All interrupts are disabled at this point so we
282 * don't need to perform any locking. We must do this
283 * dance before we use LNKGET or LNKSET.
285 BUG_ON(current->thread.int_depth > HARDIRQ_BITS);
287 depth = current->thread.int_depth++;
289 txdefr = __core_reg_get(TXDEFR);
291 txdefr &= TXDEFR_BUS_STATE_BITS;
292 if (txdefr & TXDEFR_LNKSET_SUCCESS)
293 current->thread.txdefr_failure &= ~(1 << depth);
295 current->thread.txdefr_failure |= (1 << depth);
299 State.Sig.SaveMask = savemask;
300 State.Sig.pCtx->SaveMask = ctx_savemask;
302 nest_interrupts(State, mask);
304 #ifdef CONFIG_METAG_POISON_CATCH_BUFFERS
305 /* Poison the catch registers. This shows up any mistakes we have
306 * made in their handling MUCH quicker.
308 __core_reg_set(TXCATCH0, 0x87650021);
309 __core_reg_set(TXCATCH1, 0x87654322);
310 __core_reg_set(TXCATCH2, 0x87654323);
311 __core_reg_set(TXCATCH3, 0x87654324);
312 #endif /* CONFIG_METAG_POISON_CATCH_BUFFERS */
315 TBIRES tail_end_sys(TBIRES State, int syscall, int *restart)
317 struct pt_regs *regs = (struct pt_regs *)State.Sig.pCtx;
322 if (user_mode(regs)) {
323 flags = current_thread_info()->flags;
324 if (flags & _TIF_WORK_MASK &&
325 do_work_pending(regs, flags, syscall)) {
330 #ifdef CONFIG_METAG_FPU
331 if (current->thread.fpu_context &&
332 current->thread.fpu_context->needs_restore) {
333 __TBICtxFPURestore(State, current->thread.fpu_context);
335 * Clearing this bit ensures the FP unit is not made
336 * active again unless it is used.
338 State.Sig.SaveMask &= ~TBICTX_FPAC_BIT;
339 current->thread.fpu_context->needs_restore = false;
341 State.Sig.TrigMask |= TBI_TRIG_BIT(TBID_SIGNUM_DFR);
345 /* TBI will turn interrupts back on at some point. */
346 if (!irqs_disabled_flags((unsigned long)State.Sig.TrigMask))
349 #ifdef CONFIG_METAG_DSP
351 * If we previously saved an extended context then restore it
352 * now. Otherwise, clear D0.8 because this process is not
353 * using DSP hardware.
355 if (State.Sig.pCtx->SaveMask & TBICTX_XEXT_BIT) {
357 struct meta_ext_context *dsp_ctx = current->thread.dsp_context;
359 /* Make sure we're going to return to userland. */
360 BUG_ON(current->thread.int_depth != 1);
362 if (dsp_ctx->ram_sz[0] > 0)
363 __TBIDspramRestoreA(dsp_ctx->ram_sz[0],
365 if (dsp_ctx->ram_sz[1] > 0)
366 __TBIDspramRestoreB(dsp_ctx->ram_sz[1],
369 State.Sig.SaveMask |= State.Sig.pCtx->SaveMask;
370 __TBICtxRestore(State, current->thread.dsp_context);
371 D0_8 = __core_reg_get(D0.8);
372 D0_8 |= current->thread.user_flags & 0xffff0000;
373 D0_8 |= (dsp_ctx->ram_sz[1] | dsp_ctx->ram_sz[0]) & 0xffff;
374 __core_reg_set(D0.8, D0_8);
376 __core_reg_set(D0.8, 0);
377 #endif /* CONFIG_METAG_DSP */
379 #ifdef CONFIG_METAG_META21
381 unsigned int depth, txdefr;
384 * If there hasn't been a LNKSET since the last LNKGET then the
385 * link flag will be set, causing the next LNKSET to succeed if
386 * the addresses match. The two LNK operations may not be a pair
387 * (e.g. see atomic_read()), so the LNKSET should fail.
388 * We use a conditional-never LNKSET to clear the link flag
389 * without side effects.
391 asm volatile("LNKSETDNV [D0Re0],D0Re0");
393 depth = --current->thread.int_depth;
395 BUG_ON(user_mode(regs) && depth);
397 txdefr = __core_reg_get(TXDEFR);
399 txdefr &= ~TXDEFR_BUS_STATE_BITS;
401 /* Do we need to restore a failure code into TXDEFR? */
402 if (current->thread.txdefr_failure & (1 << depth))
403 txdefr |= (TXDEFR_LNKSET_FAILURE | TXDEFR_BUS_TRIG_BIT);
405 txdefr |= (TXDEFR_LNKSET_SUCCESS | TXDEFR_BUS_TRIG_BIT);
407 __core_reg_set(TXDEFR, txdefr);
415 * If we took an interrupt in the middle of __kuser_get_tls then we need
416 * to rewind the PC to the start of the function in case the process
417 * gets migrated to another thread (SMP only) and it reads the wrong tls
420 static inline void _restart_critical_section(TBIRES State)
422 unsigned long get_tls_start;
423 unsigned long get_tls_end;
425 get_tls_start = (unsigned long)__kuser_get_tls -
426 (unsigned long)&__user_gateway_start;
428 get_tls_start += USER_GATEWAY_PAGE;
430 get_tls_end = (unsigned long)__kuser_get_tls_end -
431 (unsigned long)&__user_gateway_start;
433 get_tls_end += USER_GATEWAY_PAGE;
435 if ((State.Sig.pCtx->CurrPC >= get_tls_start) &&
436 (State.Sig.pCtx->CurrPC < get_tls_end))
437 State.Sig.pCtx->CurrPC = get_tls_start;
441 * If we took an interrupt in the middle of
442 * __kuser_cmpxchg then we need to rewind the PC to the
443 * start of the function.
445 static inline void _restart_critical_section(TBIRES State)
447 unsigned long cmpxchg_start;
448 unsigned long cmpxchg_end;
450 cmpxchg_start = (unsigned long)__kuser_cmpxchg -
451 (unsigned long)&__user_gateway_start;
453 cmpxchg_start += USER_GATEWAY_PAGE;
455 cmpxchg_end = (unsigned long)__kuser_cmpxchg_end -
456 (unsigned long)&__user_gateway_start;
458 cmpxchg_end += USER_GATEWAY_PAGE;
460 if ((State.Sig.pCtx->CurrPC >= cmpxchg_start) &&
461 (State.Sig.pCtx->CurrPC < cmpxchg_end))
462 State.Sig.pCtx->CurrPC = cmpxchg_start;
466 /* Used by kick_handler() */
467 void restart_critical_section(TBIRES State)
469 _restart_critical_section(State);
472 TBIRES trigger_handler(TBIRES State, int SigNum, int Triggers, int Inst,
475 head_end(State, ~INTS_OFF_MASK);
477 /* If we interrupted user code handle any critical sections. */
478 if (State.Sig.SaveMask & TBICTX_PRIV_BIT)
479 _restart_critical_section(State);
481 trace_hardirqs_off();
483 do_IRQ(SigNum, (struct pt_regs *)State.Sig.pCtx);
485 return tail_end(State);
488 static unsigned int load_fault(PTBICTXEXTCB0 pbuf)
490 return pbuf->CBFlags & TXCATCH0_READ_BIT;
493 static unsigned long fault_address(PTBICTXEXTCB0 pbuf)
498 static void unhandled_fault(struct pt_regs *regs, unsigned long addr,
499 int signo, int code, int trapno)
501 if (user_mode(regs)) {
504 if (show_unhandled_signals && unhandled_signal(current, signo)
505 && printk_ratelimit()) {
507 pr_info("pid %d unhandled fault: pc 0x%08x, addr 0x%08lx, trap %d (%s)\n",
508 current->pid, regs->ctx.CurrPC, addr,
509 trapno, trap_name(trapno));
510 print_vma_addr(" in ", regs->ctx.CurrPC);
511 print_vma_addr(" rtp in ", regs->ctx.DX[4].U1);
516 info.si_signo = signo;
519 info.si_addr = (__force void __user *)addr;
520 info.si_trapno = trapno;
521 force_sig_info(signo, &info, current);
523 die("Oops", regs, trapno, addr);
527 static int handle_data_fault(PTBICTXEXTCB0 pcbuf, struct pt_regs *regs,
528 unsigned int data_address, int trapno)
532 ret = do_page_fault(regs, data_address, !load_fault(pcbuf), trapno);
537 static unsigned long get_inst_fault_address(struct pt_regs *regs)
539 return regs->ctx.CurrPC;
542 TBIRES fault_handler(TBIRES State, int SigNum, int Triggers,
545 struct pt_regs *regs = (struct pt_regs *)State.Sig.pCtx;
546 PTBICTXEXTCB0 pcbuf = (PTBICTXEXTCB0)®s->extcb0;
547 unsigned long data_address;
549 head_end(State, ~INTS_OFF_MASK);
551 /* Hardware breakpoint or data watch */
552 if ((SigNum == TBIXXF_SIGNUM_IHF) ||
553 ((SigNum == TBIXXF_SIGNUM_DHF) &&
554 (pcbuf[0].CBFlags & (TXCATCH0_WATCH1_BIT |
555 TXCATCH0_WATCH0_BIT)))) {
556 State = __TBIUnExpXXX(State, SigNum, Triggers, Inst,
558 return tail_end(State);
563 data_address = fault_address(pcbuf);
566 case TBIXXF_SIGNUM_IGF:
567 /* 1st-level entry invalid (instruction fetch) */
568 case TBIXXF_SIGNUM_IPF: {
569 /* 2nd-level entry invalid (instruction fetch) */
570 unsigned long addr = get_inst_fault_address(regs);
571 do_page_fault(regs, addr, 0, SigNum);
575 case TBIXXF_SIGNUM_DGF:
576 /* 1st-level entry invalid (data access) */
577 case TBIXXF_SIGNUM_DPF:
578 /* 2nd-level entry invalid (data access) */
579 case TBIXXF_SIGNUM_DWF:
580 /* Write to read only page */
581 handle_data_fault(pcbuf, regs, data_address, SigNum);
584 case TBIXXF_SIGNUM_IIF:
585 /* Illegal instruction */
586 unhandled_fault(regs, regs->ctx.CurrPC, SIGILL, ILL_ILLOPC,
590 case TBIXXF_SIGNUM_DHF:
591 /* Unaligned access */
592 unhandled_fault(regs, data_address, SIGBUS, BUS_ADRALN,
595 case TBIXXF_SIGNUM_PGF:
596 /* Privilege violation */
597 unhandled_fault(regs, data_address, SIGSEGV, SEGV_ACCERR,
605 return tail_end(State);
608 static bool switch_is_syscall(unsigned int inst)
610 return inst == __METAG_SW_ENCODING(SYS);
613 static bool switch_is_legacy_syscall(unsigned int inst)
615 return inst == __METAG_SW_ENCODING(SYS_LEGACY);
618 static inline void step_over_switch(struct pt_regs *regs, unsigned int inst)
620 regs->ctx.CurrPC += 4;
623 static inline int test_syscall_work(void)
625 return current_thread_info()->flags & _TIF_WORK_SYSCALL_MASK;
628 TBIRES switch1_handler(TBIRES State, int SigNum, int Triggers,
631 struct pt_regs *regs = (struct pt_regs *)State.Sig.pCtx;
632 unsigned int sysnumber;
633 unsigned long long a1_a2, a3_a4, a5_a6;
634 LPSYSCALL syscall_entry;
637 head_end(State, ~INTS_OFF_MASK);
640 * If this is not a syscall SWITCH it could be a breakpoint.
642 if (!switch_is_syscall(Inst)) {
644 * Alert the user if they're trying to use legacy system
645 * calls. This suggests they need to update their C
646 * library and build against up to date kernel headers.
648 if (switch_is_legacy_syscall(Inst))
649 pr_warn_once("WARNING: A legacy syscall was made. Your userland needs updating.\n");
651 * We don't know how to handle the SWITCH and cannot
652 * safely ignore it, so treat all unknown switches
653 * (including breakpoints) as traps.
655 force_sig(SIGTRAP, current);
656 return tail_end(State);
663 sysnumber = regs->ctx.DX[0].U1;
665 if (test_syscall_work())
666 sysnumber = syscall_trace_enter(regs);
668 /* Skip over the SWITCH instruction - or you just get 'stuck' on it! */
669 step_over_switch(regs, Inst);
671 if (sysnumber >= __NR_syscalls) {
672 pr_debug("unknown syscall number: %d\n", sysnumber);
673 syscall_entry = (LPSYSCALL) sys_ni_syscall;
675 syscall_entry = (LPSYSCALL) sys_call_table[sysnumber];
678 /* Use 64bit loads for speed. */
679 a5_a6 = *(unsigned long long *)®s->ctx.DX[1];
680 a3_a4 = *(unsigned long long *)®s->ctx.DX[2];
681 a1_a2 = *(unsigned long long *)®s->ctx.DX[3];
683 /* here is the actual call to the syscall handler functions */
684 regs->ctx.DX[0].U0 = syscall_entry(a1_a2, a3_a4, a5_a6);
686 if (test_syscall_work())
687 syscall_trace_leave(regs);
689 State = tail_end_sys(State, sysnumber, &restart);
690 /* Handlerless restarts shouldn't go via userland */
692 goto restart_syscall;
696 TBIRES switchx_handler(TBIRES State, int SigNum, int Triggers,
699 struct pt_regs *regs = (struct pt_regs *)State.Sig.pCtx;
702 * This can be caused by any user process simply executing an unusual
703 * SWITCH instruction. If there's no DA, __TBIUnExpXXX will cause the
704 * thread to stop, so signal a SIGTRAP instead.
706 head_end(State, ~INTS_OFF_MASK);
708 force_sig(SIGTRAP, current);
710 State = __TBIUnExpXXX(State, SigNum, Triggers, Inst, pTBI);
711 return tail_end(State);
714 #ifdef CONFIG_METAG_META21
715 TBIRES fpe_handler(TBIRES State, int SigNum, int Triggers, int Inst, PTBI pTBI)
717 struct pt_regs *regs = (struct pt_regs *)State.Sig.pCtx;
718 unsigned int error_state = Triggers;
721 head_end(State, ~INTS_OFF_MASK);
725 info.si_signo = SIGFPE;
727 if (error_state & TXSTAT_FPE_INVALID_BIT)
728 info.si_code = FPE_FLTINV;
729 else if (error_state & TXSTAT_FPE_DIVBYZERO_BIT)
730 info.si_code = FPE_FLTDIV;
731 else if (error_state & TXSTAT_FPE_OVERFLOW_BIT)
732 info.si_code = FPE_FLTOVF;
733 else if (error_state & TXSTAT_FPE_UNDERFLOW_BIT)
734 info.si_code = FPE_FLTUND;
735 else if (error_state & TXSTAT_FPE_INEXACT_BIT)
736 info.si_code = FPE_FLTRES;
740 info.si_addr = (__force void __user *)regs->ctx.CurrPC;
741 force_sig_info(SIGFPE, &info, current);
743 return tail_end(State);
747 #ifdef CONFIG_METAG_SUSPEND_MEM
748 struct traps_context {
749 PTBIAPIFN fnSigs[TBID_SIGNUM_MAX + 1];
752 static struct traps_context *metag_traps_context;
754 int traps_save_context(void)
756 unsigned long cpu = smp_processor_id();
757 PTBI _pTBI = per_cpu(pTBI, cpu);
758 struct traps_context *context;
760 context = kzalloc(sizeof(*context), GFP_ATOMIC);
764 memcpy(context->fnSigs, (void *)_pTBI->fnSigs, sizeof(context->fnSigs));
766 metag_traps_context = context;
770 int traps_restore_context(void)
772 unsigned long cpu = smp_processor_id();
773 PTBI _pTBI = per_cpu(pTBI, cpu);
774 struct traps_context *context = metag_traps_context;
776 metag_traps_context = NULL;
778 memcpy((void *)_pTBI->fnSigs, context->fnSigs, sizeof(context->fnSigs));
786 static inline unsigned int _get_trigger_mask(void)
788 unsigned long cpu = smp_processor_id();
789 return per_cpu(trigger_mask, cpu);
792 unsigned int get_trigger_mask(void)
794 return _get_trigger_mask();
796 EXPORT_SYMBOL(get_trigger_mask);
798 static void set_trigger_mask(unsigned int mask)
800 unsigned long cpu = smp_processor_id();
801 per_cpu(trigger_mask, cpu) = mask;
804 void arch_local_irq_enable(void)
807 arch_local_irq_restore(_get_trigger_mask());
808 preempt_enable_no_resched();
810 EXPORT_SYMBOL(arch_local_irq_enable);
812 static void set_trigger_mask(unsigned int mask)
814 global_trigger_mask = mask;
818 void per_cpu_trap_init(unsigned long cpu)
821 unsigned int thread = cpu_2_hwthread_id[cpu];
823 set_trigger_mask(TBI_INTS_INIT(thread) | /* interrupts */
824 TBI_TRIG_BIT(TBID_SIGNUM_LWK) | /* low level kick */
825 TBI_TRIG_BIT(TBID_SIGNUM_SW1));
827 /* non-priv - use current stack */
828 int_context.Sig.pCtx = NULL;
829 /* Start with interrupts off */
830 int_context.Sig.TrigMask = INTS_OFF_MASK;
831 int_context.Sig.SaveMask = 0;
833 /* And call __TBIASyncTrigger() */
834 __TBIASyncTrigger(int_context);
837 void __init trap_init(void)
839 unsigned long cpu = smp_processor_id();
840 PTBI _pTBI = per_cpu(pTBI, cpu);
842 _pTBI->fnSigs[TBID_SIGNUM_XXF] = fault_handler;
843 _pTBI->fnSigs[TBID_SIGNUM_SW0] = switchx_handler;
844 _pTBI->fnSigs[TBID_SIGNUM_SW1] = switch1_handler;
845 _pTBI->fnSigs[TBID_SIGNUM_SW2] = switchx_handler;
846 _pTBI->fnSigs[TBID_SIGNUM_SW3] = switchx_handler;
847 _pTBI->fnSigs[TBID_SIGNUM_LWK] = kick_handler;
849 #ifdef CONFIG_METAG_META21
850 _pTBI->fnSigs[TBID_SIGNUM_DFR] = __TBIHandleDFR;
851 _pTBI->fnSigs[TBID_SIGNUM_FPE] = fpe_handler;
854 per_cpu_trap_init(cpu);
857 void tbi_startup_interrupt(int irq)
859 unsigned long cpu = smp_processor_id();
860 PTBI _pTBI = per_cpu(pTBI, cpu);
862 BUG_ON(irq > TBID_SIGNUM_MAX);
864 /* For TR1 and TR2, the thread id is encoded in the irq number */
865 if (irq >= TBID_SIGNUM_T10 && irq < TBID_SIGNUM_TR3)
866 cpu = hwthread_id_2_cpu[(irq - TBID_SIGNUM_T10) % 4];
868 set_trigger_mask(get_trigger_mask() | TBI_TRIG_BIT(irq));
870 _pTBI->fnSigs[irq] = trigger_handler;
873 void tbi_shutdown_interrupt(int irq)
875 unsigned long cpu = smp_processor_id();
876 PTBI _pTBI = per_cpu(pTBI, cpu);
878 BUG_ON(irq > TBID_SIGNUM_MAX);
880 set_trigger_mask(get_trigger_mask() & ~TBI_TRIG_BIT(irq));
882 _pTBI->fnSigs[irq] = __TBIUnExpXXX;
885 int ret_from_fork(TBIRES arg)
887 struct task_struct *prev = arg.Switch.pPara;
888 struct task_struct *tsk = current;
889 struct pt_regs *regs = task_pt_regs(tsk);
895 if (tsk->flags & PF_KTHREAD) {
896 fn = (void *)regs->ctx.DX[4].U1;
899 fn((void *)regs->ctx.DX[3].U1);
902 if (test_syscall_work())
903 syscall_trace_leave(regs);
907 Next.Sig.TrigMask = get_trigger_mask();
908 Next.Sig.SaveMask = 0;
909 Next.Sig.pCtx = ®s->ctx;
911 set_gateway_tls(current->thread.tls_ptr);
913 preempt_enable_no_resched();
915 /* And interrupts should come back on when we resume the real usermode
916 * code. Call __TBIASyncResume()
918 __TBIASyncResume(tail_end(Next));
919 /* ASyncResume should NEVER return */
924 void show_trace(struct task_struct *tsk, unsigned long *sp,
925 struct pt_regs *regs)
928 #ifdef CONFIG_FRAME_POINTER
929 unsigned long fp, fpnew;
933 if (regs && user_mode(regs))
936 printk("\nCall trace: ");
937 #ifdef CONFIG_KALLSYMS
944 #ifdef CONFIG_FRAME_POINTER
946 print_ip_sym(regs->ctx.CurrPC);
947 fp = regs->ctx.AX[1].U0;
949 fp = __core_reg_get(A0FrP);
952 /* detect when the frame pointer has been used for other purposes and
953 * doesn't point to the stack (it may point completely elsewhere which
954 * kstack_end may not detect).
956 stack = (unsigned long)task_stack_page(tsk);
957 while (fp >= stack && fp + 8 <= stack + THREAD_SIZE) {
958 addr = __raw_readl((unsigned long *)(fp + 4)) - 4;
959 if (kernel_text_address(addr))
963 /* stack grows up, so frame pointers must decrease */
964 fpnew = __raw_readl((unsigned long *)(fp + 0));
970 while (!kstack_end(sp)) {
972 if (kernel_text_address(addr))
979 debug_show_held_locks(tsk);
982 void show_stack(struct task_struct *tsk, unsigned long *sp)
987 sp = (unsigned long *)current_stack_pointer;
989 sp = (unsigned long *)tsk->thread.kernel_context->AX[0].U0;
991 show_trace(tsk, sp, NULL);