1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/m68k/mvme147/config.c
5 * Copyright (C) 1996 Dave Frascone [chaos@mindspring.com]
6 * Cloned from Richard Hirst [richard@sleepie.demon.co.uk]
10 * Copyright (C) 1993 Hamish Macdonald
13 #include <linux/types.h>
14 #include <linux/kernel.h>
16 #include <linux/tty.h>
17 #include <linux/clocksource.h>
18 #include <linux/console.h>
19 #include <linux/linkage.h>
20 #include <linux/init.h>
21 #include <linux/major.h>
22 #include <linux/rtc.h>
23 #include <linux/interrupt.h>
25 #include <asm/bootinfo.h>
26 #include <asm/bootinfo-vme.h>
27 #include <asm/byteorder.h>
28 #include <asm/setup.h>
30 #include <asm/traps.h>
31 #include <asm/machdep.h>
32 #include <asm/mvme147hw.h>
33 #include <asm/config.h>
36 static void mvme147_get_model(char *model);
37 extern void mvme147_sched_init(void);
38 extern int mvme147_hwclk (int, struct rtc_time *);
39 extern void mvme147_reset (void);
42 static int bcd2int (unsigned char b);
45 int __init mvme147_parse_bootinfo(const struct bi_record *bi)
47 uint16_t tag = be16_to_cpu(bi->tag);
48 if (tag == BI_VME_TYPE || tag == BI_VME_BRDINFO)
54 void mvme147_reset(void)
56 pr_info("\r\n\nCalled mvme147_reset\r\n");
57 m147_pcc->watchdog = 0x0a; /* Clear timer */
58 m147_pcc->watchdog = 0xa5; /* Enable watchdog - 100ms to reset */
63 static void mvme147_get_model(char *model)
65 sprintf(model, "Motorola MVME147");
69 * This function is called during kernel startup to initialize
70 * the mvme147 IRQ handling routines.
73 static void __init mvme147_init_IRQ(void)
75 m68k_setup_user_interrupt(VEC_USER, 192);
78 void __init config_mvme147(void)
80 mach_sched_init = mvme147_sched_init;
81 mach_init_IRQ = mvme147_init_IRQ;
82 mach_hwclk = mvme147_hwclk;
83 mach_reset = mvme147_reset;
84 mach_get_model = mvme147_get_model;
86 /* Board type is only set by newer versions of vmelilo/tftplilo */
88 vme_brdtype = VME_TYPE_MVME147;
91 static u64 mvme147_read_clk(struct clocksource *cs);
93 static struct clocksource mvme147_clk = {
96 .read = mvme147_read_clk,
97 .mask = CLOCKSOURCE_MASK(32),
98 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
101 static u32 clk_total;
103 #define PCC_TIMER_CLOCK_FREQ 160000
104 #define PCC_TIMER_CYCLES (PCC_TIMER_CLOCK_FREQ / HZ)
105 #define PCC_TIMER_PRELOAD (0x10000 - PCC_TIMER_CYCLES)
107 /* Using pcc tick timer 1 */
109 static irqreturn_t mvme147_timer_int (int irq, void *dev_id)
113 local_irq_save(flags);
114 m147_pcc->t1_cntrl = PCC_TIMER_CLR_OVF | PCC_TIMER_COC_EN |
116 m147_pcc->t1_int_cntrl = PCC_INT_ENAB | PCC_TIMER_INT_CLR |
118 clk_total += PCC_TIMER_CYCLES;
119 legacy_timer_tick(1);
120 local_irq_restore(flags);
126 void mvme147_sched_init (void)
128 if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, IRQF_TIMER,
130 pr_err("Couldn't register timer interrupt\n");
132 /* Init the clock with a value */
133 /* The clock counter increments until 0xFFFF then reloads */
134 m147_pcc->t1_preload = PCC_TIMER_PRELOAD;
135 m147_pcc->t1_cntrl = PCC_TIMER_CLR_OVF | PCC_TIMER_COC_EN |
137 m147_pcc->t1_int_cntrl = PCC_INT_ENAB | PCC_TIMER_INT_CLR |
140 clocksource_register_hz(&mvme147_clk, PCC_TIMER_CLOCK_FREQ);
143 static u64 mvme147_read_clk(struct clocksource *cs)
150 local_irq_save(flags);
151 tmp = m147_pcc->t1_cntrl >> 4;
152 count = m147_pcc->t1_count;
153 overflow = m147_pcc->t1_cntrl >> 4;
155 count = m147_pcc->t1_count;
156 count -= PCC_TIMER_PRELOAD;
157 ticks = count + overflow * PCC_TIMER_CYCLES;
159 local_irq_restore(flags);
164 static int bcd2int (unsigned char b)
166 return ((b>>4)*10 + (b&15));
169 int mvme147_hwclk(int op, struct rtc_time *t)
172 m147_rtc->ctrl = RTC_READ;
173 t->tm_year = bcd2int (m147_rtc->bcd_year);
174 t->tm_mon = bcd2int(m147_rtc->bcd_mth) - 1;
175 t->tm_mday = bcd2int (m147_rtc->bcd_dom);
176 t->tm_hour = bcd2int (m147_rtc->bcd_hr);
177 t->tm_min = bcd2int (m147_rtc->bcd_min);
178 t->tm_sec = bcd2int (m147_rtc->bcd_sec);
183 /* FIXME Setting the time is not yet supported */