2 * linux/arch/m68k/kernel/traps.c
4 * Copyright (C) 1993, 1994 by Hamish Macdonald
6 * 68040 fixes by Michael Rausch
7 * 68040 fixes by Martin Apel
8 * 68040 fixes and writeback by Richard Zidlicky
9 * 68060 fixes by Roman Hodek
10 * 68060 fixes by Jesper Skov
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file COPYING in the main directory of this archive
18 * Sets up all exception vectors
21 #include <linux/sched.h>
22 #include <linux/sched/debug.h>
23 #include <linux/signal.h>
24 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/user.h>
28 #include <linux/string.h>
29 #include <linux/linkage.h>
30 #include <linux/init.h>
31 #include <linux/ptrace.h>
32 #include <linux/kallsyms.h>
33 #include <linux/extable.h>
35 #include <asm/setup.h>
37 #include <linux/uaccess.h>
38 #include <asm/traps.h>
39 #include <asm/pgalloc.h>
40 #include <asm/machdep.h>
41 #include <asm/siginfo.h>
44 static const char *vec_names[] = {
45 [VEC_RESETSP] = "RESET SP",
46 [VEC_RESETPC] = "RESET PC",
47 [VEC_BUSERR] = "BUS ERROR",
48 [VEC_ADDRERR] = "ADDRESS ERROR",
49 [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION",
50 [VEC_ZERODIV] = "ZERO DIVIDE",
52 [VEC_TRAP] = "TRAPcc",
53 [VEC_PRIV] = "PRIVILEGE VIOLATION",
54 [VEC_TRACE] = "TRACE",
55 [VEC_LINE10] = "LINE 1010",
56 [VEC_LINE11] = "LINE 1111",
57 [VEC_RESV12] = "UNASSIGNED RESERVED 12",
58 [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION",
59 [VEC_FORMAT] = "FORMAT ERROR",
60 [VEC_UNINT] = "UNINITIALIZED INTERRUPT",
61 [VEC_RESV16] = "UNASSIGNED RESERVED 16",
62 [VEC_RESV17] = "UNASSIGNED RESERVED 17",
63 [VEC_RESV18] = "UNASSIGNED RESERVED 18",
64 [VEC_RESV19] = "UNASSIGNED RESERVED 19",
65 [VEC_RESV20] = "UNASSIGNED RESERVED 20",
66 [VEC_RESV21] = "UNASSIGNED RESERVED 21",
67 [VEC_RESV22] = "UNASSIGNED RESERVED 22",
68 [VEC_RESV23] = "UNASSIGNED RESERVED 23",
69 [VEC_SPUR] = "SPURIOUS INTERRUPT",
70 [VEC_INT1] = "LEVEL 1 INT",
71 [VEC_INT2] = "LEVEL 2 INT",
72 [VEC_INT3] = "LEVEL 3 INT",
73 [VEC_INT4] = "LEVEL 4 INT",
74 [VEC_INT5] = "LEVEL 5 INT",
75 [VEC_INT6] = "LEVEL 6 INT",
76 [VEC_INT7] = "LEVEL 7 INT",
77 [VEC_SYS] = "SYSCALL",
78 [VEC_TRAP1] = "TRAP #1",
79 [VEC_TRAP2] = "TRAP #2",
80 [VEC_TRAP3] = "TRAP #3",
81 [VEC_TRAP4] = "TRAP #4",
82 [VEC_TRAP5] = "TRAP #5",
83 [VEC_TRAP6] = "TRAP #6",
84 [VEC_TRAP7] = "TRAP #7",
85 [VEC_TRAP8] = "TRAP #8",
86 [VEC_TRAP9] = "TRAP #9",
87 [VEC_TRAP10] = "TRAP #10",
88 [VEC_TRAP11] = "TRAP #11",
89 [VEC_TRAP12] = "TRAP #12",
90 [VEC_TRAP13] = "TRAP #13",
91 [VEC_TRAP14] = "TRAP #14",
92 [VEC_TRAP15] = "TRAP #15",
93 [VEC_FPBRUC] = "FPCP BSUN",
94 [VEC_FPIR] = "FPCP INEXACT",
95 [VEC_FPDIVZ] = "FPCP DIV BY 0",
96 [VEC_FPUNDER] = "FPCP UNDERFLOW",
97 [VEC_FPOE] = "FPCP OPERAND ERROR",
98 [VEC_FPOVER] = "FPCP OVERFLOW",
99 [VEC_FPNAN] = "FPCP SNAN",
100 [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION",
101 [VEC_MMUCFG] = "MMU CONFIGURATION ERROR",
102 [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR",
103 [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR",
104 [VEC_RESV59] = "UNASSIGNED RESERVED 59",
105 [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60",
106 [VEC_UNIMPII] = "UNASSIGNED RESERVED 61",
107 [VEC_RESV62] = "UNASSIGNED RESERVED 62",
108 [VEC_RESV63] = "UNASSIGNED RESERVED 63",
111 static const char *space_names[] = {
113 [USER_DATA] = "User Data",
114 [USER_PROGRAM] = "User Program",
118 [FC_CONTROL] = "Control",
121 [SUPER_DATA] = "Super Data",
122 [SUPER_PROGRAM] = "Super Program",
126 void die_if_kernel(char *,struct pt_regs *,int);
127 asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
128 unsigned long error_code);
129 int send_fault_sig(struct pt_regs *regs);
131 asmlinkage void trap_c(struct frame *fp);
133 #if defined (CONFIG_M68060)
134 static inline void access_error060 (struct frame *fp)
136 unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
138 pr_debug("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
140 if (fslw & MMU060_BPE) {
141 /* branch prediction error -> clear branch cache */
142 __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
143 "orl #0x00400000,%/d0\n\t"
146 /* return if there's no other error */
147 if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
151 if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
152 unsigned long errorcode;
153 unsigned long addr = fp->un.fmt4.effaddr;
155 if (fslw & MMU060_MA)
156 addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
159 if (fslw & MMU060_DESC_ERR) {
160 __flush_tlb040_one(addr);
165 pr_debug("errorcode = %ld\n", errorcode);
166 do_page_fault(&fp->ptregs, addr, errorcode);
167 } else if (fslw & (MMU060_SEE)){
168 /* Software Emulation Error.
169 * fault during mem_read/mem_write in ifpsp060/os.S
171 send_fault_sig(&fp->ptregs);
172 } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
173 send_fault_sig(&fp->ptregs) > 0) {
174 pr_err("pc=%#lx, fa=%#lx\n", fp->ptregs.pc,
175 fp->un.fmt4.effaddr);
176 pr_err("68060 access error, fslw=%lx\n", fslw);
180 #endif /* CONFIG_M68060 */
182 #if defined (CONFIG_M68040)
183 static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
186 mm_segment_t old_fs = get_fs();
188 set_fs(MAKE_MM_SEG(wbs));
191 asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
193 asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
195 asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
202 static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
206 mm_segment_t old_fs = get_fs();
208 /* set_fs can not be moved, otherwise put_user() may oops */
209 set_fs(MAKE_MM_SEG(wbs));
211 switch (wbs & WBSIZ_040) {
213 res = put_user(wbd & 0xff, (char __user *)wba);
216 res = put_user(wbd & 0xffff, (short __user *)wba);
219 res = put_user(wbd, (int __user *)wba);
223 /* set_fs can not be moved, otherwise put_user() may oops */
227 pr_debug("do_040writeback1, res=%d\n", res);
232 /* after an exception in a writeback the stack frame corresponding
233 * to that exception is discarded, set a few bits in the old frame
234 * to simulate what it should look like
236 static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
238 fp->un.fmt7.faddr = wba;
239 fp->un.fmt7.ssw = wbs & 0xff;
240 if (wba != current->thread.faddr)
241 fp->un.fmt7.ssw |= MA_040;
244 static inline void do_040writebacks(struct frame *fp)
248 if (fp->un.fmt7.wb1s & WBV_040)
249 pr_err("access_error040: cannot handle 1st writeback. oops.\n");
252 if ((fp->un.fmt7.wb2s & WBV_040) &&
253 !(fp->un.fmt7.wb2s & WBTT_040)) {
254 res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
257 fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
259 fp->un.fmt7.wb2s = 0;
262 /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
263 if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
264 res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
268 fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
270 fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
271 fp->un.fmt7.wb3s &= (~WBV_040);
272 fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
273 fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
276 fp->un.fmt7.wb3s = 0;
280 send_fault_sig(&fp->ptregs);
284 * called from sigreturn(), must ensure userspace code didn't
285 * manipulate exception frame to circumvent protection, then complete
287 * we just clear TM2 to turn it into a userspace access
289 asmlinkage void berr_040cleanup(struct frame *fp)
291 fp->un.fmt7.wb2s &= ~4;
292 fp->un.fmt7.wb3s &= ~4;
294 do_040writebacks(fp);
297 static inline void access_error040(struct frame *fp)
299 unsigned short ssw = fp->un.fmt7.ssw;
302 pr_debug("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
303 pr_debug("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
304 fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
305 pr_debug("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
306 fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
307 fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
310 unsigned long addr = fp->un.fmt7.faddr;
311 unsigned long errorcode;
314 * The MMU status has to be determined AFTER the address
315 * has been corrected if there was a misaligned access (MA).
318 addr = (addr + 7) & -8;
320 /* MMU error, get the MMUSR info for this access */
321 mmusr = probe040(!(ssw & RW_040), addr, ssw);
322 pr_debug("mmusr = %lx\n", mmusr);
324 if (!(mmusr & MMU_R_040)) {
325 /* clear the invalid atc entry */
326 __flush_tlb040_one(addr);
330 /* despite what documentation seems to say, RMW
331 * accesses have always both the LK and RW bits set */
332 if (!(ssw & RW_040) || (ssw & LK_040))
335 if (do_page_fault(&fp->ptregs, addr, errorcode)) {
336 pr_debug("do_page_fault() !=0\n");
337 if (user_mode(&fp->ptregs)){
338 /* delay writebacks after signal delivery */
339 pr_debug(".. was usermode - return\n");
342 /* disable writeback into user space from kernel
343 * (if do_page_fault didn't fix the mapping,
344 * the writeback won't do good)
347 pr_debug(".. disabling wb2\n");
348 if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
349 fp->un.fmt7.wb2s &= ~WBV_040;
350 if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr)
351 fp->un.fmt7.wb3s &= ~WBV_040;
354 /* In case of a bus error we either kill the process or expect
355 * the kernel to catch the fault, which then is also responsible
356 * for cleaning up the mess.
358 current->thread.signo = SIGBUS;
359 current->thread.faddr = fp->un.fmt7.faddr;
360 if (send_fault_sig(&fp->ptregs) >= 0)
361 pr_err("68040 bus error (ssw=%x, faddr=%lx)\n", ssw,
366 do_040writebacks(fp);
368 #endif /* CONFIG_M68040 */
370 #if defined(CONFIG_SUN3)
371 #include <asm/sun3mmu.h>
373 extern int mmu_emu_handle_fault (unsigned long, int, int);
375 /* sun3 version of bus_error030 */
377 static inline void bus_error030 (struct frame *fp)
379 unsigned char buserr_type = sun3_get_buserr ();
380 unsigned long addr, errorcode;
381 unsigned short ssw = fp->un.fmtb.ssw;
382 extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
385 pr_debug("Instruction fault at %#010lx\n",
387 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
389 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
391 pr_debug("Data %s fault at %#010lx in %s (pc=%#lx)\n",
392 ssw & RW ? "read" : "write",
394 space_names[ssw & DFC], fp->ptregs.pc);
397 * Check if this page should be demand-mapped. This needs to go before
398 * the testing for a bad kernel-space access (demand-mapping applies
399 * to kernel accesses too).
403 && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
404 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
408 /* Check for kernel-space pagefault (BAD). */
409 if (fp->ptregs.sr & PS_S) {
410 /* kernel fault must be a data fault to user space */
411 if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
412 // try checking the kernel mappings before surrender
413 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
415 /* instruction fault or kernel data fault! */
417 pr_err("Instruction fault at %#010lx\n",
420 /* was this fault incurred testing bus mappings? */
421 if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
422 (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
423 send_fault_sig(&fp->ptregs);
427 pr_err("Data %s fault at %#010lx in %s (pc=%#lx)\n",
428 ssw & RW ? "read" : "write",
430 space_names[ssw & DFC], fp->ptregs.pc);
432 pr_err("BAD KERNEL BUSERR\n");
434 die_if_kernel("Oops", &fp->ptregs,0);
440 if (!(ssw & (FC | FB)) && !(ssw & DF))
441 /* not an instruction fault or data fault! BAD */
442 panic ("USER BUSERR w/o instruction or data fault");
446 /* First handle the data fault, if any. */
448 addr = fp->un.fmtb.daddr;
450 // errorcode bit 0: 0 -> no page 1 -> protection fault
451 // errorcode bit 1: 0 -> read fault 1 -> write fault
453 // (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault
454 // (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault
456 if (buserr_type & SUN3_BUSERR_PROTERR)
458 else if (buserr_type & SUN3_BUSERR_INVALID)
461 pr_debug("*** unexpected busfault type=%#04x\n",
463 pr_debug("invalid %s access at %#lx from pc %#lx\n",
464 !(ssw & RW) ? "write" : "read", addr,
466 die_if_kernel ("Oops", &fp->ptregs, buserr_type);
471 //todo: wtf is RM bit? --m
472 if (!(ssw & RW) || ssw & RM)
475 /* Handle page fault. */
476 do_page_fault (&fp->ptregs, addr, errorcode);
478 /* Retry the data fault now. */
482 /* Now handle the instruction fault. */
484 /* Get the fault address. */
485 if (fp->ptregs.format == 0xA)
486 addr = fp->ptregs.pc + 4;
488 addr = fp->un.fmtb.baddr;
492 if (buserr_type & SUN3_BUSERR_INVALID) {
493 if (!mmu_emu_handle_fault(addr, 1, 0))
494 do_page_fault (&fp->ptregs, addr, 0);
496 pr_debug("protection fault on insn access (segv).\n");
501 #if defined(CPU_M68020_OR_M68030)
502 static inline void bus_error030 (struct frame *fp)
504 volatile unsigned short temp;
505 unsigned short mmusr;
506 unsigned long addr, errorcode;
507 unsigned short ssw = fp->un.fmtb.ssw;
512 pr_debug("pid = %x ", current->pid);
513 pr_debug("SSW=%#06x ", ssw);
516 pr_debug("Instruction fault at %#010lx\n",
518 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
520 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
522 pr_debug("Data %s fault at %#010lx in %s (pc=%#lx)\n",
523 ssw & RW ? "read" : "write",
525 space_names[ssw & DFC], fp->ptregs.pc);
527 /* ++andreas: If a data fault and an instruction fault happen
528 at the same time map in both pages. */
530 /* First handle the data fault, if any. */
532 addr = fp->un.fmtb.daddr;
535 asm volatile ("ptestr %3,%2@,#7,%0\n\t"
537 : "=a&" (desc), "=m" (temp)
538 : "a" (addr), "d" (ssw));
539 pr_debug("mmusr is %#x for addr %#lx in task %p\n",
540 temp, addr, current);
541 pr_debug("descriptor address is 0x%p, contents %#lx\n",
542 __va(desc), *(unsigned long *)__va(desc));
544 asm volatile ("ptestr %2,%1@,#7\n\t"
546 : "=m" (temp) : "a" (addr), "d" (ssw));
549 errorcode = (mmusr & MMU_I) ? 0 : 1;
550 if (!(ssw & RW) || (ssw & RM))
553 if (mmusr & (MMU_I | MMU_WP)) {
554 /* We might have an exception table for this PC */
555 if (ssw & 4 && !search_exception_tables(fp->ptregs.pc)) {
556 pr_err("Data %s fault at %#010lx in %s (pc=%#lx)\n",
557 ssw & RW ? "read" : "write",
559 space_names[ssw & DFC], fp->ptregs.pc);
562 /* Don't try to do anything further if an exception was
564 if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
566 } else if (!(mmusr & MMU_I)) {
567 /* probably a 020 cas fault */
568 if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
569 pr_err("unexpected bus error (%#x,%#x)\n", ssw,
571 } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
572 pr_err("invalid %s access at %#lx from pc %#lx\n",
573 !(ssw & RW) ? "write" : "read", addr,
575 die_if_kernel("Oops",&fp->ptregs,mmusr);
580 static volatile long tlong;
583 pr_err("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
584 !(ssw & RW) ? "write" : "read", addr,
586 asm volatile ("ptestr #1,%1@,#0\n\t"
592 pr_err("level 0 mmusr is %#x\n", mmusr);
594 asm volatile ("pmove %%tt0,%0"
596 pr_debug("tt0 is %#lx, ", tlong);
597 asm volatile ("pmove %%tt1,%0"
599 pr_debug("tt1 is %#lx\n", tlong);
601 pr_debug("Unknown SIGSEGV - 1\n");
602 die_if_kernel("Oops",&fp->ptregs,mmusr);
607 /* setup an ATC entry for the access about to be retried */
608 if (!(ssw & RW) || (ssw & RM))
609 asm volatile ("ploadw %1,%0@" : /* no outputs */
610 : "a" (addr), "d" (ssw));
612 asm volatile ("ploadr %1,%0@" : /* no outputs */
613 : "a" (addr), "d" (ssw));
616 /* Now handle the instruction fault. */
618 if (!(ssw & (FC|FB)))
621 if (fp->ptregs.sr & PS_S) {
622 pr_err("Instruction fault at %#010lx\n", fp->ptregs.pc);
624 pr_err("BAD KERNEL BUSERR\n");
625 die_if_kernel("Oops",&fp->ptregs,0);
630 /* get the fault address */
631 if (fp->ptregs.format == 10)
632 addr = fp->ptregs.pc + 4;
634 addr = fp->un.fmtb.baddr;
638 if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
639 /* Insn fault on same page as data fault. But we
640 should still create the ATC entry. */
641 goto create_atc_entry;
644 asm volatile ("ptestr #1,%2@,#7,%0\n\t"
646 : "=a&" (desc), "=m" (temp)
648 pr_debug("mmusr is %#x for addr %#lx in task %p\n",
649 temp, addr, current);
650 pr_debug("descriptor address is 0x%p, contents %#lx\n",
651 __va(desc), *(unsigned long *)__va(desc));
653 asm volatile ("ptestr #1,%1@,#7\n\t"
655 : "=m" (temp) : "a" (addr));
659 do_page_fault (&fp->ptregs, addr, 0);
660 else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
661 pr_err("invalid insn access at %#lx from pc %#lx\n",
662 addr, fp->ptregs.pc);
663 pr_debug("Unknown SIGSEGV - 2\n");
664 die_if_kernel("Oops",&fp->ptregs,mmusr);
670 /* setup an ATC entry for the access about to be retried */
671 asm volatile ("ploadr #2,%0@" : /* no outputs */
674 #endif /* CPU_M68020_OR_M68030 */
675 #endif /* !CONFIG_SUN3 */
677 #if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
678 #include <asm/mcfmmu.h>
681 * The following table converts the FS encoding of a ColdFire
682 * exception stack frame into the error_code value needed by
685 static const unsigned char fs_err_code[] = {
704 static inline void access_errorcf(unsigned int fs, struct frame *fp)
706 unsigned long mmusr, addr;
707 unsigned int err_code;
710 mmusr = mmu_read(MMUSR);
711 addr = mmu_read(MMUAR);
715 * bit 0 == 0 means no page found, 1 means protection fault
716 * bit 1 == 0 means read, 1 means write
719 case 5: /* 0101 TLB opword X miss */
720 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 0);
721 addr = fp->ptregs.pc;
723 case 6: /* 0110 TLB extension word X miss */
724 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 1);
725 addr = fp->ptregs.pc + sizeof(long);
727 case 10: /* 1010 TLB W miss */
728 need_page_fault = cf_tlb_miss(&fp->ptregs, 1, 1, 0);
730 case 14: /* 1110 TLB R miss */
731 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 1, 0);
736 /* 0010 Interrupt during debug service routine */
738 /* 0100 X Protection */
739 /* 0111 IFP in emulator mode */
740 /* 1000 W Protection*/
741 /* 1001 Write error*/
743 /* 1100 R Protection*/
744 /* 1101 R Protection*/
745 /* 1111 OEP in emulator mode*/
750 if (need_page_fault) {
751 err_code = fs_err_code[fs];
752 if ((fs == 13) && (mmusr & MMUSR_WF)) /* rd-mod-wr access */
753 err_code |= 2; /* bit1 - write, bit0 - protection */
754 do_page_fault(&fp->ptregs, addr, err_code);
757 #endif /* CONFIG_COLDFIRE CONFIG_MMU */
759 asmlinkage void buserr_c(struct frame *fp)
761 /* Only set esp0 if coming from user mode */
762 if (user_mode(&fp->ptregs))
763 current->thread.esp0 = (unsigned long) fp;
765 pr_debug("*** Bus Error *** Format is %x\n", fp->ptregs.format);
767 #if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
768 if (CPU_IS_COLDFIRE) {
770 fs = (fp->ptregs.vector & 0x3) |
771 ((fp->ptregs.vector & 0xc00) >> 8);
781 access_errorcf(fs, fp);
787 #endif /* CONFIG_COLDFIRE && CONFIG_MMU */
789 switch (fp->ptregs.format) {
790 #if defined (CONFIG_M68060)
791 case 4: /* 68060 access error */
792 access_error060 (fp);
795 #if defined (CONFIG_M68040)
796 case 0x7: /* 68040 access error */
797 access_error040 (fp);
800 #if defined (CPU_M68020_OR_M68030)
807 die_if_kernel("bad frame format",&fp->ptregs,0);
808 pr_debug("Unknown SIGSEGV - 4\n");
814 static int kstack_depth_to_print = 48;
816 void show_trace(unsigned long *stack)
818 unsigned long *endstack;
822 pr_info("Call Trace:");
823 addr = (unsigned long)stack + THREAD_SIZE - 1;
824 endstack = (unsigned long *)(addr & -THREAD_SIZE);
826 while (stack + 1 <= endstack) {
829 * If the address is either in the text segment of the
830 * kernel, or in the region which contains vmalloc'ed
831 * memory, it *may* be the address of a calling
832 * routine; if so, print it so that someone tracing
833 * down the cause of the crash will be able to figure
834 * out the call path that was taken.
836 if (__kernel_text_address(addr)) {
837 #ifndef CONFIG_KALLSYMS
841 pr_cont(" [<%08lx>] %pS\n", addr, (void *)addr);
848 void show_registers(struct pt_regs *regs)
850 struct frame *fp = (struct frame *)regs;
851 mm_segment_t old_fs = get_fs();
857 pr_info("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc);
858 pr_info("SR: %04x SP: %p a2: %08lx\n", regs->sr, regs, regs->a2);
859 pr_info("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
860 regs->d0, regs->d1, regs->d2, regs->d3);
861 pr_info("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
862 regs->d4, regs->d5, regs->a0, regs->a1);
864 pr_info("Process %s (pid: %d, task=%p)\n",
865 current->comm, task_pid_nr(current), current);
866 addr = (unsigned long)&fp->un;
867 pr_info("Frame format=%X ", regs->format);
868 switch (regs->format) {
870 pr_cont("instr addr=%08lx\n", fp->un.fmt2.iaddr);
871 addr += sizeof(fp->un.fmt2);
874 pr_cont("eff addr=%08lx\n", fp->un.fmt3.effaddr);
875 addr += sizeof(fp->un.fmt3);
879 pr_cont("fault addr=%08lx fslw=%08lx\n",
880 fp->un.fmt4.effaddr, fp->un.fmt4.pc);
882 pr_cont("eff addr=%08lx pc=%08lx\n",
883 fp->un.fmt4.effaddr, fp->un.fmt4.pc);
884 addr += sizeof(fp->un.fmt4);
887 pr_cont("eff addr=%08lx ssw=%04x faddr=%08lx\n",
888 fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
889 pr_info("wb 1 stat/addr/data: %04x %08lx %08lx\n",
890 fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
891 pr_info("wb 2 stat/addr/data: %04x %08lx %08lx\n",
892 fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
893 pr_info("wb 3 stat/addr/data: %04x %08lx %08lx\n",
894 fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
895 pr_info("push data: %08lx %08lx %08lx %08lx\n",
896 fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
898 addr += sizeof(fp->un.fmt7);
901 pr_cont("instr addr=%08lx\n", fp->un.fmt9.iaddr);
902 addr += sizeof(fp->un.fmt9);
905 pr_cont("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
906 fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
907 fp->un.fmta.daddr, fp->un.fmta.dobuf);
908 addr += sizeof(fp->un.fmta);
911 pr_cont("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
912 fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
913 fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
914 pr_info("baddr=%08lx dibuf=%08lx ver=%x\n",
915 fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
916 addr += sizeof(fp->un.fmtb);
921 show_stack(NULL, (unsigned long *)addr);
925 cp = (u16 *)regs->pc;
926 for (i = -8; i < 16; i++) {
927 if (get_user(c, cp + i) && i >= 0) {
928 pr_cont(" Bad PC value.");
934 pr_cont(" <%04x>", c);
940 void show_stack(struct task_struct *task, unsigned long *stack)
943 unsigned long *endstack;
948 stack = (unsigned long *)task->thread.esp0;
950 stack = (unsigned long *)&stack;
952 endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
954 pr_info("Stack from %08lx:", (unsigned long)stack);
956 for (i = 0; i < kstack_depth_to_print; i++) {
957 if (p + 1 > endstack)
961 pr_cont(" %08lx", *p++);
968 * The vector number returned in the frame pointer may also contain
969 * the "fs" (Fault Status) bits on ColdFire. These are in the bottom
970 * 2 bits, and upper 2 bits. So we need to mask out the real vector
971 * number before using it in comparisons. You don't need to do this on
972 * real 68k parts, but it won't hurt either.
975 void bad_super_trap (struct frame *fp)
977 int vector = (fp->ptregs.vector >> 2) & 0xff;
980 if (vector < ARRAY_SIZE(vec_names))
981 pr_err("*** %s *** FORMAT=%X\n",
985 pr_err("*** Exception %d *** FORMAT=%X\n",
986 vector, fp->ptregs.format);
987 if (vector == VEC_ADDRERR && CPU_IS_020_OR_030) {
988 unsigned short ssw = fp->un.fmtb.ssw;
990 pr_err("SSW=%#06x ", ssw);
993 pr_err("Pipe stage C instruction fault at %#010lx\n",
994 (fp->ptregs.format) == 0xA ?
995 fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
997 pr_err("Pipe stage B instruction fault at %#010lx\n",
998 (fp->ptregs.format) == 0xA ?
999 fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
1001 pr_err("Data %s fault at %#010lx in %s (pc=%#lx)\n",
1002 ssw & RW ? "read" : "write",
1003 fp->un.fmtb.daddr, space_names[ssw & DFC],
1006 pr_err("Current process id is %d\n", task_pid_nr(current));
1007 die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
1010 asmlinkage void trap_c(struct frame *fp)
1014 int vector = (fp->ptregs.vector >> 2) & 0xff;
1016 if (fp->ptregs.sr & PS_S) {
1017 if (vector == VEC_TRACE) {
1018 /* traced a trapping instruction on a 68020/30,
1019 * real exception will be executed afterwards.
1024 if (fixup_exception(&fp->ptregs))
1031 /* send the appropriate signal to the user program */
1034 si_code = BUS_ADRALN;
1040 si_code = ILL_ILLOPC;
1044 si_code = ILL_PRVOPC;
1048 si_code = ILL_COPROC;
1065 si_code = ILL_ILLTRP;
1071 si_code = FPE_FLTINV;
1075 si_code = FPE_FLTRES;
1079 si_code = FPE_FLTDIV;
1083 si_code = FPE_FLTUND;
1087 si_code = FPE_FLTOVF;
1091 si_code = FPE_INTDIV;
1096 si_code = FPE_INTOVF;
1099 case VEC_TRACE: /* ptrace single step */
1100 si_code = TRAP_TRACE;
1103 case VEC_TRAP15: /* breakpoint */
1104 si_code = TRAP_BRKPT;
1108 si_code = ILL_ILLOPC;
1112 switch (fp->ptregs.format) {
1114 addr = (void __user *) fp->ptregs.pc;
1117 addr = (void __user *) fp->un.fmt2.iaddr;
1120 addr = (void __user *) fp->un.fmt7.effaddr;
1123 addr = (void __user *) fp->un.fmt9.iaddr;
1126 addr = (void __user *) fp->un.fmta.daddr;
1129 addr = (void __user*) fp->un.fmtb.daddr;
1132 force_sig_fault(sig, si_code, addr);
1135 void die_if_kernel (char *str, struct pt_regs *fp, int nr)
1137 if (!(fp->sr & PS_S))
1141 pr_crit("%s: %08x\n", str, nr);
1143 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
1144 make_task_dead(SIGSEGV);
1147 asmlinkage void set_esp0(unsigned long ssp)
1149 current->thread.esp0 = ssp;
1153 * This function is called if an error occur while accessing
1154 * user-space from the fpsp040 code.
1156 asmlinkage void fpsp040_die(void)
1161 #ifdef CONFIG_M68KFPU_EMU
1162 asmlinkage void fpemu_signal(int signal, int code, void *addr)
1164 force_sig_fault(signal, code, addr);