arch/m68k/kernel/traps.c

   1 /*
   2  *  linux/arch/m68k/kernel/traps.c
   3  *
   4  *  Copyright (C) 1993, 1994 by Hamish Macdonald
   5  *
   6  *  68040 fixes by Michael Rausch
   7  *  68040 fixes by Martin Apel
   8  *  68040 fixes and writeback by Richard Zidlicky
   9  *  68060 fixes by Roman Hodek
  10  *  68060 fixes by Jesper Skov
  11  *
  12  * This file is subject to the terms and conditions of the GNU General Public
  13  * License.  See the file COPYING in the main directory of this archive
  14  * for more details.
  15  */
  16
  17 /*
  18  * Sets up all exception vectors
  19  */
  20
  21 #include <linux/sched.h>
  22 #include <linux/sched/debug.h>
  23 #include <linux/signal.h>
  24 #include <linux/kernel.h>
  25 #include <linux/mm.h>
  26 #include <linux/module.h>
  27 #include <linux/user.h>
  28 #include <linux/string.h>
  29 #include <linux/linkage.h>
  30 #include <linux/init.h>
  31 #include <linux/ptrace.h>
  32 #include <linux/kallsyms.h>
  33 #include <linux/extable.h>
  34
  35 #include <asm/setup.h>
  36 #include <asm/fpu.h>
  37 #include <linux/uaccess.h>
  38 #include <asm/traps.h>
  39 #include <asm/pgalloc.h>
  40 #include <asm/machdep.h>
  41 #include <asm/siginfo.h>
  42
  43
  44 static const char *vec_names[] = {
  45         [VEC_RESETSP]   = "RESET SP",
  46         [VEC_RESETPC]   = "RESET PC",
  47         [VEC_BUSERR]    = "BUS ERROR",
  48         [VEC_ADDRERR]   = "ADDRESS ERROR",
  49         [VEC_ILLEGAL]   = "ILLEGAL INSTRUCTION",
  50         [VEC_ZERODIV]   = "ZERO DIVIDE",
  51         [VEC_CHK]       = "CHK",
  52         [VEC_TRAP]      = "TRAPcc",
  53         [VEC_PRIV]      = "PRIVILEGE VIOLATION",
  54         [VEC_TRACE]     = "TRACE",
  55         [VEC_LINE10]    = "LINE 1010",
  56         [VEC_LINE11]    = "LINE 1111",
  57         [VEC_RESV12]    = "UNASSIGNED RESERVED 12",
  58         [VEC_COPROC]    = "COPROCESSOR PROTOCOL VIOLATION",
  59         [VEC_FORMAT]    = "FORMAT ERROR",
  60         [VEC_UNINT]     = "UNINITIALIZED INTERRUPT",
  61         [VEC_RESV16]    = "UNASSIGNED RESERVED 16",
  62         [VEC_RESV17]    = "UNASSIGNED RESERVED 17",
  63         [VEC_RESV18]    = "UNASSIGNED RESERVED 18",
  64         [VEC_RESV19]    = "UNASSIGNED RESERVED 19",
  65         [VEC_RESV20]    = "UNASSIGNED RESERVED 20",
  66         [VEC_RESV21]    = "UNASSIGNED RESERVED 21",
  67         [VEC_RESV22]    = "UNASSIGNED RESERVED 22",
  68         [VEC_RESV23]    = "UNASSIGNED RESERVED 23",
  69         [VEC_SPUR]      = "SPURIOUS INTERRUPT",
  70         [VEC_INT1]      = "LEVEL 1 INT",
  71         [VEC_INT2]      = "LEVEL 2 INT",
  72         [VEC_INT3]      = "LEVEL 3 INT",
  73         [VEC_INT4]      = "LEVEL 4 INT",
  74         [VEC_INT5]      = "LEVEL 5 INT",
  75         [VEC_INT6]      = "LEVEL 6 INT",
  76         [VEC_INT7]      = "LEVEL 7 INT",
  77         [VEC_SYS]       = "SYSCALL",
  78         [VEC_TRAP1]     = "TRAP #1",
  79         [VEC_TRAP2]     = "TRAP #2",
  80         [VEC_TRAP3]     = "TRAP #3",
  81         [VEC_TRAP4]     = "TRAP #4",
  82         [VEC_TRAP5]     = "TRAP #5",
  83         [VEC_TRAP6]     = "TRAP #6",
  84         [VEC_TRAP7]     = "TRAP #7",
  85         [VEC_TRAP8]     = "TRAP #8",
  86         [VEC_TRAP9]     = "TRAP #9",
  87         [VEC_TRAP10]    = "TRAP #10",
  88         [VEC_TRAP11]    = "TRAP #11",
  89         [VEC_TRAP12]    = "TRAP #12",
  90         [VEC_TRAP13]    = "TRAP #13",
  91         [VEC_TRAP14]    = "TRAP #14",
  92         [VEC_TRAP15]    = "TRAP #15",
  93         [VEC_FPBRUC]    = "FPCP BSUN",
  94         [VEC_FPIR]      = "FPCP INEXACT",
  95         [VEC_FPDIVZ]    = "FPCP DIV BY 0",
  96         [VEC_FPUNDER]   = "FPCP UNDERFLOW",
  97         [VEC_FPOE]      = "FPCP OPERAND ERROR",
  98         [VEC_FPOVER]    = "FPCP OVERFLOW",
  99         [VEC_FPNAN]     = "FPCP SNAN",
 100         [VEC_FPUNSUP]   = "FPCP UNSUPPORTED OPERATION",
 101         [VEC_MMUCFG]    = "MMU CONFIGURATION ERROR",
 102         [VEC_MMUILL]    = "MMU ILLEGAL OPERATION ERROR",
 103         [VEC_MMUACC]    = "MMU ACCESS LEVEL VIOLATION ERROR",
 104         [VEC_RESV59]    = "UNASSIGNED RESERVED 59",
 105         [VEC_UNIMPEA]   = "UNASSIGNED RESERVED 60",
 106         [VEC_UNIMPII]   = "UNASSIGNED RESERVED 61",
 107         [VEC_RESV62]    = "UNASSIGNED RESERVED 62",
 108         [VEC_RESV63]    = "UNASSIGNED RESERVED 63",
 109 };
 110
 111 static const char *space_names[] = {
 112         [0]             = "Space 0",
 113         [USER_DATA]     = "User Data",
 114         [USER_PROGRAM]  = "User Program",
 115 #ifndef CONFIG_SUN3
 116         [3]             = "Space 3",
 117 #else
 118         [FC_CONTROL]    = "Control",
 119 #endif
 120         [4]             = "Space 4",
 121         [SUPER_DATA]    = "Super Data",
 122         [SUPER_PROGRAM] = "Super Program",
 123         [CPU_SPACE]     = "CPU"
 124 };
 125
 126 void die_if_kernel(char *,struct pt_regs *,int);
 127 asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
 128                              unsigned long error_code);
 129 int send_fault_sig(struct pt_regs *regs);
 130
 131 asmlinkage void trap_c(struct frame *fp);
 132
 133 #if defined (CONFIG_M68060)
 134 static inline void access_error060 (struct frame *fp)
 135 {
 136         unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
 137
 138         pr_debug("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
 139
 140         if (fslw & MMU060_BPE) {
 141                 /* branch prediction error -> clear branch cache */
 142                 __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
 143                                       "orl   #0x00400000,%/d0\n\t"
 144                                       "movec %/d0,%/cacr"
 145                                       : : : "d0" );
 146                 /* return if there's no other error */
 147                 if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
 148                         return;
 149         }
 150
 151         if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
 152                 unsigned long errorcode;
 153                 unsigned long addr = fp->un.fmt4.effaddr;
 154
 155                 if (fslw & MMU060_MA)
 156                         addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
 157
 158                 errorcode = 1;
 159                 if (fslw & MMU060_DESC_ERR) {
 160                         __flush_tlb040_one(addr);
 161                         errorcode = 0;
 162                 }
 163                 if (fslw & MMU060_W)
 164                         errorcode |= 2;
 165                 pr_debug("errorcode = %ld\n", errorcode);
 166                 do_page_fault(&fp->ptregs, addr, errorcode);
 167         } else if (fslw & (MMU060_SEE)){
 168                 /* Software Emulation Error.
 169                  * fault during mem_read/mem_write in ifpsp060/os.S
 170                  */
 171                 send_fault_sig(&fp->ptregs);
 172         } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
 173                    send_fault_sig(&fp->ptregs) > 0) {
 174                 pr_err("pc=%#lx, fa=%#lx\n", fp->ptregs.pc,
 175                        fp->un.fmt4.effaddr);
 176                 pr_err("68060 access error, fslw=%lx\n", fslw);
 177                 trap_c( fp );
 178         }
 179 }
 180 #endif /* CONFIG_M68060 */
 181
 182 #if defined (CONFIG_M68040)
 183 static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
 184 {
 185         unsigned long mmusr;
 186         mm_segment_t old_fs = get_fs();
 187
 188         set_fs(MAKE_MM_SEG(wbs));
 189
 190         if (iswrite)
 191                 asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
 192         else
 193                 asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
 194
 195         asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
 196
 197         set_fs(old_fs);
 198
 199         return mmusr;
 200 }
 201
 202 static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
 203                                    unsigned long wbd)
 204 {
 205         int res = 0;
 206         mm_segment_t old_fs = get_fs();
 207
 208         /* set_fs can not be moved, otherwise put_user() may oops */
 209         set_fs(MAKE_MM_SEG(wbs));
 210
 211         switch (wbs & WBSIZ_040) {
 212         case BA_SIZE_BYTE:
 213                 res = put_user(wbd & 0xff, (char __user *)wba);
 214                 break;
 215         case BA_SIZE_WORD:
 216                 res = put_user(wbd & 0xffff, (short __user *)wba);
 217                 break;
 218         case BA_SIZE_LONG:
 219                 res = put_user(wbd, (int __user *)wba);
 220                 break;
 221         }
 222
 223         /* set_fs can not be moved, otherwise put_user() may oops */
 224         set_fs(old_fs);
 225
 226
 227         pr_debug("do_040writeback1, res=%d\n", res);
 228
 229         return res;
 230 }
 231
 232 /* after an exception in a writeback the stack frame corresponding
 233  * to that exception is discarded, set a few bits in the old frame
 234  * to simulate what it should look like
 235  */
 236 static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
 237 {
 238         fp->un.fmt7.faddr = wba;
 239         fp->un.fmt7.ssw = wbs & 0xff;
 240         if (wba != current->thread.faddr)
 241             fp->un.fmt7.ssw |= MA_040;
 242 }
 243
 244 static inline void do_040writebacks(struct frame *fp)
 245 {
 246         int res = 0;
 247 #if 0
 248         if (fp->un.fmt7.wb1s & WBV_040)
 249                 pr_err("access_error040: cannot handle 1st writeback. oops.\n");
 250 #endif
 251
 252         if ((fp->un.fmt7.wb2s & WBV_040) &&
 253             !(fp->un.fmt7.wb2s & WBTT_040)) {
 254                 res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
 255                                        fp->un.fmt7.wb2d);
 256                 if (res)
 257                         fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
 258                 else
 259                         fp->un.fmt7.wb2s = 0;
 260         }
 261
 262         /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
 263         if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
 264                 res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
 265                                        fp->un.fmt7.wb3d);
 266                 if (res)
 267                     {
 268                         fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
 269
 270                         fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
 271                         fp->un.fmt7.wb3s &= (~WBV_040);
 272                         fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
 273                         fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
 274                     }
 275                 else
 276                         fp->un.fmt7.wb3s = 0;
 277         }
 278
 279         if (res)
 280                 send_fault_sig(&fp->ptregs);
 281 }
 282
 283 /*
 284  * called from sigreturn(), must ensure userspace code didn't
 285  * manipulate exception frame to circumvent protection, then complete
 286  * pending writebacks
 287  * we just clear TM2 to turn it into a userspace access
 288  */
 289 asmlinkage void berr_040cleanup(struct frame *fp)
 290 {
 291         fp->un.fmt7.wb2s &= ~4;
 292         fp->un.fmt7.wb3s &= ~4;
 293
 294         do_040writebacks(fp);
 295 }
 296
 297 static inline void access_error040(struct frame *fp)
 298 {
 299         unsigned short ssw = fp->un.fmt7.ssw;
 300         unsigned long mmusr;
 301
 302         pr_debug("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
 303         pr_debug("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
 304                 fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
 305         pr_debug("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
 306                 fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
 307                 fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
 308
 309         if (ssw & ATC_040) {
 310                 unsigned long addr = fp->un.fmt7.faddr;
 311                 unsigned long errorcode;
 312
 313                 /*
 314                  * The MMU status has to be determined AFTER the address
 315                  * has been corrected if there was a misaligned access (MA).
 316                  */
 317                 if (ssw & MA_040)
 318                         addr = (addr + 7) & -8;
 319
 320                 /* MMU error, get the MMUSR info for this access */
 321                 mmusr = probe040(!(ssw & RW_040), addr, ssw);
 322                 pr_debug("mmusr = %lx\n", mmusr);
 323                 errorcode = 1;
 324                 if (!(mmusr & MMU_R_040)) {
 325                         /* clear the invalid atc entry */
 326                         __flush_tlb040_one(addr);
 327                         errorcode = 0;
 328                 }
 329
 330                 /* despite what documentation seems to say, RMW
 331                  * accesses have always both the LK and RW bits set */
 332                 if (!(ssw & RW_040) || (ssw & LK_040))
 333                         errorcode |= 2;
 334
 335                 if (do_page_fault(&fp->ptregs, addr, errorcode)) {
 336                         pr_debug("do_page_fault() !=0\n");
 337                         if (user_mode(&fp->ptregs)){
 338                                 /* delay writebacks after signal delivery */
 339                                 pr_debug(".. was usermode - return\n");
 340                                 return;
 341                         }
 342                         /* disable writeback into user space from kernel
 343                          * (if do_page_fault didn't fix the mapping,
 344                          * the writeback won't do good)
 345                          */
 346 disable_wb:
 347                         pr_debug(".. disabling wb2\n");
 348                         if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
 349                                 fp->un.fmt7.wb2s &= ~WBV_040;
 350                         if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr)
 351                                 fp->un.fmt7.wb3s &= ~WBV_040;
 352                 }
 353         } else {
 354                 /* In case of a bus error we either kill the process or expect
 355                  * the kernel to catch the fault, which then is also responsible
 356                  * for cleaning up the mess.
 357                  */
 358                 current->thread.signo = SIGBUS;
 359                 current->thread.faddr = fp->un.fmt7.faddr;
 360                 if (send_fault_sig(&fp->ptregs) >= 0)
 361                         pr_err("68040 bus error (ssw=%x, faddr=%lx)\n", ssw,
 362                                fp->un.fmt7.faddr);
 363                 goto disable_wb;
 364         }
 365
 366         do_040writebacks(fp);
 367 }
 368 #endif /* CONFIG_M68040 */
 369
 370 #if defined(CONFIG_SUN3)
 371 #include <asm/sun3mmu.h>
 372
 373 extern int mmu_emu_handle_fault (unsigned long, int, int);
 374
 375 /* sun3 version of bus_error030 */
 376
 377 static inline void bus_error030 (struct frame *fp)
 378 {
 379         unsigned char buserr_type = sun3_get_buserr ();
 380         unsigned long addr, errorcode;
 381         unsigned short ssw = fp->un.fmtb.ssw;
 382         extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
 383
 384         if (ssw & (FC | FB))
 385                 pr_debug("Instruction fault at %#010lx\n",
 386                         ssw & FC ?
 387                         fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
 388                         :
 389                         fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
 390         if (ssw & DF)
 391                 pr_debug("Data %s fault at %#010lx in %s (pc=%#lx)\n",
 392                         ssw & RW ? "read" : "write",
 393                         fp->un.fmtb.daddr,
 394                         space_names[ssw & DFC], fp->ptregs.pc);
 395
 396         /*
 397          * Check if this page should be demand-mapped. This needs to go before
 398          * the testing for a bad kernel-space access (demand-mapping applies
 399          * to kernel accesses too).
 400          */
 401
 402         if ((ssw & DF)
 403             && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
 404                 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
 405                         return;
 406         }
 407
 408         /* Check for kernel-space pagefault (BAD). */
 409         if (fp->ptregs.sr & PS_S) {
 410                 /* kernel fault must be a data fault to user space */
 411                 if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
 412                      // try checking the kernel mappings before surrender
 413                      if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
 414                           return;
 415                         /* instruction fault or kernel data fault! */
 416                         if (ssw & (FC | FB))
 417                                 pr_err("Instruction fault at %#010lx\n",
 418                                         fp->ptregs.pc);
 419                         if (ssw & DF) {
 420                                 /* was this fault incurred testing bus mappings? */
 421                                 if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
 422                                    (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
 423                                         send_fault_sig(&fp->ptregs);
 424                                         return;
 425                                 }
 426
 427                                 pr_err("Data %s fault at %#010lx in %s (pc=%#lx)\n",
 428                                         ssw & RW ? "read" : "write",
 429                                         fp->un.fmtb.daddr,
 430                                         space_names[ssw & DFC], fp->ptregs.pc);
 431                         }
 432                         pr_err("BAD KERNEL BUSERR\n");
 433
 434                         die_if_kernel("Oops", &fp->ptregs,0);
 435                         force_sig(SIGKILL, current);
 436                         return;
 437                 }
 438         } else {
 439                 /* user fault */
 440                 if (!(ssw & (FC | FB)) && !(ssw & DF))
 441                         /* not an instruction fault or data fault! BAD */
 442                         panic ("USER BUSERR w/o instruction or data fault");
 443         }
 444
 445
 446         /* First handle the data fault, if any.  */
 447         if (ssw & DF) {
 448                 addr = fp->un.fmtb.daddr;
 449
 450 // errorcode bit 0:     0 -> no page            1 -> protection fault
 451 // errorcode bit 1:     0 -> read fault         1 -> write fault
 452
 453 // (buserr_type & SUN3_BUSERR_PROTERR)  -> protection fault
 454 // (buserr_type & SUN3_BUSERR_INVALID)  -> invalid page fault
 455
 456                 if (buserr_type & SUN3_BUSERR_PROTERR)
 457                         errorcode = 0x01;
 458                 else if (buserr_type & SUN3_BUSERR_INVALID)
 459                         errorcode = 0x00;
 460                 else {
 461                         pr_debug("*** unexpected busfault type=%#04x\n",
 462                                  buserr_type);
 463                         pr_debug("invalid %s access at %#lx from pc %#lx\n",
 464                                  !(ssw & RW) ? "write" : "read", addr,
 465                                  fp->ptregs.pc);
 466                         die_if_kernel ("Oops", &fp->ptregs, buserr_type);
 467                         force_sig (SIGBUS, current);
 468                         return;
 469                 }
 470
 471 //todo: wtf is RM bit? --m
 472                 if (!(ssw & RW) || ssw & RM)
 473                         errorcode |= 0x02;
 474
 475                 /* Handle page fault. */
 476                 do_page_fault (&fp->ptregs, addr, errorcode);
 477
 478                 /* Retry the data fault now. */
 479                 return;
 480         }
 481
 482         /* Now handle the instruction fault. */
 483
 484         /* Get the fault address. */
 485         if (fp->ptregs.format == 0xA)
 486                 addr = fp->ptregs.pc + 4;
 487         else
 488                 addr = fp->un.fmtb.baddr;
 489         if (ssw & FC)
 490                 addr -= 2;
 491
 492         if (buserr_type & SUN3_BUSERR_INVALID) {
 493                 if (!mmu_emu_handle_fault(addr, 1, 0))
 494                         do_page_fault (&fp->ptregs, addr, 0);
 495        } else {
 496                 pr_debug("protection fault on insn access (segv).\n");
 497                 force_sig (SIGSEGV, current);
 498        }
 499 }
 500 #else
 501 #if defined(CPU_M68020_OR_M68030)
 502 static inline void bus_error030 (struct frame *fp)
 503 {
 504         volatile unsigned short temp;
 505         unsigned short mmusr;
 506         unsigned long addr, errorcode;
 507         unsigned short ssw = fp->un.fmtb.ssw;
 508 #ifdef DEBUG
 509         unsigned long desc;
 510 #endif
 511
 512         pr_debug("pid = %x  ", current->pid);
 513         pr_debug("SSW=%#06x  ", ssw);
 514
 515         if (ssw & (FC | FB))
 516                 pr_debug("Instruction fault at %#010lx\n",
 517                         ssw & FC ?
 518                         fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
 519                         :
 520                         fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
 521         if (ssw & DF)
 522                 pr_debug("Data %s fault at %#010lx in %s (pc=%#lx)\n",
 523                         ssw & RW ? "read" : "write",
 524                         fp->un.fmtb.daddr,
 525                         space_names[ssw & DFC], fp->ptregs.pc);
 526
 527         /* ++andreas: If a data fault and an instruction fault happen
 528            at the same time map in both pages.  */
 529
 530         /* First handle the data fault, if any.  */
 531         if (ssw & DF) {
 532                 addr = fp->un.fmtb.daddr;
 533
 534 #ifdef DEBUG
 535                 asm volatile ("ptestr %3,%2@,#7,%0\n\t"
 536                               "pmove %%psr,%1"
 537                               : "=a&" (desc), "=m" (temp)
 538                               : "a" (addr), "d" (ssw));
 539                 pr_debug("mmusr is %#x for addr %#lx in task %p\n",
 540                          temp, addr, current);
 541                 pr_debug("descriptor address is 0x%p, contents %#lx\n",
 542                          __va(desc), *(unsigned long *)__va(desc));
 543 #else
 544                 asm volatile ("ptestr %2,%1@,#7\n\t"
 545                               "pmove %%psr,%0"
 546                               : "=m" (temp) : "a" (addr), "d" (ssw));
 547 #endif
 548                 mmusr = temp;
 549                 errorcode = (mmusr & MMU_I) ? 0 : 1;
 550                 if (!(ssw & RW) || (ssw & RM))
 551                         errorcode |= 2;
 552
 553                 if (mmusr & (MMU_I | MMU_WP)) {
 554                         /* We might have an exception table for this PC */
 555                         if (ssw & 4 && !search_exception_tables(fp->ptregs.pc)) {
 556                                 pr_err("Data %s fault at %#010lx in %s (pc=%#lx)\n",
 557                                        ssw & RW ? "read" : "write",
 558                                        fp->un.fmtb.daddr,
 559                                        space_names[ssw & DFC], fp->ptregs.pc);
 560                                 goto buserr;
 561                         }
 562                         /* Don't try to do anything further if an exception was
 563                            handled. */
 564                         if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
 565                                 return;
 566                 } else if (!(mmusr & MMU_I)) {
 567                         /* probably a 020 cas fault */
 568                         if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
 569                                 pr_err("unexpected bus error (%#x,%#x)\n", ssw,
 570                                        mmusr);
 571                 } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
 572                         pr_err("invalid %s access at %#lx from pc %#lx\n",
 573                                !(ssw & RW) ? "write" : "read", addr,
 574                                fp->ptregs.pc);
 575                         die_if_kernel("Oops",&fp->ptregs,mmusr);
 576                         force_sig(SIGSEGV, current);
 577                         return;
 578                 } else {
 579 #if 0
 580                         static volatile long tlong;
 581 #endif
 582
 583                         pr_err("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
 584                                !(ssw & RW) ? "write" : "read", addr,
 585                                fp->ptregs.pc, ssw);
 586                         asm volatile ("ptestr #1,%1@,#0\n\t"
 587                                       "pmove %%psr,%0"
 588                                       : "=m" (temp)
 589                                       : "a" (addr));
 590                         mmusr = temp;
 591
 592                         pr_err("level 0 mmusr is %#x\n", mmusr);
 593 #if 0
 594                         asm volatile ("pmove %%tt0,%0"
 595                                       : "=m" (tlong));
 596                         pr_debug("tt0 is %#lx, ", tlong);
 597                         asm volatile ("pmove %%tt1,%0"
 598                                       : "=m" (tlong));
 599                         pr_debug("tt1 is %#lx\n", tlong);
 600 #endif
 601                         pr_debug("Unknown SIGSEGV - 1\n");
 602                         die_if_kernel("Oops",&fp->ptregs,mmusr);
 603                         force_sig(SIGSEGV, current);
 604                         return;
 605                 }
 606
 607                 /* setup an ATC entry for the access about to be retried */
 608                 if (!(ssw & RW) || (ssw & RM))
 609                         asm volatile ("ploadw %1,%0@" : /* no outputs */
 610                                       : "a" (addr), "d" (ssw));
 611                 else
 612                         asm volatile ("ploadr %1,%0@" : /* no outputs */
 613                                       : "a" (addr), "d" (ssw));
 614         }
 615
 616         /* Now handle the instruction fault. */
 617
 618         if (!(ssw & (FC|FB)))
 619                 return;
 620
 621         if (fp->ptregs.sr & PS_S) {
 622                 pr_err("Instruction fault at %#010lx\n", fp->ptregs.pc);
 623         buserr:
 624                 pr_err("BAD KERNEL BUSERR\n");
 625                 die_if_kernel("Oops",&fp->ptregs,0);
 626                 force_sig(SIGKILL, current);
 627                 return;
 628         }
 629
 630         /* get the fault address */
 631         if (fp->ptregs.format == 10)
 632                 addr = fp->ptregs.pc + 4;
 633         else
 634                 addr = fp->un.fmtb.baddr;
 635         if (ssw & FC)
 636                 addr -= 2;
 637
 638         if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
 639                 /* Insn fault on same page as data fault.  But we
 640                    should still create the ATC entry.  */
 641                 goto create_atc_entry;
 642
 643 #ifdef DEBUG
 644         asm volatile ("ptestr #1,%2@,#7,%0\n\t"
 645                       "pmove %%psr,%1"
 646                       : "=a&" (desc), "=m" (temp)
 647                       : "a" (addr));
 648         pr_debug("mmusr is %#x for addr %#lx in task %p\n",
 649                 temp, addr, current);
 650         pr_debug("descriptor address is 0x%p, contents %#lx\n",
 651                 __va(desc), *(unsigned long *)__va(desc));
 652 #else
 653         asm volatile ("ptestr #1,%1@,#7\n\t"
 654                       "pmove %%psr,%0"
 655                       : "=m" (temp) : "a" (addr));
 656 #endif
 657         mmusr = temp;
 658         if (mmusr & MMU_I)
 659                 do_page_fault (&fp->ptregs, addr, 0);
 660         else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
 661                 pr_err("invalid insn access at %#lx from pc %#lx\n",
 662                         addr, fp->ptregs.pc);
 663                 pr_debug("Unknown SIGSEGV - 2\n");
 664                 die_if_kernel("Oops",&fp->ptregs,mmusr);
 665                 force_sig(SIGSEGV, current);
 666                 return;
 667         }
 668
 669 create_atc_entry:
 670         /* setup an ATC entry for the access about to be retried */
 671         asm volatile ("ploadr #2,%0@" : /* no outputs */
 672                       : "a" (addr));
 673 }
 674 #endif /* CPU_M68020_OR_M68030 */
 675 #endif /* !CONFIG_SUN3 */
 676
 677 #if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
 678 #include <asm/mcfmmu.h>
 679
 680 /*
 681  *      The following table converts the FS encoding of a ColdFire
 682  *      exception stack frame into the error_code value needed by
 683  *      do_fault.
 684 */
 685 static const unsigned char fs_err_code[] = {
 686         0,  /* 0000 */
 687         0,  /* 0001 */
 688         0,  /* 0010 */
 689         0,  /* 0011 */
 690         1,  /* 0100 */
 691         0,  /* 0101 */
 692         0,  /* 0110 */
 693         0,  /* 0111 */
 694         2,  /* 1000 */
 695         3,  /* 1001 */
 696         2,  /* 1010 */
 697         0,  /* 1011 */
 698         1,  /* 1100 */
 699         1,  /* 1101 */
 700         0,  /* 1110 */
 701         0   /* 1111 */
 702 };
 703
 704 static inline void access_errorcf(unsigned int fs, struct frame *fp)
 705 {
 706         unsigned long mmusr, addr;
 707         unsigned int err_code;
 708         int need_page_fault;
 709
 710         mmusr = mmu_read(MMUSR);
 711         addr = mmu_read(MMUAR);
 712
 713         /*
 714          * error_code:
 715          *      bit 0 == 0 means no page found, 1 means protection fault
 716          *      bit 1 == 0 means read, 1 means write
 717          */
 718         switch (fs) {
 719         case  5:  /* 0101 TLB opword X miss */
 720                 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 0);
 721                 addr = fp->ptregs.pc;
 722                 break;
 723         case  6:  /* 0110 TLB extension word X miss */
 724                 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 1);
 725                 addr = fp->ptregs.pc + sizeof(long);
 726                 break;
 727         case 10:  /* 1010 TLB W miss */
 728                 need_page_fault = cf_tlb_miss(&fp->ptregs, 1, 1, 0);
 729                 break;
 730         case 14: /* 1110 TLB R miss */
 731                 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 1, 0);
 732                 break;
 733         default:
 734                 /* 0000 Normal  */
 735                 /* 0001 Reserved */
 736                 /* 0010 Interrupt during debug service routine */
 737                 /* 0011 Reserved */
 738                 /* 0100 X Protection */
 739                 /* 0111 IFP in emulator mode */
 740                 /* 1000 W Protection*/
 741                 /* 1001 Write error*/
 742                 /* 1011 Reserved*/
 743                 /* 1100 R Protection*/
 744                 /* 1101 R Protection*/
 745                 /* 1111 OEP in emulator mode*/
 746                 need_page_fault = 1;
 747                 break;
 748         }
 749
 750         if (need_page_fault) {
 751                 err_code = fs_err_code[fs];
 752                 if ((fs == 13) && (mmusr & MMUSR_WF)) /* rd-mod-wr access */
 753                         err_code |= 2; /* bit1 - write, bit0 - protection */
 754                 do_page_fault(&fp->ptregs, addr, err_code);
 755         }
 756 }
 757 #endif /* CONFIG_COLDFIRE CONFIG_MMU */
 758
 759 asmlinkage void buserr_c(struct frame *fp)
 760 {
 761         /* Only set esp0 if coming from user mode */
 762         if (user_mode(&fp->ptregs))
 763                 current->thread.esp0 = (unsigned long) fp;
 764
 765         pr_debug("*** Bus Error *** Format is %x\n", fp->ptregs.format);
 766
 767 #if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
 768         if (CPU_IS_COLDFIRE) {
 769                 unsigned int fs;
 770                 fs = (fp->ptregs.vector & 0x3) |
 771                         ((fp->ptregs.vector & 0xc00) >> 8);
 772                 switch (fs) {
 773                 case 0x5:
 774                 case 0x6:
 775                 case 0x7:
 776                 case 0x9:
 777                 case 0xa:
 778                 case 0xd:
 779                 case 0xe:
 780                 case 0xf:
 781                         access_errorcf(fs, fp);
 782                         return;
 783                 default:
 784                         break;
 785                 }
 786         }
 787 #endif /* CONFIG_COLDFIRE && CONFIG_MMU */
 788
 789         switch (fp->ptregs.format) {
 790 #if defined (CONFIG_M68060)
 791         case 4:                         /* 68060 access error */
 792           access_error060 (fp);
 793           break;
 794 #endif
 795 #if defined (CONFIG_M68040)
 796         case 0x7:                       /* 68040 access error */
 797           access_error040 (fp);
 798           break;
 799 #endif
 800 #if defined (CPU_M68020_OR_M68030)
 801         case 0xa:
 802         case 0xb:
 803           bus_error030 (fp);
 804           break;
 805 #endif
 806         default:
 807           die_if_kernel("bad frame format",&fp->ptregs,0);
 808           pr_debug("Unknown SIGSEGV - 4\n");
 809           force_sig(SIGSEGV, current);
 810         }
 811 }
 812
 813
 814 static int kstack_depth_to_print = 48;
 815
 816 void show_trace(unsigned long *stack)
 817 {
 818         unsigned long *endstack;
 819         unsigned long addr;
 820         int i;
 821
 822         pr_info("Call Trace:");
 823         addr = (unsigned long)stack + THREAD_SIZE - 1;
 824         endstack = (unsigned long *)(addr & -THREAD_SIZE);
 825         i = 0;
 826         while (stack + 1 <= endstack) {
 827                 addr = *stack++;
 828                 /*
 829                  * If the address is either in the text segment of the
 830                  * kernel, or in the region which contains vmalloc'ed
 831                  * memory, it *may* be the address of a calling
 832                  * routine; if so, print it so that someone tracing
 833                  * down the cause of the crash will be able to figure
 834                  * out the call path that was taken.
 835                  */
 836                 if (__kernel_text_address(addr)) {
 837 #ifndef CONFIG_KALLSYMS
 838                         if (i % 5 == 0)
 839                                 pr_cont("\n       ");
 840 #endif
 841                         pr_cont(" [<%08lx>] %pS\n", addr, (void *)addr);
 842                         i++;
 843                 }
 844         }
 845         pr_cont("\n");
 846 }
 847
 848 void show_registers(struct pt_regs *regs)
 849 {
 850         struct frame *fp = (struct frame *)regs;
 851         mm_segment_t old_fs = get_fs();
 852         u16 c, *cp;
 853         unsigned long addr;
 854         int i;
 855
 856         print_modules();
 857         pr_info("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc);
 858         pr_info("SR: %04x  SP: %p  a2: %08lx\n", regs->sr, regs, regs->a2);
 859         pr_info("d0: %08lx    d1: %08lx    d2: %08lx    d3: %08lx\n",
 860                regs->d0, regs->d1, regs->d2, regs->d3);
 861         pr_info("d4: %08lx    d5: %08lx    a0: %08lx    a1: %08lx\n",
 862                regs->d4, regs->d5, regs->a0, regs->a1);
 863
 864         pr_info("Process %s (pid: %d, task=%p)\n",
 865                 current->comm, task_pid_nr(current), current);
 866         addr = (unsigned long)&fp->un;
 867         pr_info("Frame format=%X ", regs->format);
 868         switch (regs->format) {
 869         case 0x2:
 870                 pr_cont("instr addr=%08lx\n", fp->un.fmt2.iaddr);
 871                 addr += sizeof(fp->un.fmt2);
 872                 break;
 873         case 0x3:
 874                 pr_cont("eff addr=%08lx\n", fp->un.fmt3.effaddr);
 875                 addr += sizeof(fp->un.fmt3);
 876                 break;
 877         case 0x4:
 878                 if (CPU_IS_060)
 879                         pr_cont("fault addr=%08lx fslw=%08lx\n",
 880                                 fp->un.fmt4.effaddr, fp->un.fmt4.pc);
 881                 else
 882                         pr_cont("eff addr=%08lx pc=%08lx\n",
 883                                 fp->un.fmt4.effaddr, fp->un.fmt4.pc);
 884                 addr += sizeof(fp->un.fmt4);
 885                 break;
 886         case 0x7:
 887                 pr_cont("eff addr=%08lx ssw=%04x faddr=%08lx\n",
 888                         fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
 889                 pr_info("wb 1 stat/addr/data: %04x %08lx %08lx\n",
 890                         fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
 891                 pr_info("wb 2 stat/addr/data: %04x %08lx %08lx\n",
 892                         fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
 893                 pr_info("wb 3 stat/addr/data: %04x %08lx %08lx\n",
 894                         fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
 895                 pr_info("push data: %08lx %08lx %08lx %08lx\n",
 896                         fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
 897                         fp->un.fmt7.pd3);
 898                 addr += sizeof(fp->un.fmt7);
 899                 break;
 900         case 0x9:
 901                 pr_cont("instr addr=%08lx\n", fp->un.fmt9.iaddr);
 902                 addr += sizeof(fp->un.fmt9);
 903                 break;
 904         case 0xa:
 905                 pr_cont("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
 906                         fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
 907                         fp->un.fmta.daddr, fp->un.fmta.dobuf);
 908                 addr += sizeof(fp->un.fmta);
 909                 break;
 910         case 0xb:
 911                 pr_cont("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
 912                         fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
 913                         fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
 914                 pr_info("baddr=%08lx dibuf=%08lx ver=%x\n",
 915                         fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
 916                 addr += sizeof(fp->un.fmtb);
 917                 break;
 918         default:
 919                 pr_cont("\n");
 920         }
 921         show_stack(NULL, (unsigned long *)addr);
 922
 923         pr_info("Code:");
 924         set_fs(KERNEL_DS);
 925         cp = (u16 *)regs->pc;
 926         for (i = -8; i < 16; i++) {
 927                 if (get_user(c, cp + i) && i >= 0) {
 928                         pr_cont(" Bad PC value.");
 929                         break;
 930                 }
 931                 if (i)
 932                         pr_cont(" %04x", c);
 933                 else
 934                         pr_cont(" <%04x>", c);
 935         }
 936         set_fs(old_fs);
 937         pr_cont("\n");
 938 }
 939
 940 void show_stack(struct task_struct *task, unsigned long *stack)
 941 {
 942         unsigned long *p;
 943         unsigned long *endstack;
 944         int i;
 945
 946         if (!stack) {
 947                 if (task)
 948                         stack = (unsigned long *)task->thread.esp0;
 949                 else
 950                         stack = (unsigned long *)&stack;
 951         }
 952         endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
 953
 954         pr_info("Stack from %08lx:", (unsigned long)stack);
 955         p = stack;
 956         for (i = 0; i < kstack_depth_to_print; i++) {
 957                 if (p + 1 > endstack)
 958                         break;
 959                 if (i % 8 == 0)
 960                         pr_cont("\n       ");
 961                 pr_cont(" %08lx", *p++);
 962         }
 963         pr_cont("\n");
 964         show_trace(stack);
 965 }
 966
 967 /*
 968  * The vector number returned in the frame pointer may also contain
 969  * the "fs" (Fault Status) bits on ColdFire. These are in the bottom
 970  * 2 bits, and upper 2 bits. So we need to mask out the real vector
 971  * number before using it in comparisons. You don't need to do this on
 972  * real 68k parts, but it won't hurt either.
 973  */
 974
 975 void bad_super_trap (struct frame *fp)
 976 {
 977         int vector = (fp->ptregs.vector >> 2) & 0xff;
 978
 979         console_verbose();
 980         if (vector < ARRAY_SIZE(vec_names))
 981                 pr_err("*** %s ***   FORMAT=%X\n",
 982                         vec_names[vector],
 983                         fp->ptregs.format);
 984         else
 985                 pr_err("*** Exception %d ***   FORMAT=%X\n",
 986                         vector, fp->ptregs.format);
 987         if (vector == VEC_ADDRERR && CPU_IS_020_OR_030) {
 988                 unsigned short ssw = fp->un.fmtb.ssw;
 989
 990                 pr_err("SSW=%#06x  ", ssw);
 991
 992                 if (ssw & RC)
 993                         pr_err("Pipe stage C instruction fault at %#010lx\n",
 994                                 (fp->ptregs.format) == 0xA ?
 995                                 fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
 996                 if (ssw & RB)
 997                         pr_err("Pipe stage B instruction fault at %#010lx\n",
 998                                 (fp->ptregs.format) == 0xA ?
 999                                 fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
1000                 if (ssw & DF)
1001                         pr_err("Data %s fault at %#010lx in %s (pc=%#lx)\n",
1002                                 ssw & RW ? "read" : "write",
1003                                 fp->un.fmtb.daddr, space_names[ssw & DFC],
1004                                 fp->ptregs.pc);
1005         }
1006         pr_err("Current process id is %d\n", task_pid_nr(current));
1007         die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
1008 }
1009
1010 asmlinkage void trap_c(struct frame *fp)
1011 {
1012         int sig, si_code;
1013         void __user *addr;
1014         int vector = (fp->ptregs.vector >> 2) & 0xff;
1015
1016         if (fp->ptregs.sr & PS_S) {
1017                 if (vector == VEC_TRACE) {
1018                         /* traced a trapping instruction on a 68020/30,
1019                          * real exception will be executed afterwards.
1020                          */
1021                         return;
1022                 }
1023 #ifdef CONFIG_MMU
1024                 if (fixup_exception(&fp->ptregs))
1025                         return;
1026 #endif
1027                 bad_super_trap(fp);
1028                 return;
1029         }
1030
1031         /* send the appropriate signal to the user program */
1032         switch (vector) {
1033             case VEC_ADDRERR:
1034                 si_code = BUS_ADRALN;
1035                 sig = SIGBUS;
1036                 break;
1037             case VEC_ILLEGAL:
1038             case VEC_LINE10:
1039             case VEC_LINE11:
1040                 si_code = ILL_ILLOPC;
1041                 sig = SIGILL;
1042                 break;
1043             case VEC_PRIV:
1044                 si_code = ILL_PRVOPC;
1045                 sig = SIGILL;
1046                 break;
1047             case VEC_COPROC:
1048                 si_code = ILL_COPROC;
1049                 sig = SIGILL;
1050                 break;
1051             case VEC_TRAP1:
1052             case VEC_TRAP2:
1053             case VEC_TRAP3:
1054             case VEC_TRAP4:
1055             case VEC_TRAP5:
1056             case VEC_TRAP6:
1057             case VEC_TRAP7:
1058             case VEC_TRAP8:
1059             case VEC_TRAP9:
1060             case VEC_TRAP10:
1061             case VEC_TRAP11:
1062             case VEC_TRAP12:
1063             case VEC_TRAP13:
1064             case VEC_TRAP14:
1065                 si_code = ILL_ILLTRP;
1066                 sig = SIGILL;
1067                 break;
1068             case VEC_FPBRUC:
1069             case VEC_FPOE:
1070             case VEC_FPNAN:
1071                 si_code = FPE_FLTINV;
1072                 sig = SIGFPE;
1073                 break;
1074             case VEC_FPIR:
1075                 si_code = FPE_FLTRES;
1076                 sig = SIGFPE;
1077                 break;
1078             case VEC_FPDIVZ:
1079                 si_code = FPE_FLTDIV;
1080                 sig = SIGFPE;
1081                 break;
1082             case VEC_FPUNDER:
1083                 si_code = FPE_FLTUND;
1084                 sig = SIGFPE;
1085                 break;
1086             case VEC_FPOVER:
1087                 si_code = FPE_FLTOVF;
1088                 sig = SIGFPE;
1089                 break;
1090             case VEC_ZERODIV:
1091                 si_code = FPE_INTDIV;
1092                 sig = SIGFPE;
1093                 break;
1094             case VEC_CHK:
1095             case VEC_TRAP:
1096                 si_code = FPE_INTOVF;
1097                 sig = SIGFPE;
1098                 break;
1099             case VEC_TRACE:             /* ptrace single step */
1100                 si_code = TRAP_TRACE;
1101                 sig = SIGTRAP;
1102                 break;
1103             case VEC_TRAP15:            /* breakpoint */
1104                 si_code = TRAP_BRKPT;
1105                 sig = SIGTRAP;
1106                 break;
1107             default:
1108                 si_code = ILL_ILLOPC;
1109                 sig = SIGILL;
1110                 break;
1111         }
1112         switch (fp->ptregs.format) {
1113             default:
1114                 addr = (void __user *) fp->ptregs.pc;
1115                 break;
1116             case 2:
1117                 addr = (void __user *) fp->un.fmt2.iaddr;
1118                 break;
1119             case 7:
1120                 addr = (void __user *) fp->un.fmt7.effaddr;
1121                 break;
1122             case 9:
1123                 addr = (void __user *) fp->un.fmt9.iaddr;
1124                 break;
1125             case 10:
1126                 addr = (void __user *) fp->un.fmta.daddr;
1127                 break;
1128             case 11:
1129                 addr = (void __user*) fp->un.fmtb.daddr;
1130                 break;
1131         }
1132         force_sig_fault(sig, si_code, addr, current);
1133 }
1134
1135 void die_if_kernel (char *str, struct pt_regs *fp, int nr)
1136 {
1137         if (!(fp->sr & PS_S))
1138                 return;
1139
1140         console_verbose();
1141         pr_crit("%s: %08x\n", str, nr);
1142         show_registers(fp);
1143         add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
1144         make_task_dead(SIGSEGV);
1145 }
1146
1147 asmlinkage void set_esp0(unsigned long ssp)
1148 {
1149         current->thread.esp0 = ssp;
1150 }
1151
1152 /*
1153  * This function is called if an error occur while accessing
1154  * user-space from the fpsp040 code.
1155  */
1156 asmlinkage void fpsp040_die(void)
1157 {
1158         do_exit(SIGSEGV);
1159 }
1160
1161 #ifdef CONFIG_M68KFPU_EMU
1162 asmlinkage void fpemu_signal(int signal, int code, void *addr)
1163 {
1164         force_sig_fault(signal, code, addr, current);
1165 }
1166 #endif