1 // SPDX-License-Identifier: GPL-2.0
3 * linux/arch/m68knommu/kernel/setup.c
5 * Copyright (C) 1999-2007 Greg Ungerer (gerg@snapgear.com)
6 * Copyright (C) 1998,1999 D. Jeff Dionne <jeff@uClinux.org>
7 * Copyleft ()) 2000 James D. Schettine {james@telos-systems.com}
8 * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>
9 * Copyright (C) 1995 Hamish Macdonald
10 * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
11 * Copyright (C) 2001 Lineo, Inc. <www.lineo.com>
13 * 68VZ328 Fixes/support Evan Stawnyczy <e@lineo.ca>
17 * This file handles the architecture-dependent parts of system setup
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/delay.h>
23 #include <linux/interrupt.h>
25 #include <linux/module.h>
27 #include <linux/console.h>
28 #include <linux/errno.h>
29 #include <linux/string.h>
30 #include <linux/memblock.h>
31 #include <linux/seq_file.h>
32 #include <linux/init.h>
33 #include <linux/initrd.h>
34 #include <linux/root_dev.h>
35 #include <linux/rtc.h>
37 #include <asm/setup.h>
38 #include <asm/bootinfo.h>
40 #include <asm/machdep.h>
41 #include <asm/sections.h>
43 unsigned long memory_start;
44 unsigned long memory_end;
46 EXPORT_SYMBOL(memory_start);
47 EXPORT_SYMBOL(memory_end);
49 char __initdata command_line[COMMAND_LINE_SIZE];
51 /* machine dependent timer functions */
52 void (*mach_sched_init)(void) __initdata = NULL;
54 /* machine dependent reboot functions */
55 void (*mach_reset)(void);
56 void (*mach_halt)(void);
59 #if defined(CONFIG_M68328)
60 #define CPU_NAME "MC68328"
61 #elif defined(CONFIG_M68EZ328)
62 #define CPU_NAME "MC68EZ328"
63 #elif defined(CONFIG_M68VZ328)
64 #define CPU_NAME "MC68VZ328"
66 #define CPU_NAME "MC68000"
68 #endif /* CONFIG_M68000 */
70 #define CPU_NAME "UNKNOWN"
74 * Different cores have different instruction execution timings.
75 * The old/traditional 68000 cores are basically all the same, at 16.
76 * The ColdFire cores vary a little, their values are defined in their
77 * headers. We default to the standard 68000 value here.
79 #ifndef CPU_INSTR_PER_JIFFY
80 #define CPU_INSTR_PER_JIFFY 16
83 void __init setup_arch(char **cmdline_p)
85 memory_start = PAGE_ALIGN(_ramstart);
88 setup_initial_init_mm(_stext, _etext, _edata, NULL);
90 config_BSP(&command_line[0], sizeof(command_line));
92 #if defined(CONFIG_BOOTPARAM)
93 strncpy(&command_line[0], CONFIG_BOOTPARAM_STRING, sizeof(command_line));
94 command_line[sizeof(command_line) - 1] = 0;
95 #endif /* CONFIG_BOOTPARAM */
97 process_uboot_commandline(&command_line[0], sizeof(command_line));
99 pr_info("uClinux with CPU " CPU_NAME "\n");
102 pr_info("uCdimm by Lineo, Inc. <www.lineo.com>\n");
105 pr_info("68328 support D. Jeff Dionne <jeff@uclinux.org>\n");
106 pr_info("68328 support Kenneth Albanowski <kjahds@kjshds.com>\n");
108 #ifdef CONFIG_M68EZ328
109 pr_info("68EZ328 DragonBallEZ support (C) 1999 Rt-Control, Inc\n");
111 #ifdef CONFIG_M68VZ328
112 pr_info("M68VZ328 support by Evan Stawnyczy <e@lineo.ca>\n");
113 pr_info("68VZ328 DragonBallVZ support (c) 2001 Lineo, Inc.\n");
115 #ifdef CONFIG_COLDFIRE
116 pr_info("COLDFIRE port done by Greg Ungerer, gerg@snapgear.com\n");
118 pr_info("Modified for M5307 by Dave Miller, dmiller@intellistor.com\n");
121 pr_info("Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n");
124 pr_info("Flat model support (C) 1998,1999 Kenneth Albanowski, D. Jeff Dionne\n");
126 #if defined( CONFIG_PILOT ) && defined( CONFIG_M68328 )
127 pr_info("68328/Pilot support Bernhard Kuhn <kuhn@lpr.e-technik.tu-muenchen.de>\n");
128 pr_info("TRG SuperPilot FLASH card support <info@trgnet.com>\n");
130 #if defined( CONFIG_PILOT ) && defined( CONFIG_M68EZ328 )
131 pr_info("PalmV support by Lineo Inc. <jeff@uclinux.com>\n");
133 #ifdef CONFIG_DRAGEN2
134 pr_info("DragonEngine II board support by Georges Menie\n");
136 #ifdef CONFIG_M5235EVB
137 pr_info("Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)\n");
140 pr_debug("KERNEL -> TEXT=0x%p-0x%p DATA=0x%p-0x%p BSS=0x%p-0x%p\n",
141 _stext, _etext, _sdata, _edata, __bss_start, __bss_stop);
142 pr_debug("MEMORY -> ROMFS=0x%p-0x%06lx MEM=0x%06lx-0x%06lx\n ",
143 __bss_stop, memory_start, memory_start, memory_end);
145 memblock_add(_rambase, memory_end - _rambase);
146 memblock_reserve(_rambase, memory_start - _rambase);
148 /* Keep a copy of command line */
149 *cmdline_p = &command_line[0];
150 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
151 boot_command_line[COMMAND_LINE_SIZE-1] = 0;
154 * Give all the memory to the bootmap allocator, tell it to put the
155 * boot mem_map at the start of memory.
157 min_low_pfn = PFN_DOWN(memory_start);
158 max_pfn = max_low_pfn = PFN_DOWN(memory_end);
160 #if defined(CONFIG_UBOOT) && defined(CONFIG_BLK_DEV_INITRD)
161 if ((initrd_start > 0) && (initrd_start < initrd_end) &&
162 (initrd_end < memory_end))
163 memblock_reserve(initrd_start, initrd_end - initrd_start);
164 #endif /* if defined(CONFIG_BLK_DEV_INITRD) */
167 * Get kmalloc into gear.
173 * Get CPU information for use by the procfs.
175 static int show_cpuinfo(struct seq_file *m, void *v)
177 char *cpu, *mmu, *fpu;
183 clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY;
185 seq_printf(m, "CPU:\t\t%s\n"
188 "Clocking:\t%lu.%1luMHz\n"
189 "BogoMips:\t%lu.%02lu\n"
190 "Calibration:\t%lu loops\n",
193 (clockfreq / 100000) % 10,
194 (loops_per_jiffy * HZ) / 500000,
195 ((loops_per_jiffy * HZ) / 5000) % 100,
196 (loops_per_jiffy * HZ));
201 static void *c_start(struct seq_file *m, loff_t *pos)
203 return *pos < NR_CPUS ? ((void *) 0x12345678) : NULL;
206 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
209 return c_start(m, pos);
212 static void c_stop(struct seq_file *m, void *v)
216 const struct seq_operations cpuinfo_op = {
220 .show = show_cpuinfo,