2 * linux/arch/m32r/platforms/mappi2/setup.c
4 * Setup routines for Renesas MAPPI-II(M3A-ZA36) Board
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa
10 #include <linux/irq.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
18 #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
20 icu_data_t icu_data[NR_IRQS];
22 static void disable_mappi2_irq(unsigned int irq)
24 unsigned long port, data;
26 if ((irq == 0) ||(irq >= NR_IRQS)) {
27 printk("bad irq 0x%08x\n", irq);
31 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
35 static void enable_mappi2_irq(unsigned int irq)
37 unsigned long port, data;
39 if ((irq == 0) ||(irq >= NR_IRQS)) {
40 printk("bad irq 0x%08x\n", irq);
44 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
48 static void mask_mappi2(struct irq_data *data)
50 disable_mappi2_irq(data->irq);
53 static void unmask_mappi2(struct irq_data *data)
55 enable_mappi2_irq(data->irq);
58 static void shutdown_mappi2(struct irq_data *data)
62 port = irq2port(data->irq);
63 outl(M32R_ICUCR_ILEVEL7, port);
66 static struct irq_chip mappi2_irq_type =
69 .irq_shutdown = shutdown_mappi2,
70 .irq_mask = mask_mappi2,
71 .irq_unmask = unmask_mappi2,
74 void __init init_IRQ(void)
76 #if defined(CONFIG_SMC91X)
77 /* INT0 : LAN controller (SMC91111) */
78 irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi2_irq_type,
80 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
81 disable_mappi2_irq(M32R_IRQ_INT0);
82 #endif /* CONFIG_SMC91X */
84 /* MFT2 : system timer */
85 irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi2_irq_type,
87 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
88 disable_mappi2_irq(M32R_IRQ_MFT2);
90 #ifdef CONFIG_SERIAL_M32R_SIO
91 /* SIO0_R : uart receive data */
92 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi2_irq_type,
94 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
95 disable_mappi2_irq(M32R_IRQ_SIO0_R);
97 /* SIO0_S : uart send data */
98 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi2_irq_type,
100 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
101 disable_mappi2_irq(M32R_IRQ_SIO0_S);
102 /* SIO1_R : uart receive data */
103 irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi2_irq_type,
105 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
106 disable_mappi2_irq(M32R_IRQ_SIO1_R);
108 /* SIO1_S : uart send data */
109 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type,
111 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
112 disable_mappi2_irq(M32R_IRQ_SIO1_S);
113 #endif /* CONFIG_M32R_USE_DBG_CONSOLE */
115 #if defined(CONFIG_USB)
116 /* INT1 : USB Host controller interrupt */
117 irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi2_irq_type,
119 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
120 disable_mappi2_irq(M32R_IRQ_INT1);
121 #endif /* CONFIG_USB */
123 /* ICUCR40: CFC IREQ */
124 irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &mappi2_irq_type,
126 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
127 disable_mappi2_irq(PLD_IRQ_CFIREQ);
129 #if defined(CONFIG_M32R_CFC)
130 /* ICUCR41: CFC Insert */
131 irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi2_irq_type,
133 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
134 disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
136 /* ICUCR42: CFC Eject */
137 irq_set_chip_and_handler(PLD_IRQ_CFC_EJECT, &mappi2_irq_type,
139 icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
140 disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
141 #endif /* CONFIG_MAPPI2_CFC */
144 #define LAN_IOSTART 0x300
145 #define LAN_IOEND 0x320
146 static struct resource smc91x_resources[] = {
148 .start = (LAN_IOSTART),
150 .flags = IORESOURCE_MEM,
153 .start = M32R_IRQ_INT0,
154 .end = M32R_IRQ_INT0,
155 .flags = IORESOURCE_IRQ,
159 static struct platform_device smc91x_device = {
162 .num_resources = ARRAY_SIZE(smc91x_resources),
163 .resource = smc91x_resources,
166 static int __init platform_init(void)
168 platform_device_register(&smc91x_device);
171 arch_initcall(platform_init);