1 // SPDX-License-Identifier: GPL-2.0
3 * linux/arch/m32r/platforms/mappi/setup.c
5 * Setup routines for Renesas MAPPI Board
7 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
11 #include <linux/irq.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
19 #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
21 icu_data_t icu_data[NR_IRQS];
23 static void disable_mappi_irq(unsigned int irq)
25 unsigned long port, data;
28 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
32 static void enable_mappi_irq(unsigned int irq)
34 unsigned long port, data;
37 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
41 static void mask_mappi(struct irq_data *data)
43 disable_mappi_irq(data->irq);
46 static void unmask_mappi(struct irq_data *data)
48 enable_mappi_irq(data->irq);
51 static void shutdown_mappi(struct irq_data *data)
55 port = irq2port(data->irq);
56 outl(M32R_ICUCR_ILEVEL7, port);
59 static struct irq_chip mappi_irq_type =
62 .irq_shutdown = shutdown_mappi,
63 .irq_mask = mask_mappi,
64 .irq_unmask = unmask_mappi,
67 void __init init_IRQ(void)
77 /* INT0 : LAN controller (RTL8019AS) */
78 irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type,
80 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
81 disable_mappi_irq(M32R_IRQ_INT0);
82 #endif /* CONFIG_M32R_NE2000 */
84 /* MFT2 : system timer */
85 irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
87 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
88 disable_mappi_irq(M32R_IRQ_MFT2);
90 #ifdef CONFIG_SERIAL_M32R_SIO
91 /* SIO0_R : uart receive data */
92 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
94 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
95 disable_mappi_irq(M32R_IRQ_SIO0_R);
97 /* SIO0_S : uart send data */
98 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
100 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
101 disable_mappi_irq(M32R_IRQ_SIO0_S);
103 /* SIO1_R : uart receive data */
104 irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
106 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
107 disable_mappi_irq(M32R_IRQ_SIO1_R);
109 /* SIO1_S : uart send data */
110 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
112 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
113 disable_mappi_irq(M32R_IRQ_SIO1_S);
114 #endif /* CONFIG_SERIAL_M32R_SIO */
116 #if defined(CONFIG_M32R_PCC)
117 /* INT1 : pccard0 interrupt */
118 irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type,
120 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
121 disable_mappi_irq(M32R_IRQ_INT1);
123 /* INT2 : pccard1 interrupt */
124 irq_set_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type,
126 icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
127 disable_mappi_irq(M32R_IRQ_INT2);
128 #endif /* CONFIG_M32RPCC */
131 #if defined(CONFIG_FB_S1D13XXX)
133 #include <video/s1d13xxxfb.h>
134 #include <asm/s1d13806.h>
136 static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
137 .initregs = s1d13xxxfb_initregs,
138 .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
139 .platform_init_video = NULL,
141 .platform_suspend_video = NULL,
142 .platform_resume_video = NULL,
146 static struct resource s1d13xxxfb_resources[] = {
148 .start = 0x10200000UL,
150 .flags = IORESOURCE_MEM,
153 .start = 0x10000000UL,
155 .flags = IORESOURCE_MEM,
159 static struct platform_device s1d13xxxfb_device = {
160 .name = S1D_DEVICENAME,
163 .platform_data = &s1d13xxxfb_data,
165 .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
166 .resource = s1d13xxxfb_resources,
169 static int __init platform_init(void)
171 platform_device_register(&s1d13xxxfb_device);
174 arch_initcall(platform_init);