1 // SPDX-License-Identifier: GPL-2.0
3 * Kernel support for the ptrace() and syscall tracing interfaces.
5 * Copyright (C) 1999-2005 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 * Copyright (C) 2006 Intel Co
8 * 2006-08-12 - IA64 Native Utrace implementation support added by
9 * Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
11 * Derived from the x86 and Alpha versions.
13 #include <linux/kernel.h>
14 #include <linux/sched.h>
15 #include <linux/sched/task.h>
16 #include <linux/sched/task_stack.h>
18 #include <linux/errno.h>
19 #include <linux/ptrace.h>
20 #include <linux/user.h>
21 #include <linux/security.h>
22 #include <linux/audit.h>
23 #include <linux/signal.h>
24 #include <linux/regset.h>
25 #include <linux/elf.h>
26 #include <linux/tracehook.h>
28 #include <asm/processor.h>
29 #include <asm/ptrace_offsets.h>
31 #include <linux/uaccess.h>
32 #include <asm/unwind.h>
37 * Bits in the PSR that we allow ptrace() to change:
38 * be, up, ac, mfl, mfh (the user mask; five bits total)
39 * db (debug breakpoint fault; one bit)
40 * id (instruction debug fault disable; one bit)
41 * dd (data debug fault disable; one bit)
42 * ri (restart instruction; two bits)
43 * is (instruction set; one bit)
45 #define IPSR_MASK (IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS \
46 | IA64_PSR_ID | IA64_PSR_DD | IA64_PSR_RI)
48 #define MASK(nbits) ((1UL << (nbits)) - 1) /* mask with NBITS bits set */
49 #define PFM_MASK MASK(38)
51 #define PTRACE_DEBUG 0
54 # define dprintk(format...) printk(format)
57 # define dprintk(format...)
60 /* Return TRUE if PT was created due to kernel-entry via a system-call. */
63 in_syscall (struct pt_regs *pt)
65 return (long) pt->cr_ifs >= 0;
69 * Collect the NaT bits for r1-r31 from scratch_unat and return a NaT
70 * bitset where bit i is set iff the NaT bit of register i is set.
73 ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat)
75 # define GET_BITS(first, last, unat) \
77 unsigned long bit = ia64_unat_pos(&pt->r##first); \
78 unsigned long nbits = (last - first + 1); \
79 unsigned long mask = MASK(nbits) << first; \
82 dist = 64 + bit - first; \
85 ia64_rotr(unat, dist) & mask; \
90 * Registers that are stored consecutively in struct pt_regs
91 * can be handled in parallel. If the register order in
92 * struct_pt_regs changes, this code MUST be updated.
94 val = GET_BITS( 1, 1, scratch_unat);
95 val |= GET_BITS( 2, 3, scratch_unat);
96 val |= GET_BITS(12, 13, scratch_unat);
97 val |= GET_BITS(14, 14, scratch_unat);
98 val |= GET_BITS(15, 15, scratch_unat);
99 val |= GET_BITS( 8, 11, scratch_unat);
100 val |= GET_BITS(16, 31, scratch_unat);
107 * Set the NaT bits for the scratch registers according to NAT and
108 * return the resulting unat (assuming the scratch registers are
112 ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat)
114 # define PUT_BITS(first, last, nat) \
116 unsigned long bit = ia64_unat_pos(&pt->r##first); \
117 unsigned long nbits = (last - first + 1); \
118 unsigned long mask = MASK(nbits) << first; \
121 dist = 64 + bit - first; \
123 dist = bit - first; \
124 ia64_rotl(nat & mask, dist); \
126 unsigned long scratch_unat;
129 * Registers that are stored consecutively in struct pt_regs
130 * can be handled in parallel. If the register order in
131 * struct_pt_regs changes, this code MUST be updated.
133 scratch_unat = PUT_BITS( 1, 1, nat);
134 scratch_unat |= PUT_BITS( 2, 3, nat);
135 scratch_unat |= PUT_BITS(12, 13, nat);
136 scratch_unat |= PUT_BITS(14, 14, nat);
137 scratch_unat |= PUT_BITS(15, 15, nat);
138 scratch_unat |= PUT_BITS( 8, 11, nat);
139 scratch_unat |= PUT_BITS(16, 31, nat);
146 #define IA64_MLX_TEMPLATE 0x2
147 #define IA64_MOVL_OPCODE 6
150 ia64_increment_ip (struct pt_regs *regs)
152 unsigned long w0, ri = ia64_psr(regs)->ri + 1;
157 } else if (ri == 2) {
158 get_user(w0, (char __user *) regs->cr_iip + 0);
159 if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
161 * rfi'ing to slot 2 of an MLX bundle causes
162 * an illegal operation fault. We don't want
169 ia64_psr(regs)->ri = ri;
173 ia64_decrement_ip (struct pt_regs *regs)
175 unsigned long w0, ri = ia64_psr(regs)->ri - 1;
177 if (ia64_psr(regs)->ri == 0) {
180 get_user(w0, (char __user *) regs->cr_iip + 0);
181 if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
183 * rfi'ing to slot 2 of an MLX bundle causes
184 * an illegal operation fault. We don't want
190 ia64_psr(regs)->ri = ri;
194 * This routine is used to read an rnat bits that are stored on the
195 * kernel backing store. Since, in general, the alignment of the user
196 * and kernel are different, this is not completely trivial. In
197 * essence, we need to construct the user RNAT based on up to two
198 * kernel RNAT values and/or the RNAT value saved in the child's
203 * +--------+ <-- lowest address
210 * | slot01 | > child_regs->ar_rnat
212 * | slot02 | / kernel rbs
213 * +--------+ +--------+
214 * <- child_regs->ar_bspstore | slot61 | <-- krbs
215 * +- - - - + +--------+
217 * +- - - - + +--------+
219 * +- - - - + +--------+
221 * +- - - - + +--------+
226 * | slot01 | > child_stack->ar_rnat
230 * <--- child_stack->ar_bspstore
232 * The way to think of this code is as follows: bit 0 in the user rnat
233 * corresponds to some bit N (0 <= N <= 62) in one of the kernel rnat
234 * value. The kernel rnat value holding this bit is stored in
235 * variable rnat0. rnat1 is loaded with the kernel rnat value that
236 * form the upper bits of the user rnat value.
240 * o when reading the rnat "below" the first rnat slot on the kernel
241 * backing store, rnat0/rnat1 are set to 0 and the low order bits are
242 * merged in from pt->ar_rnat.
244 * o when reading the rnat "above" the last rnat slot on the kernel
245 * backing store, rnat0/rnat1 gets its value from sw->ar_rnat.
248 get_rnat (struct task_struct *task, struct switch_stack *sw,
249 unsigned long *krbs, unsigned long *urnat_addr,
250 unsigned long *urbs_end)
252 unsigned long rnat0 = 0, rnat1 = 0, urnat = 0, *slot0_kaddr;
253 unsigned long umask = 0, mask, m;
254 unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
255 long num_regs, nbits;
258 pt = task_pt_regs(task);
259 kbsp = (unsigned long *) sw->ar_bspstore;
260 ubspstore = (unsigned long *) pt->ar_bspstore;
262 if (urbs_end < urnat_addr)
263 nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_end);
268 * First, figure out which bit number slot 0 in user-land maps
269 * to in the kernel rnat. Do this by figuring out how many
270 * register slots we're beyond the user's backingstore and
271 * then computing the equivalent address in kernel space.
273 num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
274 slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
275 shift = ia64_rse_slot_num(slot0_kaddr);
276 rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
277 rnat0_kaddr = rnat1_kaddr - 64;
279 if (ubspstore + 63 > urnat_addr) {
280 /* some bits need to be merged in from pt->ar_rnat */
281 umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
282 urnat = (pt->ar_rnat & umask);
289 if (rnat0_kaddr >= kbsp)
291 else if (rnat0_kaddr > krbs)
292 rnat0 = *rnat0_kaddr;
293 urnat |= (rnat0 & m) >> shift;
295 m = mask >> (63 - shift);
296 if (rnat1_kaddr >= kbsp)
298 else if (rnat1_kaddr > krbs)
299 rnat1 = *rnat1_kaddr;
300 urnat |= (rnat1 & m) << (63 - shift);
305 * The reverse of get_rnat.
308 put_rnat (struct task_struct *task, struct switch_stack *sw,
309 unsigned long *krbs, unsigned long *urnat_addr, unsigned long urnat,
310 unsigned long *urbs_end)
312 unsigned long rnat0 = 0, rnat1 = 0, *slot0_kaddr, umask = 0, mask, m;
313 unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
314 long num_regs, nbits;
316 unsigned long cfm, *urbs_kargs;
318 pt = task_pt_regs(task);
319 kbsp = (unsigned long *) sw->ar_bspstore;
320 ubspstore = (unsigned long *) pt->ar_bspstore;
322 urbs_kargs = urbs_end;
323 if (in_syscall(pt)) {
325 * If entered via syscall, don't allow user to set rnat bits
329 urbs_kargs = ia64_rse_skip_regs(urbs_end, -(cfm & 0x7f));
332 if (urbs_kargs >= urnat_addr)
335 if ((urnat_addr - 63) >= urbs_kargs)
337 nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_kargs);
342 * First, figure out which bit number slot 0 in user-land maps
343 * to in the kernel rnat. Do this by figuring out how many
344 * register slots we're beyond the user's backingstore and
345 * then computing the equivalent address in kernel space.
347 num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
348 slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
349 shift = ia64_rse_slot_num(slot0_kaddr);
350 rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
351 rnat0_kaddr = rnat1_kaddr - 64;
353 if (ubspstore + 63 > urnat_addr) {
354 /* some bits need to be place in pt->ar_rnat: */
355 umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
356 pt->ar_rnat = (pt->ar_rnat & ~umask) | (urnat & umask);
362 * Note: Section 11.1 of the EAS guarantees that bit 63 of an
363 * rnat slot is ignored. so we don't have to clear it here.
365 rnat0 = (urnat << shift);
367 if (rnat0_kaddr >= kbsp)
368 sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat0 & m);
369 else if (rnat0_kaddr > krbs)
370 *rnat0_kaddr = ((*rnat0_kaddr & ~m) | (rnat0 & m));
372 rnat1 = (urnat >> (63 - shift));
373 m = mask >> (63 - shift);
374 if (rnat1_kaddr >= kbsp)
375 sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat1 & m);
376 else if (rnat1_kaddr > krbs)
377 *rnat1_kaddr = ((*rnat1_kaddr & ~m) | (rnat1 & m));
381 on_kernel_rbs (unsigned long addr, unsigned long bspstore,
382 unsigned long urbs_end)
384 unsigned long *rnat_addr = ia64_rse_rnat_addr((unsigned long *)
386 return (addr >= bspstore && addr <= (unsigned long) rnat_addr);
390 * Read a word from the user-level backing store of task CHILD. ADDR
391 * is the user-level address to read the word from, VAL a pointer to
392 * the return value, and USER_BSP gives the end of the user-level
393 * backing store (i.e., it's the address that would be in ar.bsp after
394 * the user executed a "cover" instruction).
396 * This routine takes care of accessing the kernel register backing
397 * store for those registers that got spilled there. It also takes
398 * care of calculating the appropriate RNaT collection words.
401 ia64_peek (struct task_struct *child, struct switch_stack *child_stack,
402 unsigned long user_rbs_end, unsigned long addr, long *val)
404 unsigned long *bspstore, *krbs, regnum, *laddr, *urbs_end, *rnat_addr;
405 struct pt_regs *child_regs;
409 urbs_end = (long *) user_rbs_end;
410 laddr = (unsigned long *) addr;
411 child_regs = task_pt_regs(child);
412 bspstore = (unsigned long *) child_regs->ar_bspstore;
413 krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
414 if (on_kernel_rbs(addr, (unsigned long) bspstore,
415 (unsigned long) urbs_end))
418 * Attempt to read the RBS in an area that's actually
419 * on the kernel RBS => read the corresponding bits in
422 rnat_addr = ia64_rse_rnat_addr(laddr);
423 ret = get_rnat(child, child_stack, krbs, rnat_addr, urbs_end);
425 if (laddr == rnat_addr) {
426 /* return NaT collection word itself */
431 if (((1UL << ia64_rse_slot_num(laddr)) & ret) != 0) {
433 * It is implementation dependent whether the
434 * data portion of a NaT value gets saved on a
435 * st8.spill or RSE spill (e.g., see EAS 2.6,
436 * 4.4.4.6 Register Spill and Fill). To get
437 * consistent behavior across all possible
438 * IA-64 implementations, we return zero in
445 if (laddr < urbs_end) {
447 * The desired word is on the kernel RBS and
450 regnum = ia64_rse_num_regs(bspstore, laddr);
451 *val = *ia64_rse_skip_regs(krbs, regnum);
455 copied = access_process_vm(child, addr, &ret, sizeof(ret), FOLL_FORCE);
456 if (copied != sizeof(ret))
463 ia64_poke (struct task_struct *child, struct switch_stack *child_stack,
464 unsigned long user_rbs_end, unsigned long addr, long val)
466 unsigned long *bspstore, *krbs, regnum, *laddr;
467 unsigned long *urbs_end = (long *) user_rbs_end;
468 struct pt_regs *child_regs;
470 laddr = (unsigned long *) addr;
471 child_regs = task_pt_regs(child);
472 bspstore = (unsigned long *) child_regs->ar_bspstore;
473 krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
474 if (on_kernel_rbs(addr, (unsigned long) bspstore,
475 (unsigned long) urbs_end))
478 * Attempt to write the RBS in an area that's actually
479 * on the kernel RBS => write the corresponding bits
482 if (ia64_rse_is_rnat_slot(laddr))
483 put_rnat(child, child_stack, krbs, laddr, val,
486 if (laddr < urbs_end) {
487 regnum = ia64_rse_num_regs(bspstore, laddr);
488 *ia64_rse_skip_regs(krbs, regnum) = val;
491 } else if (access_process_vm(child, addr, &val, sizeof(val),
492 FOLL_FORCE | FOLL_WRITE)
499 * Calculate the address of the end of the user-level register backing
500 * store. This is the address that would have been stored in ar.bsp
501 * if the user had executed a "cover" instruction right before
502 * entering the kernel. If CFMP is not NULL, it is used to return the
503 * "current frame mask" that was active at the time the kernel was
507 ia64_get_user_rbs_end (struct task_struct *child, struct pt_regs *pt,
510 unsigned long *krbs, *bspstore, cfm = pt->cr_ifs;
513 krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
514 bspstore = (unsigned long *) pt->ar_bspstore;
515 ndirty = ia64_rse_num_regs(krbs, krbs + (pt->loadrs >> 19));
518 ndirty += (cfm & 0x7f);
520 cfm &= ~(1UL << 63); /* clear valid bit */
524 return (unsigned long) ia64_rse_skip_regs(bspstore, ndirty);
528 * Synchronize (i.e, write) the RSE backing store living in kernel
529 * space to the VM of the CHILD task. SW and PT are the pointers to
530 * the switch_stack and pt_regs structures, respectively.
531 * USER_RBS_END is the user-level address at which the backing store
535 ia64_sync_user_rbs (struct task_struct *child, struct switch_stack *sw,
536 unsigned long user_rbs_start, unsigned long user_rbs_end)
538 unsigned long addr, val;
541 /* now copy word for word from kernel rbs to user rbs: */
542 for (addr = user_rbs_start; addr < user_rbs_end; addr += 8) {
543 ret = ia64_peek(child, sw, user_rbs_end, addr, &val);
546 if (access_process_vm(child, addr, &val, sizeof(val),
547 FOLL_FORCE | FOLL_WRITE)
555 ia64_sync_kernel_rbs (struct task_struct *child, struct switch_stack *sw,
556 unsigned long user_rbs_start, unsigned long user_rbs_end)
558 unsigned long addr, val;
561 /* now copy word for word from user rbs to kernel rbs: */
562 for (addr = user_rbs_start; addr < user_rbs_end; addr += 8) {
563 if (access_process_vm(child, addr, &val, sizeof(val),
568 ret = ia64_poke(child, sw, user_rbs_end, addr, val);
575 typedef long (*syncfunc_t)(struct task_struct *, struct switch_stack *,
576 unsigned long, unsigned long);
578 static void do_sync_rbs(struct unw_frame_info *info, void *arg)
581 unsigned long urbs_end;
584 if (unw_unwind_to_user(info) < 0)
586 pt = task_pt_regs(info->task);
587 urbs_end = ia64_get_user_rbs_end(info->task, pt, NULL);
589 fn(info->task, info->sw, pt->ar_bspstore, urbs_end);
593 * when a thread is stopped (ptraced), debugger might change thread's user
594 * stack (change memory directly), and we must avoid the RSE stored in kernel
595 * to override user stack (user space's RSE is newer than kernel's in the
596 * case). To workaround the issue, we copy kernel RSE to user RSE before the
597 * task is stopped, so user RSE has updated data. we then copy user RSE to
598 * kernel after the task is resummed from traced stop and kernel will use the
599 * newer RSE to return to user. TIF_RESTORE_RSE is the flag to indicate we need
600 * synchronize user RSE to kernel.
602 void ia64_ptrace_stop(void)
604 if (test_and_set_tsk_thread_flag(current, TIF_RESTORE_RSE))
606 set_notify_resume(current);
607 unw_init_running(do_sync_rbs, ia64_sync_user_rbs);
611 * This is called to read back the register backing store.
613 void ia64_sync_krbs(void)
615 clear_tsk_thread_flag(current, TIF_RESTORE_RSE);
617 unw_init_running(do_sync_rbs, ia64_sync_kernel_rbs);
621 * After PTRACE_ATTACH, a thread's register backing store area in user
622 * space is assumed to contain correct data whenever the thread is
623 * stopped. arch_ptrace_stop takes care of this on tracing stops.
624 * But if the child was already stopped for job control when we attach
625 * to it, then it might not ever get into ptrace_stop by the time we
626 * want to examine the user memory containing the RBS.
629 ptrace_attach_sync_user_rbs (struct task_struct *child)
632 struct unw_frame_info info;
635 * If the child is in TASK_STOPPED, we need to change that to
636 * TASK_TRACED momentarily while we operate on it. This ensures
637 * that the child won't be woken up and return to user mode while
638 * we are doing the sync. (It can only be woken up for SIGKILL.)
641 read_lock(&tasklist_lock);
642 if (child->sighand) {
643 spin_lock_irq(&child->sighand->siglock);
644 if (child->state == TASK_STOPPED &&
645 !test_and_set_tsk_thread_flag(child, TIF_RESTORE_RSE)) {
646 set_notify_resume(child);
648 child->state = TASK_TRACED;
651 spin_unlock_irq(&child->sighand->siglock);
653 read_unlock(&tasklist_lock);
658 unw_init_from_blocked_task(&info, child);
659 do_sync_rbs(&info, ia64_sync_user_rbs);
662 * Now move the child back into TASK_STOPPED if it should be in a
663 * job control stop, so that SIGCONT can be used to wake it up.
665 read_lock(&tasklist_lock);
666 if (child->sighand) {
667 spin_lock_irq(&child->sighand->siglock);
668 if (child->state == TASK_TRACED &&
669 (child->signal->flags & SIGNAL_STOP_STOPPED)) {
670 child->state = TASK_STOPPED;
672 spin_unlock_irq(&child->sighand->siglock);
674 read_unlock(&tasklist_lock);
678 * Write f32-f127 back to task->thread.fph if it has been modified.
681 ia64_flush_fph (struct task_struct *task)
683 struct ia64_psr *psr = ia64_psr(task_pt_regs(task));
686 * Prevent migrating this task while
687 * we're fiddling with the FPU state
690 if (ia64_is_local_fpu_owner(task) && psr->mfh) {
692 task->thread.flags |= IA64_THREAD_FPH_VALID;
693 ia64_save_fpu(&task->thread.fph[0]);
699 * Sync the fph state of the task so that it can be manipulated
700 * through thread.fph. If necessary, f32-f127 are written back to
701 * thread.fph or, if the fph state hasn't been used before, thread.fph
702 * is cleared to zeroes. Also, access to f32-f127 is disabled to
703 * ensure that the task picks up the state from thread.fph when it
707 ia64_sync_fph (struct task_struct *task)
709 struct ia64_psr *psr = ia64_psr(task_pt_regs(task));
711 ia64_flush_fph(task);
712 if (!(task->thread.flags & IA64_THREAD_FPH_VALID)) {
713 task->thread.flags |= IA64_THREAD_FPH_VALID;
714 memset(&task->thread.fph, 0, sizeof(task->thread.fph));
721 * Change the machine-state of CHILD such that it will return via the normal
722 * kernel exit-path, rather than the syscall-exit path.
725 convert_to_non_syscall (struct task_struct *child, struct pt_regs *pt,
728 struct unw_frame_info info, prev_info;
729 unsigned long ip, sp, pr;
731 unw_init_from_blocked_task(&info, child);
734 if (unw_unwind(&info) < 0)
737 unw_get_sp(&info, &sp);
738 if ((long)((unsigned long)child + IA64_STK_OFFSET - sp)
739 < IA64_PT_REGS_SIZE) {
740 dprintk("ptrace.%s: ran off the top of the kernel "
741 "stack\n", __func__);
744 if (unw_get_pr (&prev_info, &pr) < 0) {
745 unw_get_rp(&prev_info, &ip);
746 dprintk("ptrace.%s: failed to read "
747 "predicate register (ip=0x%lx)\n",
751 if (unw_is_intr_frame(&info)
752 && (pr & (1UL << PRED_USER_STACK)))
757 * Note: at the time of this call, the target task is blocked
758 * in notify_resume_user() and by clearling PRED_LEAVE_SYSCALL
759 * (aka, "pLvSys") we redirect execution from
760 * .work_pending_syscall_end to .work_processed_kernel.
762 unw_get_pr(&prev_info, &pr);
763 pr &= ~((1UL << PRED_SYSCALL) | (1UL << PRED_LEAVE_SYSCALL));
764 pr |= (1UL << PRED_NON_SYSCALL);
765 unw_set_pr(&prev_info, pr);
767 pt->cr_ifs = (1UL << 63) | cfm;
769 * Clear the memory that is NOT written on syscall-entry to
770 * ensure we do not leak kernel-state to user when execution
776 memset(&pt->r16, 0, 16*8); /* clear r16-r31 */
777 memset(&pt->f6, 0, 6*16); /* clear f6-f11 */
785 access_nat_bits (struct task_struct *child, struct pt_regs *pt,
786 struct unw_frame_info *info,
787 unsigned long *data, int write_access)
789 unsigned long regnum, nat_bits, scratch_unat, dummy = 0;
794 scratch_unat = ia64_put_scratch_nat_bits(pt, nat_bits);
795 if (unw_set_ar(info, UNW_AR_UNAT, scratch_unat) < 0) {
796 dprintk("ptrace: failed to set ar.unat\n");
799 for (regnum = 4; regnum <= 7; ++regnum) {
800 unw_get_gr(info, regnum, &dummy, &nat);
801 unw_set_gr(info, regnum, dummy,
802 (nat_bits >> regnum) & 1);
805 if (unw_get_ar(info, UNW_AR_UNAT, &scratch_unat) < 0) {
806 dprintk("ptrace: failed to read ar.unat\n");
809 nat_bits = ia64_get_scratch_nat_bits(pt, scratch_unat);
810 for (regnum = 4; regnum <= 7; ++regnum) {
811 unw_get_gr(info, regnum, &dummy, &nat);
812 nat_bits |= (nat != 0) << regnum;
820 access_uarea (struct task_struct *child, unsigned long addr,
821 unsigned long *data, int write_access);
824 ptrace_getregs (struct task_struct *child, struct pt_all_user_regs __user *ppr)
826 unsigned long psr, ec, lc, rnat, bsp, cfm, nat_bits, val;
827 struct unw_frame_info info;
828 struct ia64_fpreg fpval;
829 struct switch_stack *sw;
831 long ret, retval = 0;
835 if (!access_ok(ppr, sizeof(struct pt_all_user_regs)))
838 pt = task_pt_regs(child);
839 sw = (struct switch_stack *) (child->thread.ksp + 16);
840 unw_init_from_blocked_task(&info, child);
841 if (unw_unwind_to_user(&info) < 0) {
845 if (((unsigned long) ppr & 0x7) != 0) {
846 dprintk("ptrace:unaligned register address %p\n", ppr);
850 if (access_uarea(child, PT_CR_IPSR, &psr, 0) < 0
851 || access_uarea(child, PT_AR_EC, &ec, 0) < 0
852 || access_uarea(child, PT_AR_LC, &lc, 0) < 0
853 || access_uarea(child, PT_AR_RNAT, &rnat, 0) < 0
854 || access_uarea(child, PT_AR_BSP, &bsp, 0) < 0
855 || access_uarea(child, PT_CFM, &cfm, 0)
856 || access_uarea(child, PT_NAT_BITS, &nat_bits, 0))
861 retval |= __put_user(pt->cr_iip, &ppr->cr_iip);
862 retval |= __put_user(psr, &ppr->cr_ipsr);
866 retval |= __put_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
867 retval |= __put_user(pt->ar_rsc, &ppr->ar[PT_AUR_RSC]);
868 retval |= __put_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
869 retval |= __put_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
870 retval |= __put_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
871 retval |= __put_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
873 retval |= __put_user(ec, &ppr->ar[PT_AUR_EC]);
874 retval |= __put_user(lc, &ppr->ar[PT_AUR_LC]);
875 retval |= __put_user(rnat, &ppr->ar[PT_AUR_RNAT]);
876 retval |= __put_user(bsp, &ppr->ar[PT_AUR_BSP]);
877 retval |= __put_user(cfm, &ppr->cfm);
881 retval |= __copy_to_user(&ppr->gr[1], &pt->r1, sizeof(long));
882 retval |= __copy_to_user(&ppr->gr[2], &pt->r2, sizeof(long) *2);
886 for (i = 4; i < 8; i++) {
887 if (unw_access_gr(&info, i, &val, &nat, 0) < 0)
889 retval |= __put_user(val, &ppr->gr[i]);
894 retval |= __copy_to_user(&ppr->gr[8], &pt->r8, sizeof(long) * 4);
898 retval |= __copy_to_user(&ppr->gr[12], &pt->r12, sizeof(long) * 2);
899 retval |= __copy_to_user(&ppr->gr[14], &pt->r14, sizeof(long));
900 retval |= __copy_to_user(&ppr->gr[15], &pt->r15, sizeof(long));
904 retval |= __copy_to_user(&ppr->gr[16], &pt->r16, sizeof(long) * 16);
908 retval |= __put_user(pt->b0, &ppr->br[0]);
912 for (i = 1; i < 6; i++) {
913 if (unw_access_br(&info, i, &val, 0) < 0)
915 __put_user(val, &ppr->br[i]);
920 retval |= __put_user(pt->b6, &ppr->br[6]);
921 retval |= __put_user(pt->b7, &ppr->br[7]);
925 for (i = 2; i < 6; i++) {
926 if (unw_get_fr(&info, i, &fpval) < 0)
928 retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval));
933 retval |= __copy_to_user(&ppr->fr[6], &pt->f6,
934 sizeof(struct ia64_fpreg) * 6);
936 /* fp scratch regs(12-15) */
938 retval |= __copy_to_user(&ppr->fr[12], &sw->f12,
939 sizeof(struct ia64_fpreg) * 4);
943 for (i = 16; i < 32; i++) {
944 if (unw_get_fr(&info, i, &fpval) < 0)
946 retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval));
951 ia64_flush_fph(child);
952 retval |= __copy_to_user(&ppr->fr[32], &child->thread.fph,
953 sizeof(ppr->fr[32]) * 96);
957 retval |= __put_user(pt->pr, &ppr->pr);
961 retval |= __put_user(nat_bits, &ppr->nat);
963 ret = retval ? -EIO : 0;
968 ptrace_setregs (struct task_struct *child, struct pt_all_user_regs __user *ppr)
970 unsigned long psr, rsc, ec, lc, rnat, bsp, cfm, nat_bits, val = 0;
971 struct unw_frame_info info;
972 struct switch_stack *sw;
973 struct ia64_fpreg fpval;
975 long ret, retval = 0;
978 memset(&fpval, 0, sizeof(fpval));
980 if (!access_ok(ppr, sizeof(struct pt_all_user_regs)))
983 pt = task_pt_regs(child);
984 sw = (struct switch_stack *) (child->thread.ksp + 16);
985 unw_init_from_blocked_task(&info, child);
986 if (unw_unwind_to_user(&info) < 0) {
990 if (((unsigned long) ppr & 0x7) != 0) {
991 dprintk("ptrace:unaligned register address %p\n", ppr);
997 retval |= __get_user(pt->cr_iip, &ppr->cr_iip);
998 retval |= __get_user(psr, &ppr->cr_ipsr);
1002 retval |= __get_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
1003 retval |= __get_user(rsc, &ppr->ar[PT_AUR_RSC]);
1004 retval |= __get_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
1005 retval |= __get_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
1006 retval |= __get_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
1007 retval |= __get_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
1009 retval |= __get_user(ec, &ppr->ar[PT_AUR_EC]);
1010 retval |= __get_user(lc, &ppr->ar[PT_AUR_LC]);
1011 retval |= __get_user(rnat, &ppr->ar[PT_AUR_RNAT]);
1012 retval |= __get_user(bsp, &ppr->ar[PT_AUR_BSP]);
1013 retval |= __get_user(cfm, &ppr->cfm);
1017 retval |= __copy_from_user(&pt->r1, &ppr->gr[1], sizeof(long));
1018 retval |= __copy_from_user(&pt->r2, &ppr->gr[2], sizeof(long) * 2);
1022 for (i = 4; i < 8; i++) {
1023 retval |= __get_user(val, &ppr->gr[i]);
1024 /* NaT bit will be set via PT_NAT_BITS: */
1025 if (unw_set_gr(&info, i, val, 0) < 0)
1031 retval |= __copy_from_user(&pt->r8, &ppr->gr[8], sizeof(long) * 4);
1035 retval |= __copy_from_user(&pt->r12, &ppr->gr[12], sizeof(long) * 2);
1036 retval |= __copy_from_user(&pt->r14, &ppr->gr[14], sizeof(long));
1037 retval |= __copy_from_user(&pt->r15, &ppr->gr[15], sizeof(long));
1041 retval |= __copy_from_user(&pt->r16, &ppr->gr[16], sizeof(long) * 16);
1045 retval |= __get_user(pt->b0, &ppr->br[0]);
1049 for (i = 1; i < 6; i++) {
1050 retval |= __get_user(val, &ppr->br[i]);
1051 unw_set_br(&info, i, val);
1056 retval |= __get_user(pt->b6, &ppr->br[6]);
1057 retval |= __get_user(pt->b7, &ppr->br[7]);
1061 for (i = 2; i < 6; i++) {
1062 retval |= __copy_from_user(&fpval, &ppr->fr[i], sizeof(fpval));
1063 if (unw_set_fr(&info, i, fpval) < 0)
1069 retval |= __copy_from_user(&pt->f6, &ppr->fr[6],
1070 sizeof(ppr->fr[6]) * 6);
1072 /* fp scratch regs(12-15) */
1074 retval |= __copy_from_user(&sw->f12, &ppr->fr[12],
1075 sizeof(ppr->fr[12]) * 4);
1079 for (i = 16; i < 32; i++) {
1080 retval |= __copy_from_user(&fpval, &ppr->fr[i],
1082 if (unw_set_fr(&info, i, fpval) < 0)
1088 ia64_sync_fph(child);
1089 retval |= __copy_from_user(&child->thread.fph, &ppr->fr[32],
1090 sizeof(ppr->fr[32]) * 96);
1094 retval |= __get_user(pt->pr, &ppr->pr);
1098 retval |= __get_user(nat_bits, &ppr->nat);
1100 retval |= access_uarea(child, PT_CR_IPSR, &psr, 1);
1101 retval |= access_uarea(child, PT_AR_RSC, &rsc, 1);
1102 retval |= access_uarea(child, PT_AR_EC, &ec, 1);
1103 retval |= access_uarea(child, PT_AR_LC, &lc, 1);
1104 retval |= access_uarea(child, PT_AR_RNAT, &rnat, 1);
1105 retval |= access_uarea(child, PT_AR_BSP, &bsp, 1);
1106 retval |= access_uarea(child, PT_CFM, &cfm, 1);
1107 retval |= access_uarea(child, PT_NAT_BITS, &nat_bits, 1);
1109 ret = retval ? -EIO : 0;
1114 user_enable_single_step (struct task_struct *child)
1116 struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
1118 set_tsk_thread_flag(child, TIF_SINGLESTEP);
1123 user_enable_block_step (struct task_struct *child)
1125 struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
1127 set_tsk_thread_flag(child, TIF_SINGLESTEP);
1132 user_disable_single_step (struct task_struct *child)
1134 struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
1136 /* make sure the single step/taken-branch trap bits are not set: */
1137 clear_tsk_thread_flag(child, TIF_SINGLESTEP);
1143 * Called by kernel/ptrace.c when detaching..
1145 * Make sure the single step bit is not set.
1148 ptrace_disable (struct task_struct *child)
1150 user_disable_single_step(child);
1154 arch_ptrace (struct task_struct *child, long request,
1155 unsigned long addr, unsigned long data)
1158 case PTRACE_PEEKTEXT:
1159 case PTRACE_PEEKDATA:
1160 /* read word at location addr */
1161 if (ptrace_access_vm(child, addr, &data, sizeof(data),
1165 /* ensure return value is not mistaken for error code */
1166 force_successful_syscall_return();
1169 /* PTRACE_POKETEXT and PTRACE_POKEDATA is handled
1170 * by the generic ptrace_request().
1173 case PTRACE_PEEKUSR:
1174 /* read the word at addr in the USER area */
1175 if (access_uarea(child, addr, &data, 0) < 0)
1177 /* ensure return value is not mistaken for error code */
1178 force_successful_syscall_return();
1181 case PTRACE_POKEUSR:
1182 /* write the word at addr in the USER area */
1183 if (access_uarea(child, addr, &data, 1) < 0)
1187 case PTRACE_OLD_GETSIGINFO:
1188 /* for backwards-compatibility */
1189 return ptrace_request(child, PTRACE_GETSIGINFO, addr, data);
1191 case PTRACE_OLD_SETSIGINFO:
1192 /* for backwards-compatibility */
1193 return ptrace_request(child, PTRACE_SETSIGINFO, addr, data);
1195 case PTRACE_GETREGS:
1196 return ptrace_getregs(child,
1197 (struct pt_all_user_regs __user *) data);
1199 case PTRACE_SETREGS:
1200 return ptrace_setregs(child,
1201 (struct pt_all_user_regs __user *) data);
1204 return ptrace_request(child, request, addr, data);
1209 /* "asmlinkage" so the input arguments are preserved... */
1212 syscall_trace_enter (long arg0, long arg1, long arg2, long arg3,
1213 long arg4, long arg5, long arg6, long arg7,
1214 struct pt_regs regs)
1216 if (test_thread_flag(TIF_SYSCALL_TRACE))
1217 if (tracehook_report_syscall_entry(®s))
1220 /* copy user rbs to kernel rbs */
1221 if (test_thread_flag(TIF_RESTORE_RSE))
1225 audit_syscall_entry(regs.r15, arg0, arg1, arg2, arg3);
1230 /* "asmlinkage" so the input arguments are preserved... */
1233 syscall_trace_leave (long arg0, long arg1, long arg2, long arg3,
1234 long arg4, long arg5, long arg6, long arg7,
1235 struct pt_regs regs)
1239 audit_syscall_exit(®s);
1241 step = test_thread_flag(TIF_SINGLESTEP);
1242 if (step || test_thread_flag(TIF_SYSCALL_TRACE))
1243 tracehook_report_syscall_exit(®s, step);
1245 /* copy user rbs to kernel rbs */
1246 if (test_thread_flag(TIF_RESTORE_RSE))
1250 /* Utrace implementation starts here */
1258 const void __user *ubuf;
1261 struct regset_getset {
1262 struct task_struct *target;
1263 const struct user_regset *regset;
1265 struct regset_get get;
1266 struct regset_set set;
1273 static const ptrdiff_t pt_offsets[32] =
1275 #define R(n) offsetof(struct pt_regs, r##n)
1276 [0] = -1, R(1), R(2), R(3),
1277 [4] = -1, [5] = -1, [6] = -1, [7] = -1,
1278 R(8), R(9), R(10), R(11), R(12), R(13), R(14), R(15),
1279 R(16), R(17), R(18), R(19), R(20), R(21), R(22), R(23),
1280 R(24), R(25), R(26), R(27), R(28), R(29), R(30), R(31),
1285 access_elf_gpreg(struct task_struct *target, struct unw_frame_info *info,
1286 unsigned long addr, unsigned long *data, int write_access)
1288 struct pt_regs *pt = task_pt_regs(target);
1289 unsigned reg = addr / sizeof(unsigned long);
1290 ptrdiff_t d = pt_offsets[reg];
1293 unsigned long *ptr = (void *)pt + d;
1302 /* read NaT bit first: */
1303 unsigned long dummy;
1304 int ret = unw_get_gr(info, reg, &dummy, &nat);
1308 return unw_access_gr(info, reg, data, &nat, write_access);
1313 access_elf_breg(struct task_struct *target, struct unw_frame_info *info,
1314 unsigned long addr, unsigned long *data, int write_access)
1317 unsigned long *ptr = NULL;
1319 pt = task_pt_regs(target);
1321 case ELF_BR_OFFSET(0):
1324 case ELF_BR_OFFSET(1) ... ELF_BR_OFFSET(5):
1325 return unw_access_br(info, (addr - ELF_BR_OFFSET(0))/8,
1326 data, write_access);
1327 case ELF_BR_OFFSET(6):
1330 case ELF_BR_OFFSET(7):
1341 access_elf_areg(struct task_struct *target, struct unw_frame_info *info,
1342 unsigned long addr, unsigned long *data, int write_access)
1345 unsigned long cfm, urbs_end;
1346 unsigned long *ptr = NULL;
1348 pt = task_pt_regs(target);
1349 if (addr >= ELF_AR_RSC_OFFSET && addr <= ELF_AR_SSD_OFFSET) {
1351 case ELF_AR_RSC_OFFSET:
1354 pt->ar_rsc = *data | (3 << 2);
1358 case ELF_AR_BSP_OFFSET:
1360 * By convention, we use PT_AR_BSP to refer to
1361 * the end of the user-level backing store.
1362 * Use ia64_rse_skip_regs(PT_AR_BSP, -CFM.sof)
1363 * to get the real value of ar.bsp at the time
1364 * the kernel was entered.
1366 * Furthermore, when changing the contents of
1367 * PT_AR_BSP (or PT_CFM) while the task is
1368 * blocked in a system call, convert the state
1369 * so that the non-system-call exit
1370 * path is used. This ensures that the proper
1371 * state will be picked up when resuming
1372 * execution. However, it *also* means that
1373 * once we write PT_AR_BSP/PT_CFM, it won't be
1374 * possible to modify the syscall arguments of
1375 * the pending system call any longer. This
1376 * shouldn't be an issue because modifying
1377 * PT_AR_BSP/PT_CFM generally implies that
1378 * we're either abandoning the pending system
1379 * call or that we defer it's re-execution
1380 * (e.g., due to GDB doing an inferior
1383 urbs_end = ia64_get_user_rbs_end(target, pt, &cfm);
1385 if (*data != urbs_end) {
1387 convert_to_non_syscall(target,
1391 * Simulate user-level write
1395 pt->ar_bspstore = *data;
1400 case ELF_AR_BSPSTORE_OFFSET:
1401 ptr = &pt->ar_bspstore;
1403 case ELF_AR_RNAT_OFFSET:
1406 case ELF_AR_CCV_OFFSET:
1409 case ELF_AR_UNAT_OFFSET:
1412 case ELF_AR_FPSR_OFFSET:
1415 case ELF_AR_PFS_OFFSET:
1418 case ELF_AR_LC_OFFSET:
1419 return unw_access_ar(info, UNW_AR_LC, data,
1421 case ELF_AR_EC_OFFSET:
1422 return unw_access_ar(info, UNW_AR_EC, data,
1424 case ELF_AR_CSD_OFFSET:
1427 case ELF_AR_SSD_OFFSET:
1430 } else if (addr >= ELF_CR_IIP_OFFSET && addr <= ELF_CR_IPSR_OFFSET) {
1432 case ELF_CR_IIP_OFFSET:
1435 case ELF_CFM_OFFSET:
1436 urbs_end = ia64_get_user_rbs_end(target, pt, &cfm);
1438 if (((cfm ^ *data) & PFM_MASK) != 0) {
1440 convert_to_non_syscall(target,
1443 pt->cr_ifs = ((pt->cr_ifs & ~PFM_MASK)
1444 | (*data & PFM_MASK));
1449 case ELF_CR_IPSR_OFFSET:
1451 unsigned long tmp = *data;
1452 /* psr.ri==3 is a reserved value: SDM 2:25 */
1453 if ((tmp & IA64_PSR_RI) == IA64_PSR_RI)
1454 tmp &= ~IA64_PSR_RI;
1455 pt->cr_ipsr = ((tmp & IPSR_MASK)
1456 | (pt->cr_ipsr & ~IPSR_MASK));
1458 *data = (pt->cr_ipsr & IPSR_MASK);
1461 } else if (addr == ELF_NAT_OFFSET)
1462 return access_nat_bits(target, pt, info,
1463 data, write_access);
1464 else if (addr == ELF_PR_OFFSET)
1478 access_elf_reg(struct task_struct *target, struct unw_frame_info *info,
1479 unsigned long addr, unsigned long *data, int write_access)
1481 if (addr >= ELF_GR_OFFSET(1) && addr <= ELF_GR_OFFSET(31))
1482 return access_elf_gpreg(target, info, addr, data, write_access);
1483 else if (addr >= ELF_BR_OFFSET(0) && addr <= ELF_BR_OFFSET(7))
1484 return access_elf_breg(target, info, addr, data, write_access);
1486 return access_elf_areg(target, info, addr, data, write_access);
1489 struct regset_membuf {
1494 void do_gpregs_get(struct unw_frame_info *info, void *arg)
1496 struct regset_membuf *dst = arg;
1497 struct membuf to = dst->to;
1501 if (unw_unwind_to_user(info) < 0)
1507 * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
1508 * predicate registers (p0-p63)
1511 * ar.rsc ar.bsp ar.bspstore ar.rnat
1512 * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
1517 membuf_zero(&to, 8);
1518 for (n = 8; to.left && n < ELF_AR_END_OFFSET; n += 8) {
1519 if (access_elf_reg(info->task, info, n, ®, 0) < 0) {
1523 membuf_store(&to, reg);
1527 void do_gpregs_set(struct unw_frame_info *info, void *arg)
1529 struct regset_getset *dst = arg;
1531 if (unw_unwind_to_user(info) < 0)
1537 if (dst->pos < ELF_GR_OFFSET(1)) {
1538 dst->ret = user_regset_copyin_ignore(&dst->pos, &dst->count,
1541 0, ELF_GR_OFFSET(1));
1546 while (dst->count && dst->pos < ELF_AR_END_OFFSET) {
1547 unsigned int n, from, to;
1551 to = from + sizeof(tmp);
1552 if (to > ELF_AR_END_OFFSET)
1553 to = ELF_AR_END_OFFSET;
1554 /* get up to 16 values */
1555 dst->ret = user_regset_copyin(&dst->pos, &dst->count,
1556 &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
1560 /* now copy them into registers */
1561 for (n = 0; from < dst->pos; from += sizeof(elf_greg_t), n++)
1562 if (access_elf_reg(dst->target, info, from,
1570 #define ELF_FP_OFFSET(i) (i * sizeof(elf_fpreg_t))
1572 void do_fpregs_get(struct unw_frame_info *info, void *arg)
1574 struct task_struct *task = info->task;
1575 struct regset_membuf *dst = arg;
1576 struct membuf to = dst->to;
1580 if (unw_unwind_to_user(info) < 0)
1583 /* Skip pos 0 and 1 */
1584 membuf_zero(&to, 2 * sizeof(elf_fpreg_t));
1587 for (n = 2; to.left && n < 32; n++) {
1588 if (unw_get_fr(info, n, ®)) {
1592 membuf_write(&to, ®, sizeof(reg));
1599 ia64_flush_fph(task);
1600 if (task->thread.flags & IA64_THREAD_FPH_VALID)
1601 membuf_write(&to, &task->thread.fph, 96 * sizeof(reg));
1603 membuf_zero(&to, 96 * sizeof(reg));
1606 void do_fpregs_set(struct unw_frame_info *info, void *arg)
1608 struct regset_getset *dst = arg;
1609 elf_fpreg_t fpreg, tmp[30];
1610 int index, start, end;
1612 if (unw_unwind_to_user(info) < 0)
1615 /* Skip pos 0 and 1 */
1616 if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(2)) {
1617 dst->ret = user_regset_copyin_ignore(&dst->pos, &dst->count,
1620 0, ELF_FP_OFFSET(2));
1621 if (dst->count == 0 || dst->ret)
1626 if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(32)) {
1628 end = min(((unsigned int)ELF_FP_OFFSET(32)),
1629 dst->pos + dst->count);
1630 dst->ret = user_regset_copyin(&dst->pos, &dst->count,
1631 &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
1632 ELF_FP_OFFSET(2), ELF_FP_OFFSET(32));
1636 if (start & 0xF) { /* only write high part */
1637 if (unw_get_fr(info, start / sizeof(elf_fpreg_t),
1642 tmp[start / sizeof(elf_fpreg_t) - 2].u.bits[0]
1646 if (end & 0xF) { /* only write low part */
1647 if (unw_get_fr(info, end / sizeof(elf_fpreg_t),
1652 tmp[end / sizeof(elf_fpreg_t) - 2].u.bits[1]
1654 end = (end + 0xF) & ~0xFUL;
1657 for ( ; start < end ; start += sizeof(elf_fpreg_t)) {
1658 index = start / sizeof(elf_fpreg_t);
1659 if (unw_set_fr(info, index, tmp[index - 2])) {
1664 if (dst->ret || dst->count == 0)
1669 if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(128)) {
1670 ia64_sync_fph(dst->target);
1671 dst->ret = user_regset_copyin(&dst->pos, &dst->count,
1674 &dst->target->thread.fph,
1675 ELF_FP_OFFSET(32), -1);
1680 unwind_and_call(void (*call)(struct unw_frame_info *, void *),
1681 struct task_struct *target, void *data)
1683 if (target == current)
1684 unw_init_running(call, data);
1686 struct unw_frame_info info;
1687 memset(&info, 0, sizeof(info));
1688 unw_init_from_blocked_task(&info, target);
1689 (*call)(&info, data);
1694 do_regset_call(void (*call)(struct unw_frame_info *, void *),
1695 struct task_struct *target,
1696 const struct user_regset *regset,
1697 unsigned int pos, unsigned int count,
1698 const void *kbuf, const void __user *ubuf)
1700 struct regset_getset info = { .target = target, .regset = regset,
1701 .pos = pos, .count = count,
1702 .u.set = { .kbuf = kbuf, .ubuf = ubuf },
1704 unwind_and_call(call, target, &info);
1709 gpregs_get(struct task_struct *target,
1710 const struct user_regset *regset,
1713 struct regset_membuf info = {.to = to};
1714 unwind_and_call(do_gpregs_get, target, &info);
1718 static int gpregs_set(struct task_struct *target,
1719 const struct user_regset *regset,
1720 unsigned int pos, unsigned int count,
1721 const void *kbuf, const void __user *ubuf)
1723 return do_regset_call(do_gpregs_set, target, regset, pos, count,
1727 static void do_gpregs_writeback(struct unw_frame_info *info, void *arg)
1729 do_sync_rbs(info, ia64_sync_user_rbs);
1733 * This is called to write back the register backing store.
1734 * ptrace does this before it stops, so that a tracer reading the user
1735 * memory after the thread stops will get the current register data.
1738 gpregs_writeback(struct task_struct *target,
1739 const struct user_regset *regset,
1742 if (test_and_set_tsk_thread_flag(target, TIF_RESTORE_RSE))
1744 set_notify_resume(target);
1745 return do_regset_call(do_gpregs_writeback, target, regset, 0, 0,
1750 fpregs_active(struct task_struct *target, const struct user_regset *regset)
1752 return (target->thread.flags & IA64_THREAD_FPH_VALID) ? 128 : 32;
1755 static int fpregs_get(struct task_struct *target,
1756 const struct user_regset *regset,
1759 struct regset_membuf info = {.to = to};
1760 unwind_and_call(do_fpregs_get, target, &info);
1764 static int fpregs_set(struct task_struct *target,
1765 const struct user_regset *regset,
1766 unsigned int pos, unsigned int count,
1767 const void *kbuf, const void __user *ubuf)
1769 return do_regset_call(do_fpregs_set, target, regset, pos, count,
1774 access_uarea(struct task_struct *child, unsigned long addr,
1775 unsigned long *data, int write_access)
1777 unsigned int pos = -1; /* an invalid value */
1778 unsigned long *ptr, regnum;
1780 if ((addr & 0x7) != 0) {
1781 dprintk("ptrace: unaligned register address 0x%lx\n", addr);
1784 if ((addr >= PT_NAT_BITS + 8 && addr < PT_F2) ||
1785 (addr >= PT_R7 + 8 && addr < PT_B1) ||
1786 (addr >= PT_AR_LC + 8 && addr < PT_CR_IPSR) ||
1787 (addr >= PT_AR_SSD + 8 && addr < PT_DBR)) {
1788 dprintk("ptrace: rejecting access to register "
1789 "address 0x%lx\n", addr);
1794 case PT_F32 ... (PT_F127 + 15):
1795 pos = addr - PT_F32 + ELF_FP_OFFSET(32);
1797 case PT_F2 ... (PT_F5 + 15):
1798 pos = addr - PT_F2 + ELF_FP_OFFSET(2);
1800 case PT_F10 ... (PT_F31 + 15):
1801 pos = addr - PT_F10 + ELF_FP_OFFSET(10);
1803 case PT_F6 ... (PT_F9 + 15):
1804 pos = addr - PT_F6 + ELF_FP_OFFSET(6);
1809 unsigned reg = pos / sizeof(elf_fpreg_t);
1810 int which_half = (pos / sizeof(unsigned long)) & 1;
1812 if (reg < 32) { /* fr2-fr31 */
1813 struct unw_frame_info info;
1816 memset(&info, 0, sizeof(info));
1817 unw_init_from_blocked_task(&info, child);
1818 if (unw_unwind_to_user(&info) < 0)
1821 if (unw_get_fr(&info, reg, &fpreg))
1824 fpreg.u.bits[which_half] = *data;
1825 if (unw_set_fr(&info, reg, fpreg))
1828 *data = fpreg.u.bits[which_half];
1831 elf_fpreg_t *p = &child->thread.fph[reg - 32];
1832 unsigned long *bits = &p->u.bits[which_half];
1834 ia64_sync_fph(child);
1837 else if (child->thread.flags & IA64_THREAD_FPH_VALID)
1847 pos = ELF_NAT_OFFSET;
1849 case PT_R4 ... PT_R7:
1850 pos = addr - PT_R4 + ELF_GR_OFFSET(4);
1852 case PT_B1 ... PT_B5:
1853 pos = addr - PT_B1 + ELF_BR_OFFSET(1);
1856 pos = ELF_AR_EC_OFFSET;
1859 pos = ELF_AR_LC_OFFSET;
1862 pos = ELF_CR_IPSR_OFFSET;
1865 pos = ELF_CR_IIP_OFFSET;
1868 pos = ELF_CFM_OFFSET;
1871 pos = ELF_AR_UNAT_OFFSET;
1874 pos = ELF_AR_PFS_OFFSET;
1877 pos = ELF_AR_RSC_OFFSET;
1880 pos = ELF_AR_RNAT_OFFSET;
1882 case PT_AR_BSPSTORE:
1883 pos = ELF_AR_BSPSTORE_OFFSET;
1886 pos = ELF_PR_OFFSET;
1889 pos = ELF_BR_OFFSET(6);
1892 pos = ELF_AR_BSP_OFFSET;
1894 case PT_R1 ... PT_R3:
1895 pos = addr - PT_R1 + ELF_GR_OFFSET(1);
1897 case PT_R12 ... PT_R15:
1898 pos = addr - PT_R12 + ELF_GR_OFFSET(12);
1900 case PT_R8 ... PT_R11:
1901 pos = addr - PT_R8 + ELF_GR_OFFSET(8);
1903 case PT_R16 ... PT_R31:
1904 pos = addr - PT_R16 + ELF_GR_OFFSET(16);
1907 pos = ELF_AR_CCV_OFFSET;
1910 pos = ELF_AR_FPSR_OFFSET;
1913 pos = ELF_BR_OFFSET(0);
1916 pos = ELF_BR_OFFSET(7);
1919 pos = ELF_AR_CSD_OFFSET;
1922 pos = ELF_AR_SSD_OFFSET;
1927 struct unw_frame_info info;
1929 memset(&info, 0, sizeof(info));
1930 unw_init_from_blocked_task(&info, child);
1931 if (unw_unwind_to_user(&info) < 0)
1934 return access_elf_reg(child, &info, pos, data, write_access);
1937 /* access debug registers */
1938 if (addr >= PT_IBR) {
1939 regnum = (addr - PT_IBR) >> 3;
1940 ptr = &child->thread.ibr[0];
1942 regnum = (addr - PT_DBR) >> 3;
1943 ptr = &child->thread.dbr[0];
1947 dprintk("ptrace: rejecting access to register "
1948 "address 0x%lx\n", addr);
1952 if (!(child->thread.flags & IA64_THREAD_DBG_VALID)) {
1953 child->thread.flags |= IA64_THREAD_DBG_VALID;
1954 memset(child->thread.dbr, 0,
1955 sizeof(child->thread.dbr));
1956 memset(child->thread.ibr, 0,
1957 sizeof(child->thread.ibr));
1962 if ((regnum & 1) && write_access) {
1963 /* don't let the user set kernel-level breakpoints: */
1964 *ptr = *data & ~(7UL << 56);
1974 static const struct user_regset native_regsets[] = {
1976 .core_note_type = NT_PRSTATUS,
1978 .size = sizeof(elf_greg_t), .align = sizeof(elf_greg_t),
1979 .regset_get = gpregs_get, .set = gpregs_set,
1980 .writeback = gpregs_writeback
1983 .core_note_type = NT_PRFPREG,
1985 .size = sizeof(elf_fpreg_t), .align = sizeof(elf_fpreg_t),
1986 .regset_get = fpregs_get, .set = fpregs_set, .active = fpregs_active
1990 static const struct user_regset_view user_ia64_view = {
1992 .e_machine = EM_IA_64,
1993 .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
1996 const struct user_regset_view *task_user_regset_view(struct task_struct *tsk)
1998 return &user_ia64_view;
2001 struct syscall_get_set_args {
2004 unsigned long *args;
2005 struct pt_regs *regs;
2009 static void syscall_get_set_args_cb(struct unw_frame_info *info, void *data)
2011 struct syscall_get_set_args *args = data;
2012 struct pt_regs *pt = args->regs;
2013 unsigned long *krbs, cfm, ndirty, nlocals, nouts;
2016 if (unw_unwind_to_user(info) < 0)
2020 * We get here via a few paths:
2021 * - break instruction: cfm is shared with caller.
2022 * syscall args are in out= regs, locals are non-empty.
2023 * - epsinstruction: cfm is set by br.call
2024 * locals don't exist.
2026 * For both cases argguments are reachable in cfm.sof - cfm.sol.
2027 * CFM: [ ... | sor: 17..14 | sol : 13..7 | sof : 6..0 ]
2030 nlocals = (cfm >> 7) & 0x7f; /* aka sol */
2031 nouts = (cfm & 0x7f) - nlocals; /* aka sof - sol */
2032 krbs = (unsigned long *)info->task + IA64_RBS_OFFSET/8;
2033 ndirty = ia64_rse_num_regs(krbs, krbs + (pt->loadrs >> 19));
2037 count = min_t(int, args->n, nouts);
2039 /* Iterate over outs. */
2040 for (i = 0; i < count; i++) {
2041 int j = ndirty + nlocals + i + args->i;
2043 *ia64_rse_skip_regs(krbs, j) = args->args[i];
2045 args->args[i] = *ia64_rse_skip_regs(krbs, j);
2049 while (i < args->n) {
2056 void ia64_syscall_get_set_arguments(struct task_struct *task,
2057 struct pt_regs *regs, unsigned long *args, int rw)
2059 struct syscall_get_set_args data = {
2067 if (task == current)
2068 unw_init_running(syscall_get_set_args_cb, &data);
2070 struct unw_frame_info ufi;
2071 memset(&ufi, 0, sizeof(ufi));
2072 unw_init_from_blocked_task(&ufi, task);
2073 syscall_get_set_args_cb(&ufi, &data);