1 // SPDX-License-Identifier: GPL-2.0
3 * Kernel support for the ptrace() and syscall tracing interfaces.
5 * Copyright (C) 1999-2005 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 * Copyright (C) 2006 Intel Co
8 * 2006-08-12 - IA64 Native Utrace implementation support added by
9 * Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
11 * Derived from the x86 and Alpha versions.
13 #include <linux/kernel.h>
14 #include <linux/sched.h>
15 #include <linux/sched/task.h>
16 #include <linux/sched/task_stack.h>
18 #include <linux/errno.h>
19 #include <linux/ptrace.h>
20 #include <linux/user.h>
21 #include <linux/security.h>
22 #include <linux/audit.h>
23 #include <linux/signal.h>
24 #include <linux/regset.h>
25 #include <linux/elf.h>
26 #include <linux/resume_user_mode.h>
28 #include <asm/processor.h>
29 #include <asm/ptrace_offsets.h>
31 #include <linux/uaccess.h>
32 #include <asm/unwind.h>
37 * Bits in the PSR that we allow ptrace() to change:
38 * be, up, ac, mfl, mfh (the user mask; five bits total)
39 * db (debug breakpoint fault; one bit)
40 * id (instruction debug fault disable; one bit)
41 * dd (data debug fault disable; one bit)
42 * ri (restart instruction; two bits)
43 * is (instruction set; one bit)
45 #define IPSR_MASK (IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS \
46 | IA64_PSR_ID | IA64_PSR_DD | IA64_PSR_RI)
48 #define MASK(nbits) ((1UL << (nbits)) - 1) /* mask with NBITS bits set */
49 #define PFM_MASK MASK(38)
51 #define PTRACE_DEBUG 0
54 # define dprintk(format...) printk(format)
57 # define dprintk(format...)
60 /* Return TRUE if PT was created due to kernel-entry via a system-call. */
63 in_syscall (struct pt_regs *pt)
65 return (long) pt->cr_ifs >= 0;
69 * Collect the NaT bits for r1-r31 from scratch_unat and return a NaT
70 * bitset where bit i is set iff the NaT bit of register i is set.
73 ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat)
75 # define GET_BITS(first, last, unat) \
77 unsigned long bit = ia64_unat_pos(&pt->r##first); \
78 unsigned long nbits = (last - first + 1); \
79 unsigned long mask = MASK(nbits) << first; \
82 dist = 64 + bit - first; \
85 ia64_rotr(unat, dist) & mask; \
90 * Registers that are stored consecutively in struct pt_regs
91 * can be handled in parallel. If the register order in
92 * struct_pt_regs changes, this code MUST be updated.
94 val = GET_BITS( 1, 1, scratch_unat);
95 val |= GET_BITS( 2, 3, scratch_unat);
96 val |= GET_BITS(12, 13, scratch_unat);
97 val |= GET_BITS(14, 14, scratch_unat);
98 val |= GET_BITS(15, 15, scratch_unat);
99 val |= GET_BITS( 8, 11, scratch_unat);
100 val |= GET_BITS(16, 31, scratch_unat);
107 * Set the NaT bits for the scratch registers according to NAT and
108 * return the resulting unat (assuming the scratch registers are
112 ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat)
114 # define PUT_BITS(first, last, nat) \
116 unsigned long bit = ia64_unat_pos(&pt->r##first); \
117 unsigned long nbits = (last - first + 1); \
118 unsigned long mask = MASK(nbits) << first; \
121 dist = 64 + bit - first; \
123 dist = bit - first; \
124 ia64_rotl(nat & mask, dist); \
126 unsigned long scratch_unat;
129 * Registers that are stored consecutively in struct pt_regs
130 * can be handled in parallel. If the register order in
131 * struct_pt_regs changes, this code MUST be updated.
133 scratch_unat = PUT_BITS( 1, 1, nat);
134 scratch_unat |= PUT_BITS( 2, 3, nat);
135 scratch_unat |= PUT_BITS(12, 13, nat);
136 scratch_unat |= PUT_BITS(14, 14, nat);
137 scratch_unat |= PUT_BITS(15, 15, nat);
138 scratch_unat |= PUT_BITS( 8, 11, nat);
139 scratch_unat |= PUT_BITS(16, 31, nat);
146 #define IA64_MLX_TEMPLATE 0x2
147 #define IA64_MOVL_OPCODE 6
150 ia64_increment_ip (struct pt_regs *regs)
152 unsigned long w0, ri = ia64_psr(regs)->ri + 1;
157 } else if (ri == 2) {
158 get_user(w0, (char __user *) regs->cr_iip + 0);
159 if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
161 * rfi'ing to slot 2 of an MLX bundle causes
162 * an illegal operation fault. We don't want
169 ia64_psr(regs)->ri = ri;
173 ia64_decrement_ip (struct pt_regs *regs)
175 unsigned long w0, ri = ia64_psr(regs)->ri - 1;
177 if (ia64_psr(regs)->ri == 0) {
180 get_user(w0, (char __user *) regs->cr_iip + 0);
181 if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
183 * rfi'ing to slot 2 of an MLX bundle causes
184 * an illegal operation fault. We don't want
190 ia64_psr(regs)->ri = ri;
194 * This routine is used to read an rnat bits that are stored on the
195 * kernel backing store. Since, in general, the alignment of the user
196 * and kernel are different, this is not completely trivial. In
197 * essence, we need to construct the user RNAT based on up to two
198 * kernel RNAT values and/or the RNAT value saved in the child's
203 * +--------+ <-- lowest address
210 * | slot01 | > child_regs->ar_rnat
212 * | slot02 | / kernel rbs
213 * +--------+ +--------+
214 * <- child_regs->ar_bspstore | slot61 | <-- krbs
215 * +- - - - + +--------+
217 * +- - - - + +--------+
219 * +- - - - + +--------+
221 * +- - - - + +--------+
226 * | slot01 | > child_stack->ar_rnat
230 * <--- child_stack->ar_bspstore
232 * The way to think of this code is as follows: bit 0 in the user rnat
233 * corresponds to some bit N (0 <= N <= 62) in one of the kernel rnat
234 * value. The kernel rnat value holding this bit is stored in
235 * variable rnat0. rnat1 is loaded with the kernel rnat value that
236 * form the upper bits of the user rnat value.
240 * o when reading the rnat "below" the first rnat slot on the kernel
241 * backing store, rnat0/rnat1 are set to 0 and the low order bits are
242 * merged in from pt->ar_rnat.
244 * o when reading the rnat "above" the last rnat slot on the kernel
245 * backing store, rnat0/rnat1 gets its value from sw->ar_rnat.
248 get_rnat (struct task_struct *task, struct switch_stack *sw,
249 unsigned long *krbs, unsigned long *urnat_addr,
250 unsigned long *urbs_end)
252 unsigned long rnat0 = 0, rnat1 = 0, urnat = 0, *slot0_kaddr;
253 unsigned long umask = 0, mask, m;
254 unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
255 long num_regs, nbits;
258 pt = task_pt_regs(task);
259 kbsp = (unsigned long *) sw->ar_bspstore;
260 ubspstore = (unsigned long *) pt->ar_bspstore;
262 if (urbs_end < urnat_addr)
263 nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_end);
268 * First, figure out which bit number slot 0 in user-land maps
269 * to in the kernel rnat. Do this by figuring out how many
270 * register slots we're beyond the user's backingstore and
271 * then computing the equivalent address in kernel space.
273 num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
274 slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
275 shift = ia64_rse_slot_num(slot0_kaddr);
276 rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
277 rnat0_kaddr = rnat1_kaddr - 64;
279 if (ubspstore + 63 > urnat_addr) {
280 /* some bits need to be merged in from pt->ar_rnat */
281 umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
282 urnat = (pt->ar_rnat & umask);
289 if (rnat0_kaddr >= kbsp)
291 else if (rnat0_kaddr > krbs)
292 rnat0 = *rnat0_kaddr;
293 urnat |= (rnat0 & m) >> shift;
295 m = mask >> (63 - shift);
296 if (rnat1_kaddr >= kbsp)
298 else if (rnat1_kaddr > krbs)
299 rnat1 = *rnat1_kaddr;
300 urnat |= (rnat1 & m) << (63 - shift);
305 * The reverse of get_rnat.
308 put_rnat (struct task_struct *task, struct switch_stack *sw,
309 unsigned long *krbs, unsigned long *urnat_addr, unsigned long urnat,
310 unsigned long *urbs_end)
312 unsigned long rnat0 = 0, rnat1 = 0, *slot0_kaddr, umask = 0, mask, m;
313 unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
314 long num_regs, nbits;
316 unsigned long cfm, *urbs_kargs;
318 pt = task_pt_regs(task);
319 kbsp = (unsigned long *) sw->ar_bspstore;
320 ubspstore = (unsigned long *) pt->ar_bspstore;
322 urbs_kargs = urbs_end;
323 if (in_syscall(pt)) {
325 * If entered via syscall, don't allow user to set rnat bits
329 urbs_kargs = ia64_rse_skip_regs(urbs_end, -(cfm & 0x7f));
332 if (urbs_kargs >= urnat_addr)
335 if ((urnat_addr - 63) >= urbs_kargs)
337 nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_kargs);
342 * First, figure out which bit number slot 0 in user-land maps
343 * to in the kernel rnat. Do this by figuring out how many
344 * register slots we're beyond the user's backingstore and
345 * then computing the equivalent address in kernel space.
347 num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
348 slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
349 shift = ia64_rse_slot_num(slot0_kaddr);
350 rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
351 rnat0_kaddr = rnat1_kaddr - 64;
353 if (ubspstore + 63 > urnat_addr) {
354 /* some bits need to be place in pt->ar_rnat: */
355 umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
356 pt->ar_rnat = (pt->ar_rnat & ~umask) | (urnat & umask);
362 * Note: Section 11.1 of the EAS guarantees that bit 63 of an
363 * rnat slot is ignored. so we don't have to clear it here.
365 rnat0 = (urnat << shift);
367 if (rnat0_kaddr >= kbsp)
368 sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat0 & m);
369 else if (rnat0_kaddr > krbs)
370 *rnat0_kaddr = ((*rnat0_kaddr & ~m) | (rnat0 & m));
372 rnat1 = (urnat >> (63 - shift));
373 m = mask >> (63 - shift);
374 if (rnat1_kaddr >= kbsp)
375 sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat1 & m);
376 else if (rnat1_kaddr > krbs)
377 *rnat1_kaddr = ((*rnat1_kaddr & ~m) | (rnat1 & m));
381 on_kernel_rbs (unsigned long addr, unsigned long bspstore,
382 unsigned long urbs_end)
384 unsigned long *rnat_addr = ia64_rse_rnat_addr((unsigned long *)
386 return (addr >= bspstore && addr <= (unsigned long) rnat_addr);
390 * Read a word from the user-level backing store of task CHILD. ADDR
391 * is the user-level address to read the word from, VAL a pointer to
392 * the return value, and USER_BSP gives the end of the user-level
393 * backing store (i.e., it's the address that would be in ar.bsp after
394 * the user executed a "cover" instruction).
396 * This routine takes care of accessing the kernel register backing
397 * store for those registers that got spilled there. It also takes
398 * care of calculating the appropriate RNaT collection words.
401 ia64_peek (struct task_struct *child, struct switch_stack *child_stack,
402 unsigned long user_rbs_end, unsigned long addr, long *val)
404 unsigned long *bspstore, *krbs, regnum, *laddr, *urbs_end, *rnat_addr;
405 struct pt_regs *child_regs;
409 urbs_end = (long *) user_rbs_end;
410 laddr = (unsigned long *) addr;
411 child_regs = task_pt_regs(child);
412 bspstore = (unsigned long *) child_regs->ar_bspstore;
413 krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
414 if (on_kernel_rbs(addr, (unsigned long) bspstore,
415 (unsigned long) urbs_end))
418 * Attempt to read the RBS in an area that's actually
419 * on the kernel RBS => read the corresponding bits in
422 rnat_addr = ia64_rse_rnat_addr(laddr);
423 ret = get_rnat(child, child_stack, krbs, rnat_addr, urbs_end);
425 if (laddr == rnat_addr) {
426 /* return NaT collection word itself */
431 if (((1UL << ia64_rse_slot_num(laddr)) & ret) != 0) {
433 * It is implementation dependent whether the
434 * data portion of a NaT value gets saved on a
435 * st8.spill or RSE spill (e.g., see EAS 2.6,
436 * 4.4.4.6 Register Spill and Fill). To get
437 * consistent behavior across all possible
438 * IA-64 implementations, we return zero in
445 if (laddr < urbs_end) {
447 * The desired word is on the kernel RBS and
450 regnum = ia64_rse_num_regs(bspstore, laddr);
451 *val = *ia64_rse_skip_regs(krbs, regnum);
455 copied = access_process_vm(child, addr, &ret, sizeof(ret), FOLL_FORCE);
456 if (copied != sizeof(ret))
463 ia64_poke (struct task_struct *child, struct switch_stack *child_stack,
464 unsigned long user_rbs_end, unsigned long addr, long val)
466 unsigned long *bspstore, *krbs, regnum, *laddr;
467 unsigned long *urbs_end = (long *) user_rbs_end;
468 struct pt_regs *child_regs;
470 laddr = (unsigned long *) addr;
471 child_regs = task_pt_regs(child);
472 bspstore = (unsigned long *) child_regs->ar_bspstore;
473 krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
474 if (on_kernel_rbs(addr, (unsigned long) bspstore,
475 (unsigned long) urbs_end))
478 * Attempt to write the RBS in an area that's actually
479 * on the kernel RBS => write the corresponding bits
482 if (ia64_rse_is_rnat_slot(laddr))
483 put_rnat(child, child_stack, krbs, laddr, val,
486 if (laddr < urbs_end) {
487 regnum = ia64_rse_num_regs(bspstore, laddr);
488 *ia64_rse_skip_regs(krbs, regnum) = val;
491 } else if (access_process_vm(child, addr, &val, sizeof(val),
492 FOLL_FORCE | FOLL_WRITE)
499 * Calculate the address of the end of the user-level register backing
500 * store. This is the address that would have been stored in ar.bsp
501 * if the user had executed a "cover" instruction right before
502 * entering the kernel. If CFMP is not NULL, it is used to return the
503 * "current frame mask" that was active at the time the kernel was
507 ia64_get_user_rbs_end (struct task_struct *child, struct pt_regs *pt,
510 unsigned long *krbs, *bspstore, cfm = pt->cr_ifs;
513 krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
514 bspstore = (unsigned long *) pt->ar_bspstore;
515 ndirty = ia64_rse_num_regs(krbs, krbs + (pt->loadrs >> 19));
518 ndirty += (cfm & 0x7f);
520 cfm &= ~(1UL << 63); /* clear valid bit */
524 return (unsigned long) ia64_rse_skip_regs(bspstore, ndirty);
528 * Synchronize (i.e, write) the RSE backing store living in kernel
529 * space to the VM of the CHILD task. SW and PT are the pointers to
530 * the switch_stack and pt_regs structures, respectively.
531 * USER_RBS_END is the user-level address at which the backing store
535 ia64_sync_user_rbs (struct task_struct *child, struct switch_stack *sw,
536 unsigned long user_rbs_start, unsigned long user_rbs_end)
538 unsigned long addr, val;
541 /* now copy word for word from kernel rbs to user rbs: */
542 for (addr = user_rbs_start; addr < user_rbs_end; addr += 8) {
543 ret = ia64_peek(child, sw, user_rbs_end, addr, &val);
546 if (access_process_vm(child, addr, &val, sizeof(val),
547 FOLL_FORCE | FOLL_WRITE)
555 ia64_sync_kernel_rbs (struct task_struct *child, struct switch_stack *sw,
556 unsigned long user_rbs_start, unsigned long user_rbs_end)
558 unsigned long addr, val;
561 /* now copy word for word from user rbs to kernel rbs: */
562 for (addr = user_rbs_start; addr < user_rbs_end; addr += 8) {
563 if (access_process_vm(child, addr, &val, sizeof(val),
568 ret = ia64_poke(child, sw, user_rbs_end, addr, val);
575 typedef long (*syncfunc_t)(struct task_struct *, struct switch_stack *,
576 unsigned long, unsigned long);
578 static void do_sync_rbs(struct unw_frame_info *info, void *arg)
581 unsigned long urbs_end;
584 if (unw_unwind_to_user(info) < 0)
586 pt = task_pt_regs(info->task);
587 urbs_end = ia64_get_user_rbs_end(info->task, pt, NULL);
589 fn(info->task, info->sw, pt->ar_bspstore, urbs_end);
593 * when a thread is stopped (ptraced), debugger might change thread's user
594 * stack (change memory directly), and we must avoid the RSE stored in kernel
595 * to override user stack (user space's RSE is newer than kernel's in the
596 * case). To workaround the issue, we copy kernel RSE to user RSE before the
597 * task is stopped, so user RSE has updated data. we then copy user RSE to
598 * kernel after the task is resummed from traced stop and kernel will use the
599 * newer RSE to return to user. TIF_RESTORE_RSE is the flag to indicate we need
600 * synchronize user RSE to kernel.
602 void ia64_ptrace_stop(void)
604 if (test_and_set_tsk_thread_flag(current, TIF_RESTORE_RSE))
606 set_notify_resume(current);
607 unw_init_running(do_sync_rbs, ia64_sync_user_rbs);
611 * This is called to read back the register backing store.
613 void ia64_sync_krbs(void)
615 clear_tsk_thread_flag(current, TIF_RESTORE_RSE);
617 unw_init_running(do_sync_rbs, ia64_sync_kernel_rbs);
621 * Write f32-f127 back to task->thread.fph if it has been modified.
624 ia64_flush_fph (struct task_struct *task)
626 struct ia64_psr *psr = ia64_psr(task_pt_regs(task));
629 * Prevent migrating this task while
630 * we're fiddling with the FPU state
633 if (ia64_is_local_fpu_owner(task) && psr->mfh) {
635 task->thread.flags |= IA64_THREAD_FPH_VALID;
636 ia64_save_fpu(&task->thread.fph[0]);
642 * Sync the fph state of the task so that it can be manipulated
643 * through thread.fph. If necessary, f32-f127 are written back to
644 * thread.fph or, if the fph state hasn't been used before, thread.fph
645 * is cleared to zeroes. Also, access to f32-f127 is disabled to
646 * ensure that the task picks up the state from thread.fph when it
650 ia64_sync_fph (struct task_struct *task)
652 struct ia64_psr *psr = ia64_psr(task_pt_regs(task));
654 ia64_flush_fph(task);
655 if (!(task->thread.flags & IA64_THREAD_FPH_VALID)) {
656 task->thread.flags |= IA64_THREAD_FPH_VALID;
657 memset(&task->thread.fph, 0, sizeof(task->thread.fph));
664 * Change the machine-state of CHILD such that it will return via the normal
665 * kernel exit-path, rather than the syscall-exit path.
668 convert_to_non_syscall (struct task_struct *child, struct pt_regs *pt,
671 struct unw_frame_info info, prev_info;
672 unsigned long ip, sp, pr;
674 unw_init_from_blocked_task(&info, child);
677 if (unw_unwind(&info) < 0)
680 unw_get_sp(&info, &sp);
681 if ((long)((unsigned long)child + IA64_STK_OFFSET - sp)
682 < IA64_PT_REGS_SIZE) {
683 dprintk("ptrace.%s: ran off the top of the kernel "
684 "stack\n", __func__);
687 if (unw_get_pr (&prev_info, &pr) < 0) {
688 unw_get_rp(&prev_info, &ip);
689 dprintk("ptrace.%s: failed to read "
690 "predicate register (ip=0x%lx)\n",
694 if (unw_is_intr_frame(&info)
695 && (pr & (1UL << PRED_USER_STACK)))
700 * Note: at the time of this call, the target task is blocked
701 * in notify_resume_user() and by clearling PRED_LEAVE_SYSCALL
702 * (aka, "pLvSys") we redirect execution from
703 * .work_pending_syscall_end to .work_processed_kernel.
705 unw_get_pr(&prev_info, &pr);
706 pr &= ~((1UL << PRED_SYSCALL) | (1UL << PRED_LEAVE_SYSCALL));
707 pr |= (1UL << PRED_NON_SYSCALL);
708 unw_set_pr(&prev_info, pr);
710 pt->cr_ifs = (1UL << 63) | cfm;
712 * Clear the memory that is NOT written on syscall-entry to
713 * ensure we do not leak kernel-state to user when execution
719 memset(&pt->r16, 0, 16*8); /* clear r16-r31 */
720 memset(&pt->f6, 0, 6*16); /* clear f6-f11 */
728 access_nat_bits (struct task_struct *child, struct pt_regs *pt,
729 struct unw_frame_info *info,
730 unsigned long *data, int write_access)
732 unsigned long regnum, nat_bits, scratch_unat, dummy = 0;
737 scratch_unat = ia64_put_scratch_nat_bits(pt, nat_bits);
738 if (unw_set_ar(info, UNW_AR_UNAT, scratch_unat) < 0) {
739 dprintk("ptrace: failed to set ar.unat\n");
742 for (regnum = 4; regnum <= 7; ++regnum) {
743 unw_get_gr(info, regnum, &dummy, &nat);
744 unw_set_gr(info, regnum, dummy,
745 (nat_bits >> regnum) & 1);
748 if (unw_get_ar(info, UNW_AR_UNAT, &scratch_unat) < 0) {
749 dprintk("ptrace: failed to read ar.unat\n");
752 nat_bits = ia64_get_scratch_nat_bits(pt, scratch_unat);
753 for (regnum = 4; regnum <= 7; ++regnum) {
754 unw_get_gr(info, regnum, &dummy, &nat);
755 nat_bits |= (nat != 0) << regnum;
763 access_elf_reg(struct task_struct *target, struct unw_frame_info *info,
764 unsigned long addr, unsigned long *data, int write_access);
767 ptrace_getregs (struct task_struct *child, struct pt_all_user_regs __user *ppr)
769 unsigned long psr, ec, lc, rnat, bsp, cfm, nat_bits, val;
770 struct unw_frame_info info;
771 struct ia64_fpreg fpval;
772 struct switch_stack *sw;
774 long ret, retval = 0;
778 if (!access_ok(ppr, sizeof(struct pt_all_user_regs)))
781 pt = task_pt_regs(child);
782 sw = (struct switch_stack *) (child->thread.ksp + 16);
783 unw_init_from_blocked_task(&info, child);
784 if (unw_unwind_to_user(&info) < 0) {
788 if (((unsigned long) ppr & 0x7) != 0) {
789 dprintk("ptrace:unaligned register address %p\n", ppr);
793 if (access_elf_reg(child, &info, ELF_CR_IPSR_OFFSET, &psr, 0) < 0 ||
794 access_elf_reg(child, &info, ELF_AR_EC_OFFSET, &ec, 0) < 0 ||
795 access_elf_reg(child, &info, ELF_AR_LC_OFFSET, &lc, 0) < 0 ||
796 access_elf_reg(child, &info, ELF_AR_RNAT_OFFSET, &rnat, 0) < 0 ||
797 access_elf_reg(child, &info, ELF_AR_BSP_OFFSET, &bsp, 0) < 0 ||
798 access_elf_reg(child, &info, ELF_CFM_OFFSET, &cfm, 0) < 0 ||
799 access_elf_reg(child, &info, ELF_NAT_OFFSET, &nat_bits, 0) < 0)
804 retval |= __put_user(pt->cr_iip, &ppr->cr_iip);
805 retval |= __put_user(psr, &ppr->cr_ipsr);
809 retval |= __put_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
810 retval |= __put_user(pt->ar_rsc, &ppr->ar[PT_AUR_RSC]);
811 retval |= __put_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
812 retval |= __put_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
813 retval |= __put_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
814 retval |= __put_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
816 retval |= __put_user(ec, &ppr->ar[PT_AUR_EC]);
817 retval |= __put_user(lc, &ppr->ar[PT_AUR_LC]);
818 retval |= __put_user(rnat, &ppr->ar[PT_AUR_RNAT]);
819 retval |= __put_user(bsp, &ppr->ar[PT_AUR_BSP]);
820 retval |= __put_user(cfm, &ppr->cfm);
824 retval |= __copy_to_user(&ppr->gr[1], &pt->r1, sizeof(long));
825 retval |= __copy_to_user(&ppr->gr[2], &pt->r2, sizeof(long) *2);
829 for (i = 4; i < 8; i++) {
830 if (unw_access_gr(&info, i, &val, &nat, 0) < 0)
832 retval |= __put_user(val, &ppr->gr[i]);
837 retval |= __copy_to_user(&ppr->gr[8], &pt->r8, sizeof(long) * 4);
841 retval |= __copy_to_user(&ppr->gr[12], &pt->r12, sizeof(long) * 2);
842 retval |= __copy_to_user(&ppr->gr[14], &pt->r14, sizeof(long));
843 retval |= __copy_to_user(&ppr->gr[15], &pt->r15, sizeof(long));
847 retval |= __copy_to_user(&ppr->gr[16], &pt->r16, sizeof(long) * 16);
851 retval |= __put_user(pt->b0, &ppr->br[0]);
855 for (i = 1; i < 6; i++) {
856 if (unw_access_br(&info, i, &val, 0) < 0)
858 __put_user(val, &ppr->br[i]);
863 retval |= __put_user(pt->b6, &ppr->br[6]);
864 retval |= __put_user(pt->b7, &ppr->br[7]);
868 for (i = 2; i < 6; i++) {
869 if (unw_get_fr(&info, i, &fpval) < 0)
871 retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval));
876 retval |= __copy_to_user(&ppr->fr[6], &pt->f6,
877 sizeof(struct ia64_fpreg) * 6);
879 /* fp scratch regs(12-15) */
881 retval |= __copy_to_user(&ppr->fr[12], &sw->f12,
882 sizeof(struct ia64_fpreg) * 4);
886 for (i = 16; i < 32; i++) {
887 if (unw_get_fr(&info, i, &fpval) < 0)
889 retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval));
894 ia64_flush_fph(child);
895 retval |= __copy_to_user(&ppr->fr[32], &child->thread.fph,
896 sizeof(ppr->fr[32]) * 96);
900 retval |= __put_user(pt->pr, &ppr->pr);
904 retval |= __put_user(nat_bits, &ppr->nat);
906 ret = retval ? -EIO : 0;
911 ptrace_setregs (struct task_struct *child, struct pt_all_user_regs __user *ppr)
913 unsigned long psr, rsc, ec, lc, rnat, bsp, cfm, nat_bits, val = 0;
914 struct unw_frame_info info;
915 struct switch_stack *sw;
916 struct ia64_fpreg fpval;
921 memset(&fpval, 0, sizeof(fpval));
923 if (!access_ok(ppr, sizeof(struct pt_all_user_regs)))
926 pt = task_pt_regs(child);
927 sw = (struct switch_stack *) (child->thread.ksp + 16);
928 unw_init_from_blocked_task(&info, child);
929 if (unw_unwind_to_user(&info) < 0) {
933 if (((unsigned long) ppr & 0x7) != 0) {
934 dprintk("ptrace:unaligned register address %p\n", ppr);
940 retval |= __get_user(pt->cr_iip, &ppr->cr_iip);
941 retval |= __get_user(psr, &ppr->cr_ipsr);
945 retval |= __get_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
946 retval |= __get_user(rsc, &ppr->ar[PT_AUR_RSC]);
947 retval |= __get_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
948 retval |= __get_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
949 retval |= __get_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
950 retval |= __get_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
952 retval |= __get_user(ec, &ppr->ar[PT_AUR_EC]);
953 retval |= __get_user(lc, &ppr->ar[PT_AUR_LC]);
954 retval |= __get_user(rnat, &ppr->ar[PT_AUR_RNAT]);
955 retval |= __get_user(bsp, &ppr->ar[PT_AUR_BSP]);
956 retval |= __get_user(cfm, &ppr->cfm);
960 retval |= __copy_from_user(&pt->r1, &ppr->gr[1], sizeof(long));
961 retval |= __copy_from_user(&pt->r2, &ppr->gr[2], sizeof(long) * 2);
965 for (i = 4; i < 8; i++) {
966 retval |= __get_user(val, &ppr->gr[i]);
967 /* NaT bit will be set via PT_NAT_BITS: */
968 if (unw_set_gr(&info, i, val, 0) < 0)
974 retval |= __copy_from_user(&pt->r8, &ppr->gr[8], sizeof(long) * 4);
978 retval |= __copy_from_user(&pt->r12, &ppr->gr[12], sizeof(long) * 2);
979 retval |= __copy_from_user(&pt->r14, &ppr->gr[14], sizeof(long));
980 retval |= __copy_from_user(&pt->r15, &ppr->gr[15], sizeof(long));
984 retval |= __copy_from_user(&pt->r16, &ppr->gr[16], sizeof(long) * 16);
988 retval |= __get_user(pt->b0, &ppr->br[0]);
992 for (i = 1; i < 6; i++) {
993 retval |= __get_user(val, &ppr->br[i]);
994 unw_set_br(&info, i, val);
999 retval |= __get_user(pt->b6, &ppr->br[6]);
1000 retval |= __get_user(pt->b7, &ppr->br[7]);
1004 for (i = 2; i < 6; i++) {
1005 retval |= __copy_from_user(&fpval, &ppr->fr[i], sizeof(fpval));
1006 if (unw_set_fr(&info, i, fpval) < 0)
1012 retval |= __copy_from_user(&pt->f6, &ppr->fr[6],
1013 sizeof(ppr->fr[6]) * 6);
1015 /* fp scratch regs(12-15) */
1017 retval |= __copy_from_user(&sw->f12, &ppr->fr[12],
1018 sizeof(ppr->fr[12]) * 4);
1022 for (i = 16; i < 32; i++) {
1023 retval |= __copy_from_user(&fpval, &ppr->fr[i],
1025 if (unw_set_fr(&info, i, fpval) < 0)
1031 ia64_sync_fph(child);
1032 retval |= __copy_from_user(&child->thread.fph, &ppr->fr[32],
1033 sizeof(ppr->fr[32]) * 96);
1037 retval |= __get_user(pt->pr, &ppr->pr);
1041 retval |= __get_user(nat_bits, &ppr->nat);
1043 retval |= access_elf_reg(child, &info, ELF_CR_IPSR_OFFSET, &psr, 1);
1044 retval |= access_elf_reg(child, &info, ELF_AR_RSC_OFFSET, &rsc, 1);
1045 retval |= access_elf_reg(child, &info, ELF_AR_EC_OFFSET, &ec, 1);
1046 retval |= access_elf_reg(child, &info, ELF_AR_LC_OFFSET, &lc, 1);
1047 retval |= access_elf_reg(child, &info, ELF_AR_RNAT_OFFSET, &rnat, 1);
1048 retval |= access_elf_reg(child, &info, ELF_AR_BSP_OFFSET, &bsp, 1);
1049 retval |= access_elf_reg(child, &info, ELF_CFM_OFFSET, &cfm, 1);
1050 retval |= access_elf_reg(child, &info, ELF_NAT_OFFSET, &nat_bits, 1);
1052 return retval ? -EIO : 0;
1056 user_enable_single_step (struct task_struct *child)
1058 struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
1060 set_tsk_thread_flag(child, TIF_SINGLESTEP);
1065 user_enable_block_step (struct task_struct *child)
1067 struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
1069 set_tsk_thread_flag(child, TIF_SINGLESTEP);
1074 user_disable_single_step (struct task_struct *child)
1076 struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
1078 /* make sure the single step/taken-branch trap bits are not set: */
1079 clear_tsk_thread_flag(child, TIF_SINGLESTEP);
1085 * Called by kernel/ptrace.c when detaching..
1087 * Make sure the single step bit is not set.
1090 ptrace_disable (struct task_struct *child)
1092 user_disable_single_step(child);
1096 access_uarea (struct task_struct *child, unsigned long addr,
1097 unsigned long *data, int write_access);
1100 arch_ptrace (struct task_struct *child, long request,
1101 unsigned long addr, unsigned long data)
1104 case PTRACE_PEEKTEXT:
1105 case PTRACE_PEEKDATA:
1106 /* read word at location addr */
1107 if (ptrace_access_vm(child, addr, &data, sizeof(data),
1111 /* ensure return value is not mistaken for error code */
1112 force_successful_syscall_return();
1115 /* PTRACE_POKETEXT and PTRACE_POKEDATA is handled
1116 * by the generic ptrace_request().
1119 case PTRACE_PEEKUSR:
1120 /* read the word at addr in the USER area */
1121 if (access_uarea(child, addr, &data, 0) < 0)
1123 /* ensure return value is not mistaken for error code */
1124 force_successful_syscall_return();
1127 case PTRACE_POKEUSR:
1128 /* write the word at addr in the USER area */
1129 if (access_uarea(child, addr, &data, 1) < 0)
1133 case PTRACE_OLD_GETSIGINFO:
1134 /* for backwards-compatibility */
1135 return ptrace_request(child, PTRACE_GETSIGINFO, addr, data);
1137 case PTRACE_OLD_SETSIGINFO:
1138 /* for backwards-compatibility */
1139 return ptrace_request(child, PTRACE_SETSIGINFO, addr, data);
1141 case PTRACE_GETREGS:
1142 return ptrace_getregs(child,
1143 (struct pt_all_user_regs __user *) data);
1145 case PTRACE_SETREGS:
1146 return ptrace_setregs(child,
1147 (struct pt_all_user_regs __user *) data);
1150 return ptrace_request(child, request, addr, data);
1155 /* "asmlinkage" so the input arguments are preserved... */
1158 syscall_trace_enter (long arg0, long arg1, long arg2, long arg3,
1159 long arg4, long arg5, long arg6, long arg7,
1160 struct pt_regs regs)
1162 if (test_thread_flag(TIF_SYSCALL_TRACE))
1163 if (ptrace_report_syscall_entry(®s))
1166 /* copy user rbs to kernel rbs */
1167 if (test_thread_flag(TIF_RESTORE_RSE))
1171 audit_syscall_entry(regs.r15, arg0, arg1, arg2, arg3);
1176 /* "asmlinkage" so the input arguments are preserved... */
1179 syscall_trace_leave (long arg0, long arg1, long arg2, long arg3,
1180 long arg4, long arg5, long arg6, long arg7,
1181 struct pt_regs regs)
1185 audit_syscall_exit(®s);
1187 step = test_thread_flag(TIF_SINGLESTEP);
1188 if (step || test_thread_flag(TIF_SYSCALL_TRACE))
1189 ptrace_report_syscall_exit(®s, step);
1191 /* copy user rbs to kernel rbs */
1192 if (test_thread_flag(TIF_RESTORE_RSE))
1196 /* Utrace implementation starts here */
1204 const void __user *ubuf;
1207 struct regset_getset {
1208 struct task_struct *target;
1209 const struct user_regset *regset;
1211 struct regset_get get;
1212 struct regset_set set;
1219 static const ptrdiff_t pt_offsets[32] =
1221 #define R(n) offsetof(struct pt_regs, r##n)
1222 [0] = -1, R(1), R(2), R(3),
1223 [4] = -1, [5] = -1, [6] = -1, [7] = -1,
1224 R(8), R(9), R(10), R(11), R(12), R(13), R(14), R(15),
1225 R(16), R(17), R(18), R(19), R(20), R(21), R(22), R(23),
1226 R(24), R(25), R(26), R(27), R(28), R(29), R(30), R(31),
1231 access_elf_gpreg(struct task_struct *target, struct unw_frame_info *info,
1232 unsigned long addr, unsigned long *data, int write_access)
1234 struct pt_regs *pt = task_pt_regs(target);
1235 unsigned reg = addr / sizeof(unsigned long);
1236 ptrdiff_t d = pt_offsets[reg];
1239 unsigned long *ptr = (void *)pt + d;
1248 /* read NaT bit first: */
1249 unsigned long dummy;
1250 int ret = unw_get_gr(info, reg, &dummy, &nat);
1254 return unw_access_gr(info, reg, data, &nat, write_access);
1259 access_elf_breg(struct task_struct *target, struct unw_frame_info *info,
1260 unsigned long addr, unsigned long *data, int write_access)
1263 unsigned long *ptr = NULL;
1265 pt = task_pt_regs(target);
1267 case ELF_BR_OFFSET(0):
1270 case ELF_BR_OFFSET(1) ... ELF_BR_OFFSET(5):
1271 return unw_access_br(info, (addr - ELF_BR_OFFSET(0))/8,
1272 data, write_access);
1273 case ELF_BR_OFFSET(6):
1276 case ELF_BR_OFFSET(7):
1287 access_elf_areg(struct task_struct *target, struct unw_frame_info *info,
1288 unsigned long addr, unsigned long *data, int write_access)
1291 unsigned long cfm, urbs_end;
1292 unsigned long *ptr = NULL;
1294 pt = task_pt_regs(target);
1295 if (addr >= ELF_AR_RSC_OFFSET && addr <= ELF_AR_SSD_OFFSET) {
1297 case ELF_AR_RSC_OFFSET:
1300 pt->ar_rsc = *data | (3 << 2);
1304 case ELF_AR_BSP_OFFSET:
1306 * By convention, we use PT_AR_BSP to refer to
1307 * the end of the user-level backing store.
1308 * Use ia64_rse_skip_regs(PT_AR_BSP, -CFM.sof)
1309 * to get the real value of ar.bsp at the time
1310 * the kernel was entered.
1312 * Furthermore, when changing the contents of
1313 * PT_AR_BSP (or PT_CFM) while the task is
1314 * blocked in a system call, convert the state
1315 * so that the non-system-call exit
1316 * path is used. This ensures that the proper
1317 * state will be picked up when resuming
1318 * execution. However, it *also* means that
1319 * once we write PT_AR_BSP/PT_CFM, it won't be
1320 * possible to modify the syscall arguments of
1321 * the pending system call any longer. This
1322 * shouldn't be an issue because modifying
1323 * PT_AR_BSP/PT_CFM generally implies that
1324 * we're either abandoning the pending system
1325 * call or that we defer it's re-execution
1326 * (e.g., due to GDB doing an inferior
1329 urbs_end = ia64_get_user_rbs_end(target, pt, &cfm);
1331 if (*data != urbs_end) {
1333 convert_to_non_syscall(target,
1337 * Simulate user-level write
1341 pt->ar_bspstore = *data;
1346 case ELF_AR_BSPSTORE_OFFSET:
1347 ptr = &pt->ar_bspstore;
1349 case ELF_AR_RNAT_OFFSET:
1352 case ELF_AR_CCV_OFFSET:
1355 case ELF_AR_UNAT_OFFSET:
1358 case ELF_AR_FPSR_OFFSET:
1361 case ELF_AR_PFS_OFFSET:
1364 case ELF_AR_LC_OFFSET:
1365 return unw_access_ar(info, UNW_AR_LC, data,
1367 case ELF_AR_EC_OFFSET:
1368 return unw_access_ar(info, UNW_AR_EC, data,
1370 case ELF_AR_CSD_OFFSET:
1373 case ELF_AR_SSD_OFFSET:
1376 } else if (addr >= ELF_CR_IIP_OFFSET && addr <= ELF_CR_IPSR_OFFSET) {
1378 case ELF_CR_IIP_OFFSET:
1381 case ELF_CFM_OFFSET:
1382 urbs_end = ia64_get_user_rbs_end(target, pt, &cfm);
1384 if (((cfm ^ *data) & PFM_MASK) != 0) {
1386 convert_to_non_syscall(target,
1389 pt->cr_ifs = ((pt->cr_ifs & ~PFM_MASK)
1390 | (*data & PFM_MASK));
1395 case ELF_CR_IPSR_OFFSET:
1397 unsigned long tmp = *data;
1398 /* psr.ri==3 is a reserved value: SDM 2:25 */
1399 if ((tmp & IA64_PSR_RI) == IA64_PSR_RI)
1400 tmp &= ~IA64_PSR_RI;
1401 pt->cr_ipsr = ((tmp & IPSR_MASK)
1402 | (pt->cr_ipsr & ~IPSR_MASK));
1404 *data = (pt->cr_ipsr & IPSR_MASK);
1407 } else if (addr == ELF_NAT_OFFSET)
1408 return access_nat_bits(target, pt, info,
1409 data, write_access);
1410 else if (addr == ELF_PR_OFFSET)
1424 access_elf_reg(struct task_struct *target, struct unw_frame_info *info,
1425 unsigned long addr, unsigned long *data, int write_access)
1427 if (addr >= ELF_GR_OFFSET(1) && addr <= ELF_GR_OFFSET(31))
1428 return access_elf_gpreg(target, info, addr, data, write_access);
1429 else if (addr >= ELF_BR_OFFSET(0) && addr <= ELF_BR_OFFSET(7))
1430 return access_elf_breg(target, info, addr, data, write_access);
1432 return access_elf_areg(target, info, addr, data, write_access);
1435 struct regset_membuf {
1440 static void do_gpregs_get(struct unw_frame_info *info, void *arg)
1442 struct regset_membuf *dst = arg;
1443 struct membuf to = dst->to;
1447 if (unw_unwind_to_user(info) < 0)
1453 * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
1454 * predicate registers (p0-p63)
1457 * ar.rsc ar.bsp ar.bspstore ar.rnat
1458 * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
1463 membuf_zero(&to, 8);
1464 for (n = 8; to.left && n < ELF_AR_END_OFFSET; n += 8) {
1465 if (access_elf_reg(info->task, info, n, ®, 0) < 0) {
1469 membuf_store(&to, reg);
1473 static void do_gpregs_set(struct unw_frame_info *info, void *arg)
1475 struct regset_getset *dst = arg;
1477 if (unw_unwind_to_user(info) < 0)
1483 if (dst->pos < ELF_GR_OFFSET(1)) {
1484 dst->ret = user_regset_copyin_ignore(&dst->pos, &dst->count,
1487 0, ELF_GR_OFFSET(1));
1492 while (dst->count && dst->pos < ELF_AR_END_OFFSET) {
1493 unsigned int n, from, to;
1497 to = from + sizeof(tmp);
1498 if (to > ELF_AR_END_OFFSET)
1499 to = ELF_AR_END_OFFSET;
1500 /* get up to 16 values */
1501 dst->ret = user_regset_copyin(&dst->pos, &dst->count,
1502 &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
1506 /* now copy them into registers */
1507 for (n = 0; from < dst->pos; from += sizeof(elf_greg_t), n++)
1508 if (access_elf_reg(dst->target, info, from,
1516 #define ELF_FP_OFFSET(i) (i * sizeof(elf_fpreg_t))
1518 static void do_fpregs_get(struct unw_frame_info *info, void *arg)
1520 struct task_struct *task = info->task;
1521 struct regset_membuf *dst = arg;
1522 struct membuf to = dst->to;
1526 if (unw_unwind_to_user(info) < 0)
1529 /* Skip pos 0 and 1 */
1530 membuf_zero(&to, 2 * sizeof(elf_fpreg_t));
1533 for (n = 2; to.left && n < 32; n++) {
1534 if (unw_get_fr(info, n, ®)) {
1538 membuf_write(&to, ®, sizeof(reg));
1545 ia64_flush_fph(task);
1546 if (task->thread.flags & IA64_THREAD_FPH_VALID)
1547 membuf_write(&to, &task->thread.fph, 96 * sizeof(reg));
1549 membuf_zero(&to, 96 * sizeof(reg));
1552 static void do_fpregs_set(struct unw_frame_info *info, void *arg)
1554 struct regset_getset *dst = arg;
1555 elf_fpreg_t fpreg, tmp[30];
1556 int index, start, end;
1558 if (unw_unwind_to_user(info) < 0)
1561 /* Skip pos 0 and 1 */
1562 if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(2)) {
1563 dst->ret = user_regset_copyin_ignore(&dst->pos, &dst->count,
1566 0, ELF_FP_OFFSET(2));
1567 if (dst->count == 0 || dst->ret)
1572 if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(32)) {
1574 end = min(((unsigned int)ELF_FP_OFFSET(32)),
1575 dst->pos + dst->count);
1576 dst->ret = user_regset_copyin(&dst->pos, &dst->count,
1577 &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
1578 ELF_FP_OFFSET(2), ELF_FP_OFFSET(32));
1582 if (start & 0xF) { /* only write high part */
1583 if (unw_get_fr(info, start / sizeof(elf_fpreg_t),
1588 tmp[start / sizeof(elf_fpreg_t) - 2].u.bits[0]
1592 if (end & 0xF) { /* only write low part */
1593 if (unw_get_fr(info, end / sizeof(elf_fpreg_t),
1598 tmp[end / sizeof(elf_fpreg_t) - 2].u.bits[1]
1600 end = (end + 0xF) & ~0xFUL;
1603 for ( ; start < end ; start += sizeof(elf_fpreg_t)) {
1604 index = start / sizeof(elf_fpreg_t);
1605 if (unw_set_fr(info, index, tmp[index - 2])) {
1610 if (dst->ret || dst->count == 0)
1615 if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(128)) {
1616 ia64_sync_fph(dst->target);
1617 dst->ret = user_regset_copyin(&dst->pos, &dst->count,
1620 &dst->target->thread.fph,
1621 ELF_FP_OFFSET(32), -1);
1626 unwind_and_call(void (*call)(struct unw_frame_info *, void *),
1627 struct task_struct *target, void *data)
1629 if (target == current)
1630 unw_init_running(call, data);
1632 struct unw_frame_info info;
1633 memset(&info, 0, sizeof(info));
1634 unw_init_from_blocked_task(&info, target);
1635 (*call)(&info, data);
1640 do_regset_call(void (*call)(struct unw_frame_info *, void *),
1641 struct task_struct *target,
1642 const struct user_regset *regset,
1643 unsigned int pos, unsigned int count,
1644 const void *kbuf, const void __user *ubuf)
1646 struct regset_getset info = { .target = target, .regset = regset,
1647 .pos = pos, .count = count,
1648 .u.set = { .kbuf = kbuf, .ubuf = ubuf },
1650 unwind_and_call(call, target, &info);
1655 gpregs_get(struct task_struct *target,
1656 const struct user_regset *regset,
1659 struct regset_membuf info = {.to = to};
1660 unwind_and_call(do_gpregs_get, target, &info);
1664 static int gpregs_set(struct task_struct *target,
1665 const struct user_regset *regset,
1666 unsigned int pos, unsigned int count,
1667 const void *kbuf, const void __user *ubuf)
1669 return do_regset_call(do_gpregs_set, target, regset, pos, count,
1673 static void do_gpregs_writeback(struct unw_frame_info *info, void *arg)
1675 do_sync_rbs(info, ia64_sync_user_rbs);
1679 * This is called to write back the register backing store.
1680 * ptrace does this before it stops, so that a tracer reading the user
1681 * memory after the thread stops will get the current register data.
1684 gpregs_writeback(struct task_struct *target,
1685 const struct user_regset *regset,
1688 if (test_and_set_tsk_thread_flag(target, TIF_RESTORE_RSE))
1690 set_notify_resume(target);
1691 return do_regset_call(do_gpregs_writeback, target, regset, 0, 0,
1696 fpregs_active(struct task_struct *target, const struct user_regset *regset)
1698 return (target->thread.flags & IA64_THREAD_FPH_VALID) ? 128 : 32;
1701 static int fpregs_get(struct task_struct *target,
1702 const struct user_regset *regset,
1705 struct regset_membuf info = {.to = to};
1706 unwind_and_call(do_fpregs_get, target, &info);
1710 static int fpregs_set(struct task_struct *target,
1711 const struct user_regset *regset,
1712 unsigned int pos, unsigned int count,
1713 const void *kbuf, const void __user *ubuf)
1715 return do_regset_call(do_fpregs_set, target, regset, pos, count,
1720 access_uarea(struct task_struct *child, unsigned long addr,
1721 unsigned long *data, int write_access)
1723 unsigned int pos = -1; /* an invalid value */
1724 unsigned long *ptr, regnum;
1726 if ((addr & 0x7) != 0) {
1727 dprintk("ptrace: unaligned register address 0x%lx\n", addr);
1730 if ((addr >= PT_NAT_BITS + 8 && addr < PT_F2) ||
1731 (addr >= PT_R7 + 8 && addr < PT_B1) ||
1732 (addr >= PT_AR_LC + 8 && addr < PT_CR_IPSR) ||
1733 (addr >= PT_AR_SSD + 8 && addr < PT_DBR)) {
1734 dprintk("ptrace: rejecting access to register "
1735 "address 0x%lx\n", addr);
1740 case PT_F32 ... (PT_F127 + 15):
1741 pos = addr - PT_F32 + ELF_FP_OFFSET(32);
1743 case PT_F2 ... (PT_F5 + 15):
1744 pos = addr - PT_F2 + ELF_FP_OFFSET(2);
1746 case PT_F10 ... (PT_F31 + 15):
1747 pos = addr - PT_F10 + ELF_FP_OFFSET(10);
1749 case PT_F6 ... (PT_F9 + 15):
1750 pos = addr - PT_F6 + ELF_FP_OFFSET(6);
1755 unsigned reg = pos / sizeof(elf_fpreg_t);
1756 int which_half = (pos / sizeof(unsigned long)) & 1;
1758 if (reg < 32) { /* fr2-fr31 */
1759 struct unw_frame_info info;
1762 memset(&info, 0, sizeof(info));
1763 unw_init_from_blocked_task(&info, child);
1764 if (unw_unwind_to_user(&info) < 0)
1767 if (unw_get_fr(&info, reg, &fpreg))
1770 fpreg.u.bits[which_half] = *data;
1771 if (unw_set_fr(&info, reg, fpreg))
1774 *data = fpreg.u.bits[which_half];
1777 elf_fpreg_t *p = &child->thread.fph[reg - 32];
1778 unsigned long *bits = &p->u.bits[which_half];
1780 ia64_sync_fph(child);
1783 else if (child->thread.flags & IA64_THREAD_FPH_VALID)
1793 pos = ELF_NAT_OFFSET;
1795 case PT_R4 ... PT_R7:
1796 pos = addr - PT_R4 + ELF_GR_OFFSET(4);
1798 case PT_B1 ... PT_B5:
1799 pos = addr - PT_B1 + ELF_BR_OFFSET(1);
1802 pos = ELF_AR_EC_OFFSET;
1805 pos = ELF_AR_LC_OFFSET;
1808 pos = ELF_CR_IPSR_OFFSET;
1811 pos = ELF_CR_IIP_OFFSET;
1814 pos = ELF_CFM_OFFSET;
1817 pos = ELF_AR_UNAT_OFFSET;
1820 pos = ELF_AR_PFS_OFFSET;
1823 pos = ELF_AR_RSC_OFFSET;
1826 pos = ELF_AR_RNAT_OFFSET;
1828 case PT_AR_BSPSTORE:
1829 pos = ELF_AR_BSPSTORE_OFFSET;
1832 pos = ELF_PR_OFFSET;
1835 pos = ELF_BR_OFFSET(6);
1838 pos = ELF_AR_BSP_OFFSET;
1840 case PT_R1 ... PT_R3:
1841 pos = addr - PT_R1 + ELF_GR_OFFSET(1);
1843 case PT_R12 ... PT_R15:
1844 pos = addr - PT_R12 + ELF_GR_OFFSET(12);
1846 case PT_R8 ... PT_R11:
1847 pos = addr - PT_R8 + ELF_GR_OFFSET(8);
1849 case PT_R16 ... PT_R31:
1850 pos = addr - PT_R16 + ELF_GR_OFFSET(16);
1853 pos = ELF_AR_CCV_OFFSET;
1856 pos = ELF_AR_FPSR_OFFSET;
1859 pos = ELF_BR_OFFSET(0);
1862 pos = ELF_BR_OFFSET(7);
1865 pos = ELF_AR_CSD_OFFSET;
1868 pos = ELF_AR_SSD_OFFSET;
1873 struct unw_frame_info info;
1875 memset(&info, 0, sizeof(info));
1876 unw_init_from_blocked_task(&info, child);
1877 if (unw_unwind_to_user(&info) < 0)
1880 return access_elf_reg(child, &info, pos, data, write_access);
1883 /* access debug registers */
1884 if (addr >= PT_IBR) {
1885 regnum = (addr - PT_IBR) >> 3;
1886 ptr = &child->thread.ibr[0];
1888 regnum = (addr - PT_DBR) >> 3;
1889 ptr = &child->thread.dbr[0];
1893 dprintk("ptrace: rejecting access to register "
1894 "address 0x%lx\n", addr);
1898 if (!(child->thread.flags & IA64_THREAD_DBG_VALID)) {
1899 child->thread.flags |= IA64_THREAD_DBG_VALID;
1900 memset(child->thread.dbr, 0,
1901 sizeof(child->thread.dbr));
1902 memset(child->thread.ibr, 0,
1903 sizeof(child->thread.ibr));
1908 if ((regnum & 1) && write_access) {
1909 /* don't let the user set kernel-level breakpoints: */
1910 *ptr = *data & ~(7UL << 56);
1920 static const struct user_regset native_regsets[] = {
1922 .core_note_type = NT_PRSTATUS,
1924 .size = sizeof(elf_greg_t), .align = sizeof(elf_greg_t),
1925 .regset_get = gpregs_get, .set = gpregs_set,
1926 .writeback = gpregs_writeback
1929 .core_note_type = NT_PRFPREG,
1931 .size = sizeof(elf_fpreg_t), .align = sizeof(elf_fpreg_t),
1932 .regset_get = fpregs_get, .set = fpregs_set, .active = fpregs_active
1936 static const struct user_regset_view user_ia64_view = {
1938 .e_machine = EM_IA_64,
1939 .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
1942 const struct user_regset_view *task_user_regset_view(struct task_struct *tsk)
1944 return &user_ia64_view;
1947 struct syscall_get_args {
1950 unsigned long *args;
1951 struct pt_regs *regs;
1954 static void syscall_get_args_cb(struct unw_frame_info *info, void *data)
1956 struct syscall_get_args *args = data;
1957 struct pt_regs *pt = args->regs;
1958 unsigned long *krbs, cfm, ndirty, nlocals, nouts;
1961 if (unw_unwind_to_user(info) < 0)
1965 * We get here via a few paths:
1966 * - break instruction: cfm is shared with caller.
1967 * syscall args are in out= regs, locals are non-empty.
1968 * - epsinstruction: cfm is set by br.call
1969 * locals don't exist.
1971 * For both cases arguments are reachable in cfm.sof - cfm.sol.
1972 * CFM: [ ... | sor: 17..14 | sol : 13..7 | sof : 6..0 ]
1975 nlocals = (cfm >> 7) & 0x7f; /* aka sol */
1976 nouts = (cfm & 0x7f) - nlocals; /* aka sof - sol */
1977 krbs = (unsigned long *)info->task + IA64_RBS_OFFSET/8;
1978 ndirty = ia64_rse_num_regs(krbs, krbs + (pt->loadrs >> 19));
1982 count = min_t(int, args->n, nouts);
1984 /* Iterate over outs. */
1985 for (i = 0; i < count; i++) {
1986 int j = ndirty + nlocals + i + args->i;
1987 args->args[i] = *ia64_rse_skip_regs(krbs, j);
1990 while (i < args->n) {
1996 void syscall_get_arguments(struct task_struct *task,
1997 struct pt_regs *regs, unsigned long *args)
1999 struct syscall_get_args data = {
2006 if (task == current)
2007 unw_init_running(syscall_get_args_cb, &data);
2009 struct unw_frame_info ufi;
2010 memset(&ufi, 0, sizeof(ufi));
2011 unw_init_from_blocked_task(&ufi, task);
2012 syscall_get_args_cb(&ufi, &data);