2 * arch/ia64/kernel/entry.S
6 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * Copyright (C) 1999, 2002-2003
9 * Asit Mallick <Asit.K.Mallick@intel.com>
10 * Don Dugger <Don.Dugger@intel.com>
11 * Suresh Siddha <suresh.b.siddha@intel.com>
12 * Fenghua Yu <fenghua.yu@intel.com>
13 * Copyright (C) 1999 VA Linux Systems
14 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
17 * ia64_switch_to now places correct virtual mapping in in TR2 for
18 * kernel stack. This allows us to handle interrupts without changing
21 * Jonathan Nicklin <nicklin@missioncriticallinux.com>
22 * Patrick O'Rourke <orourke@missioncriticallinux.com>
26 * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
27 * VA Linux Systems Japan K.K.
31 * Global (preserved) predicate usage on syscall entry/exit path:
40 #include <asm/asmmacro.h>
41 #include <asm/cache.h>
42 #include <asm/errno.h>
43 #include <asm/kregs.h>
44 #include <asm/asm-offsets.h>
45 #include <asm/pgtable.h>
46 #include <asm/percpu.h>
47 #include <asm/processor.h>
48 #include <asm/thread_info.h>
49 #include <asm/unistd.h>
50 #include <asm/ftrace.h>
55 * execve() is special because in case of success, we need to
56 * setup a null register window frame.
60 * Allocate 8 input registers since ptrace() may clobber them
62 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
63 alloc loc1=ar.pfs,8,2,3,0
66 mov out0=in0 // filename
67 ;; // stop bit between alloc and call
70 br.call.sptk.many rp=sys_execve
73 mov ar.pfs=loc1 // restore ar.pfs
74 sxt4 r8=r8 // return 64-bit result
78 (p6) mov ar.pfs=r0 // clear ar.pfs on success
79 (p7) br.ret.sptk.many rp
82 * In theory, we'd have to zap this state only to prevent leaking of
83 * security sensitive state (e.g., if current->mm->dumpable is zero). However,
84 * this executes in less than 20 cycles even on Itanium, so it's not worth
87 mov ar.unat=0; mov ar.lc=0
88 mov r4=0; mov f2=f0; mov b1=r0
89 mov r5=0; mov f3=f0; mov b2=r0
90 mov r6=0; mov f4=f0; mov b3=r0
91 mov r7=0; mov f5=f0; mov b4=r0
92 ldf.fill f12=[sp]; mov f13=f0; mov b5=r0
93 ldf.fill f14=[sp]; ldf.fill f15=[sp]; mov f16=f0
94 ldf.fill f17=[sp]; ldf.fill f18=[sp]; mov f19=f0
95 ldf.fill f20=[sp]; ldf.fill f21=[sp]; mov f22=f0
96 ldf.fill f23=[sp]; ldf.fill f24=[sp]; mov f25=f0
97 ldf.fill f26=[sp]; ldf.fill f27=[sp]; mov f28=f0
98 ldf.fill f29=[sp]; ldf.fill f30=[sp]; mov f31=f0
103 * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr,
106 GLOBAL_ENTRY(sys_clone2)
108 * Allocate 8 input registers since ptrace() may clobber them
110 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
111 alloc r16=ar.pfs,8,2,6,0
113 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
115 mov loc1=r16 // save ar.pfs across do_fork
119 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
120 mov out3=in3 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
122 (p6) st8 [r2]=in5 // store TLS in r16 for copy_thread()
123 mov out4=in4 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
124 mov out0=in0 // out0 = clone_flags
125 br.call.sptk.many rp=do_fork
127 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
134 * sys_clone(u64 flags, u64 ustack_base, u64 parent_tidptr, u64 child_tidptr, u64 tls)
135 * Deprecated. Use sys_clone2() instead.
137 GLOBAL_ENTRY(sys_clone)
139 * Allocate 8 input registers since ptrace() may clobber them
141 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
142 alloc r16=ar.pfs,8,2,6,0
144 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
146 mov loc1=r16 // save ar.pfs across do_fork
149 mov out2=16 // stacksize (compensates for 16-byte scratch area)
150 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
151 mov out3=in2 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
153 (p6) st8 [r2]=in4 // store TLS in r13 (tp)
154 mov out4=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
155 mov out0=in0 // out0 = clone_flags
156 br.call.sptk.many rp=do_fork
158 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
165 * prev_task <- ia64_switch_to(struct task_struct *next)
166 * With Ingo's new scheduler, interrupts are disabled when this routine gets
167 * called. The code starting at .map relies on this. The rest of the code
168 * doesn't care about the interrupt masking status.
170 GLOBAL_ENTRY(ia64_switch_to)
172 alloc r16=ar.pfs,1,0,0,0
176 adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13
178 mov r27=IA64_KR(CURRENT_STACK)
179 adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
180 dep r20=0,in0,61,3 // physical address of "next"
182 st8 [r22]=sp // save kernel stack pointer of old task
183 shr.u r26=r20,IA64_GRANULE_SHIFT
187 * If we've already mapped this task's page, we can skip doing it again.
189 (p6) cmp.eq p7,p6=r26,r27
190 (p6) br.cond.dpnt .map
193 ld8 sp=[r21] // load kernel stack pointer of new task
194 MOV_TO_KR(CURRENT, in0, r8, r9) // update "current" application register
195 mov r8=r13 // return pointer to previously running task
196 mov r13=in0 // set "current" pointer
201 sync.i // ensure "fc"s done by this CPU are visible on other CPUs
203 br.ret.sptk.many rp // boogie on out in new context
206 RSM_PSR_IC(r25) // interrupts (psr.i) are already disabled here
210 or r23=r25,r20 // construct PA | page properties
211 mov r25=IA64_GRANULE_SHIFT<<2
213 MOV_TO_ITIR(p0, r25, r8)
214 MOV_TO_IFA(in0, r8) // VA of next task...
216 mov r25=IA64_TR_CURRENT_STACK
217 MOV_TO_KR(CURRENT_STACK, r26, r8, r9) // remember last page we mapped...
219 itr.d dtr[r25]=r23 // wire in new mapping...
220 SSM_PSR_IC_AND_SRLZ_D(r8, r9) // reenable the psr.ic bit
225 * Note that interrupts are enabled during save_switch_stack and load_switch_stack. This
226 * means that we may get an interrupt with "sp" pointing to the new kernel stack while
227 * ar.bspstore is still pointing to the old kernel backing store area. Since ar.rsc,
228 * ar.rnat, ar.bsp, and ar.bspstore are all preserved by interrupts, this is not a
229 * problem. Also, we don't need to specify unwind information for preserved registers
230 * that are not modified in save_switch_stack as the right unwind information is already
231 * specified at the call-site of save_switch_stack.
237 * - b7 holds address to return to
238 * - rp (b0) holds return address to save
240 GLOBAL_ENTRY(save_switch_stack)
243 flushrs // flush dirty regs to backing store (must be first in insn group)
245 mov r17=ar.unat // preserve caller's
247 #ifdef CONFIG_ITANIUM
250 adds r14=SW(R4)+16,sp
252 st8.spill [r14]=r4,16 // spill r4
253 lfetch.fault.excl.nt1 [r3],128
255 lfetch.fault.excl.nt1 [r2],128
256 lfetch.fault.excl.nt1 [r3],128
258 lfetch.fault.excl [r2]
259 lfetch.fault.excl [r3]
260 adds r15=SW(R5)+16,sp
266 st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0
267 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x010
269 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x090
270 lfetch.fault.excl.nt1 [r2],128 // prefetch offset 0x190
272 lfetch.fault.excl.nt1 [r3] // prefetch offset 0x110
273 lfetch.fault.excl.nt1 [r2] // prefetch offset 0x210
274 adds r15=SW(R5)+16,sp
277 st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5
278 mov.m ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0
279 add r2=SW(F2)+16,sp // r2 = &sw->f2
281 st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6
282 mov.m r18=ar.fpsr // preserve fpsr
283 add r3=SW(F3)+16,sp // r3 = &sw->f3
290 st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7
293 // since we're done with the spills, read and save ar.unat:
295 mov.m r20=ar.bspstore
301 st8 [r14]=r21,SW(B1)-SW(B0) // save b0
302 st8 [r15]=r23,SW(B3)-SW(B2) // save b2
306 st8 [r14]=r22,SW(B4)-SW(B1) // save b1
307 st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3
308 mov r21=ar.lc // I-unit
309 stf.spill [r2]=f12,32
310 stf.spill [r3]=f13,32
312 st8 [r14]=r25,SW(B5)-SW(B4) // save b4
313 st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs
314 stf.spill [r2]=f14,32
315 stf.spill [r3]=f15,32
317 st8 [r14]=r26 // save b5
318 st8 [r15]=r21 // save ar.lc
319 stf.spill [r2]=f16,32
320 stf.spill [r3]=f17,32
322 stf.spill [r2]=f18,32
323 stf.spill [r3]=f19,32
325 stf.spill [r2]=f20,32
326 stf.spill [r3]=f21,32
328 stf.spill [r2]=f22,32
329 stf.spill [r3]=f23,32
331 stf.spill [r2]=f24,32
332 stf.spill [r3]=f25,32
334 stf.spill [r2]=f26,32
335 stf.spill [r3]=f27,32
337 stf.spill [r2]=f28,32
338 stf.spill [r3]=f29,32
340 stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30)
341 stf.spill [r3]=f31,SW(PR)-SW(F31)
342 add r14=SW(CALLER_UNAT)+16,sp
344 st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat
345 st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat
348 st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat
349 st8 [r3]=r21 // save predicate registers
351 st8 [r2]=r20 // save ar.bspstore
352 st8 [r14]=r18 // save fpsr
353 mov ar.rsc=3 // put RSE back into eager mode, pl 0
355 END(save_switch_stack)
359 * - "invala" MUST be done at call site (normally in DO_LOAD_SWITCH_STACK)
360 * - b7 holds address to return to
361 * - must not touch r8-r11
363 GLOBAL_ENTRY(load_switch_stack)
368 lfetch.fault.nt1 [sp]
369 adds r2=SW(AR_BSPSTORE)+16,sp
370 adds r3=SW(AR_UNAT)+16,sp
371 mov ar.rsc=0 // put RSE into enforced lazy mode
372 adds r14=SW(CALLER_UNAT)+16,sp
373 adds r15=SW(AR_FPSR)+16,sp
375 ld8 r27=[r2],(SW(B0)-SW(AR_BSPSTORE)) // bspstore
376 ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat
378 ld8 r21=[r2],16 // restore b0
379 ld8 r22=[r3],16 // restore b1
381 ld8 r23=[r2],16 // restore b2
382 ld8 r24=[r3],16 // restore b3
384 ld8 r25=[r2],16 // restore b4
385 ld8 r26=[r3],16 // restore b5
387 ld8 r16=[r2],(SW(PR)-SW(AR_PFS)) // ar.pfs
388 ld8 r17=[r3],(SW(AR_RNAT)-SW(AR_LC)) // ar.lc
390 ld8 r28=[r2] // restore pr
391 ld8 r30=[r3] // restore rnat
393 ld8 r18=[r14],16 // restore caller's unat
394 ld8 r19=[r15],24 // restore fpsr
402 ldf.fill f12=[r14],32
403 ldf.fill f13=[r15],32
405 ldf.fill f14=[r14],32
406 ldf.fill f15=[r15],32
408 ldf.fill f16=[r14],32
409 ldf.fill f17=[r15],32
411 ldf.fill f18=[r14],32
412 ldf.fill f19=[r15],32
415 ldf.fill f20=[r14],32
416 ldf.fill f21=[r15],32
419 ldf.fill f22=[r14],32
420 ldf.fill f23=[r15],32
424 mov ar.unat=r29 // establish unat holding the NaT bits for r4-r7
427 ldf.fill f24=[r14],32
428 ldf.fill f25=[r15],32
431 ldf.fill f26=[r14],32
432 ldf.fill f27=[r15],32
435 ldf.fill f28=[r14],32
436 ldf.fill f29=[r15],32
439 ldf.fill f30=[r14],32
440 ldf.fill f31=[r15],24
450 mov ar.unat=r18 // restore caller's unat
451 mov ar.rnat=r30 // must restore after bspstore but before rsc!
452 mov ar.fpsr=r19 // restore fpsr
453 mov ar.rsc=3 // put RSE back into eager mode, pl 0
455 END(load_switch_stack)
457 GLOBAL_ENTRY(prefetch_stack)
458 add r14 = -IA64_SWITCH_STACK_SIZE, sp
459 add r15 = IA64_TASK_THREAD_KSP_OFFSET, in0
461 ld8 r16 = [r15] // load next's stack pointer
462 lfetch.fault.excl [r14], 128
464 lfetch.fault.excl [r14], 128
465 lfetch.fault [r16], 128
467 lfetch.fault.excl [r14], 128
468 lfetch.fault [r16], 128
470 lfetch.fault.excl [r14], 128
471 lfetch.fault [r16], 128
473 lfetch.fault.excl [r14], 128
474 lfetch.fault [r16], 128
476 lfetch.fault [r16], 128
481 * Invoke a system call, but do some tracing before and after the call.
482 * We MUST preserve the current register frame throughout this routine
483 * because some system calls (such as ia64_execve) directly
486 GLOBAL_ENTRY(ia64_trace_syscall)
487 PT_REGS_UNWIND_INFO(0)
489 * We need to preserve the scratch registers f6-f11 in case the system
492 adds r16=PT(F6)+16,sp
493 adds r17=PT(F7)+16,sp
495 stf.spill [r16]=f6,32
496 stf.spill [r17]=f7,32
498 stf.spill [r16]=f8,32
499 stf.spill [r17]=f9,32
503 br.call.sptk.many rp=syscall_trace_enter // give parent a chance to catch syscall args
504 cmp.lt p6,p0=r8,r0 // check tracehook
505 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
506 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
508 (p6) br.cond.sptk strace_error // syscall failed ->
509 adds r16=PT(F6)+16,sp
510 adds r17=PT(F7)+16,sp
520 // the syscall number may have changed, so re-load it and re-calculate the
521 // syscall entry-point:
522 adds r15=PT(R15)+16,sp // r15 = &pt_regs.r15 (syscall #)
525 mov r3=NR_syscalls - 1
528 movl r16=sys_call_table
530 shladd r20=r15,3,r16 // r20 = sys_call_table + 8*(syscall-1024)
533 (p6) ld8 r20=[r20] // load address of syscall entry point
534 (p7) movl r20=sys_ni_syscall
537 br.call.sptk.many rp=b6 // do the syscall
538 .strace_check_retval:
539 cmp.lt p6,p0=r8,r0 // syscall failed?
540 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
541 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
543 (p6) br.cond.sptk strace_error // syscall failed ->
544 ;; // avoid RAW on r10
546 .mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot for r8
547 .mem.offset 8,0; st8.spill [r3]=r10 // clear error indication in slot for r10
548 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
550 (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
551 (pUStk) rsm psr.i // disable interrupts
552 br.cond.sptk ia64_work_pending_syscall_end
555 ld8 r3=[r2] // load pt_regs.r8
556 sub r9=0,r8 // negate return value to get errno value
558 cmp.ne p6,p0=r3,r0 // is pt_regs.r8!=0?
559 adds r3=16,r2 // r3=&pt_regs.r10
563 br.cond.sptk .strace_save_retval
564 END(ia64_trace_syscall)
567 * When traced and returning from sigreturn, we invoke syscall_trace but then
568 * go straight to ia64_leave_kernel rather than ia64_leave_syscall.
570 GLOBAL_ENTRY(ia64_strace_leave_kernel)
571 PT_REGS_UNWIND_INFO(0)
573 * Some versions of gas generate bad unwind info if the first instruction of a
574 * procedure doesn't go into the first slot of a bundle. This is a workaround.
578 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
580 .ret4: br.cond.sptk ia64_leave_kernel
581 END(ia64_strace_leave_kernel)
584 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(0)
585 /* call the kernel_thread payload; fn is in r4, arg - in r5 */
586 alloc loc1=ar.pfs,0,3,1,0
590 ld8 r14 = [r4], 8 // fn.address
593 ld8 gp = [r4] // fn.gp
595 br.call.sptk.many rp=b6 // fn(arg)
599 /* ... and if it has returned, we are going to userland */
600 cmp.ne pKStk,pUStk=r0,r0
604 GLOBAL_ENTRY(ia64_ret_from_clone)
605 PT_REGS_UNWIND_INFO(0)
607 * Some versions of gas generate bad unwind info if the first instruction of a
608 * procedure doesn't go into the first slot of a bundle. This is a workaround.
613 * We need to call schedule_tail() to complete the scheduling process.
614 * Called by ia64_switch_to() after do_fork()->copy_thread(). r8 contains the
615 * address of the previously executing task.
617 br.call.sptk.many rp=ia64_invoke_schedule_tail
620 (pKStk) br.call.sptk.many rp=call_payload
621 adds r2=TI_FLAGS+IA64_TASK_SIZE,r13
626 and r2=_TIF_SYSCALL_TRACEAUDIT,r2
629 (p6) br.cond.spnt .strace_check_retval
630 ;; // added stop bits to prevent r8 dependency
631 END(ia64_ret_from_clone)
633 GLOBAL_ENTRY(ia64_ret_from_syscall)
634 PT_REGS_UNWIND_INFO(0)
635 cmp.ge p6,p7=r8,r0 // syscall executed successfully?
636 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
637 mov r10=r0 // clear error indication in r10
638 (p7) br.cond.spnt handle_syscall_error // handle potential syscall failure
639 END(ia64_ret_from_syscall)
643 * ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't
644 * need to switch to bank 0 and doesn't restore the scratch registers.
645 * To avoid leaking kernel bits, the scratch registers are set to
646 * the following known-to-be-safe values:
648 * r1: restored (global pointer)
650 * r3: 1 (when returning to user-level)
651 * r8-r11: restored (syscall return value(s))
652 * r12: restored (user-level stack pointer)
653 * r13: restored (user-level thread pointer)
654 * r14: set to __kernel_syscall_via_epc
655 * r15: restored (syscall #)
659 * r20: user-level ar.fpsr
662 * r23: user-level ar.bspstore
663 * r24: user-level ar.rnat
664 * r25: user-level ar.unat
665 * r26: user-level ar.pfs
666 * r27: user-level ar.rsc
668 * r29: user-level psr
669 * r30: user-level cfm
672 * pr: restored (user-level pr)
673 * b0: restored (user-level rp)
675 * b7: set to __kernel_syscall_via_epc
676 * ar.unat: restored (user-level ar.unat)
677 * ar.pfs: restored (user-level ar.pfs)
678 * ar.rsc: restored (user-level ar.rsc)
679 * ar.rnat: restored (user-level ar.rnat)
680 * ar.bspstore: restored (user-level ar.bspstore)
681 * ar.fpsr: restored (user-level ar.fpsr)
686 GLOBAL_ENTRY(ia64_leave_syscall)
687 PT_REGS_UNWIND_INFO(0)
689 * work.need_resched etc. mustn't get changed by this CPU before it returns to
690 * user- or fsys-mode, hence we disable interrupts early on.
692 * p6 controls whether current_thread_info()->flags needs to be check for
693 * extra work. We always check for extra work when returning to user-level.
694 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
695 * is 0. After extra work processing has been completed, execution
696 * resumes at ia64_work_processed_syscall with p6 set to 1 if the extra-work-check
697 * needs to be redone.
699 #ifdef CONFIG_PREEMPT
700 RSM_PSR_I(p0, r2, r18) // disable interrupts
701 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
702 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
704 .pred.rel.mutex pUStk,pKStk
705 (pKStk) ld4 r21=[r20] // r21 <- preempt_count
706 (pUStk) mov r21=0 // r21 <- 0
708 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
709 #else /* !CONFIG_PREEMPT */
710 RSM_PSR_I(pUStk, r2, r18)
711 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
712 (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
714 .global ia64_work_processed_syscall;
715 ia64_work_processed_syscall:
716 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
717 adds r2=PT(LOADRS)+16,r12
718 MOV_FROM_ITC(pUStk, p9, r22, r19) // fetch time at leave
719 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
721 (p6) ld4 r31=[r18] // load current_thread_info()->flags
722 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
723 adds r3=PT(AR_BSPSTORE)+16,r12 // deferred
726 adds r2=PT(LOADRS)+16,r12
727 adds r3=PT(AR_BSPSTORE)+16,r12
728 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
730 (p6) ld4 r31=[r18] // load current_thread_info()->flags
731 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
735 mov r16=ar.bsp // M2 get existing backing store pointer
736 ld8 r18=[r2],PT(R9)-PT(B6) // load b6
737 (p6) and r15=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
739 ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage)
740 (p6) cmp4.ne.unc p6,p0=r15, r0 // any special work pending?
741 (p6) br.cond.spnt .work_pending_syscall
743 // start restoring the state saved on the kernel stack (struct pt_regs):
744 ld8 r9=[r2],PT(CR_IPSR)-PT(R9)
745 ld8 r11=[r3],PT(CR_IIP)-PT(R11)
746 (pNonSys) break 0 // bug check: we shouldn't be here if pNonSys is TRUE!
748 invala // M0|1 invalidate ALAT
749 RSM_PSR_I_IC(r28, r29, r30) // M2 turn off interrupts and interruption collection
750 cmp.eq p9,p0=r0,r0 // A set p9 to indicate that we should restore cr.ifs
752 ld8 r29=[r2],16 // M0|1 load cr.ipsr
753 ld8 r28=[r3],16 // M0|1 load cr.iip
754 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
755 (pUStk) add r14=TI_AC_LEAVE+IA64_TASK_SIZE,r13
757 ld8 r30=[r2],16 // M0|1 load cr.ifs
758 ld8 r25=[r3],16 // M0|1 load ar.unat
759 (pUStk) add r15=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
762 mov r22=r0 // A clear r22
764 ld8 r30=[r2],16 // M0|1 load cr.ifs
765 ld8 r25=[r3],16 // M0|1 load ar.unat
766 (pUStk) add r14=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
769 ld8 r26=[r2],PT(B0)-PT(AR_PFS) // M0|1 load ar.pfs
770 MOV_FROM_PSR(pKStk, r22, r21) // M2 read PSR now that interrupts are disabled
773 ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0
774 ld8 r27=[r3],PT(PR)-PT(AR_RSC) // M0|1 load ar.rsc
775 mov f6=f0 // F clear f6
777 ld8 r24=[r2],PT(AR_FPSR)-PT(AR_RNAT) // M0|1 load ar.rnat (may be garbage)
778 ld8 r31=[r3],PT(R1)-PT(PR) // M0|1 load predicates
779 mov f7=f0 // F clear f7
781 ld8 r20=[r2],PT(R12)-PT(AR_FPSR) // M0|1 load ar.fpsr
782 ld8.fill r1=[r3],16 // M0|1 load r1
783 (pUStk) mov r17=1 // A
785 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
786 (pUStk) st1 [r15]=r17 // M2|3
788 (pUStk) st1 [r14]=r17 // M2|3
790 ld8.fill r13=[r3],16 // M0|1
791 mov f8=f0 // F clear f8
793 ld8.fill r12=[r2] // M0|1 restore r12 (sp)
794 ld8.fill r15=[r3] // M0|1 restore r15
795 mov b6=r18 // I0 restore b6
797 LOAD_PHYS_STACK_REG_SIZE(r17)
798 mov f9=f0 // F clear f9
799 (pKStk) br.cond.dpnt.many skip_rbs_switch // B
801 srlz.d // M0 ensure interruption collection is off (for cover)
802 shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition
803 COVER // B add current frame into dirty partition & set cr.ifs
805 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
806 mov r19=ar.bsp // M2 get new backing store pointer
807 st8 [r14]=r22 // M save time at leave
808 mov f10=f0 // F clear f10
810 mov r22=r0 // A clear r22
811 movl r14=__kernel_syscall_via_epc // X
814 mov r19=ar.bsp // M2 get new backing store pointer
815 mov f10=f0 // F clear f10
818 movl r14=__kernel_syscall_via_epc // X
821 mov.m ar.csd=r0 // M2 clear ar.csd
822 mov.m ar.ccv=r0 // M2 clear ar.ccv
823 mov b7=r14 // I0 clear b7 (hint with __kernel_syscall_via_epc)
825 mov.m ar.ssd=r0 // M2 clear ar.ssd
826 mov f11=f0 // F clear f11
827 br.cond.sptk.many rbs_switch // B
828 END(ia64_leave_syscall)
830 GLOBAL_ENTRY(ia64_leave_kernel)
831 PT_REGS_UNWIND_INFO(0)
833 * work.need_resched etc. mustn't get changed by this CPU before it returns to
834 * user- or fsys-mode, hence we disable interrupts early on.
836 * p6 controls whether current_thread_info()->flags needs to be check for
837 * extra work. We always check for extra work when returning to user-level.
838 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
839 * is 0. After extra work processing has been completed, execution
840 * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check
841 * needs to be redone.
843 #ifdef CONFIG_PREEMPT
844 RSM_PSR_I(p0, r17, r31) // disable interrupts
845 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
846 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
848 .pred.rel.mutex pUStk,pKStk
849 (pKStk) ld4 r21=[r20] // r21 <- preempt_count
850 (pUStk) mov r21=0 // r21 <- 0
852 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
854 RSM_PSR_I(pUStk, r17, r31)
855 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
856 (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
858 .work_processed_kernel:
859 adds r17=TI_FLAGS+IA64_TASK_SIZE,r13
861 (p6) ld4 r31=[r17] // load current_thread_info()->flags
862 adds r21=PT(PR)+16,r12
865 lfetch [r21],PT(CR_IPSR)-PT(PR)
866 adds r2=PT(B6)+16,r12
867 adds r3=PT(R16)+16,r12
870 ld8 r28=[r2],8 // load b6
871 adds r29=PT(R24)+16,r12
873 ld8.fill r16=[r3],PT(AR_CSD)-PT(R16)
874 adds r30=PT(AR_CCV)+16,r12
875 (p6) and r19=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
878 ld8 r15=[r30] // load ar.ccv
879 (p6) cmp4.ne.unc p6,p0=r19, r0 // any special work pending?
881 ld8 r29=[r2],16 // load b7
882 ld8 r30=[r3],16 // load ar.csd
883 (p6) br.cond.spnt .work_pending
885 ld8 r31=[r2],16 // load ar.ssd
889 ld8.fill r10=[r3],PT(R17)-PT(R10)
891 ld8.fill r11=[r2],PT(R18)-PT(R11)
902 RSM_PSR_I_IC(r23, r22, r25) // initiate turning off of interrupt and interruption collection
903 invala // invalidate ALAT
919 ld8.fill r31=[r2],PT(F9)-PT(R31)
920 adds r3=PT(F10)-PT(F6),r3
922 ldf.fill f9=[r2],PT(F6)-PT(F9)
923 ldf.fill f10=[r3],PT(F8)-PT(F10)
925 ldf.fill f6=[r2],PT(F7)-PT(F6)
927 ldf.fill f7=[r2],PT(F11)-PT(F7)
930 srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned)
934 BSW_0(r2, r3, r15) // switch back to bank 0 (no stop bit required beforehand...)
936 (pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency)
937 adds r16=PT(CR_IPSR)+16,r12
938 adds r17=PT(CR_IIP)+16,r12
940 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
941 .pred.rel.mutex pUStk,pKStk
942 MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
943 MOV_FROM_ITC(pUStk, p9, r22, r29) // M fetch time at leave
947 MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
952 ld8 r29=[r16],16 // load cr.ipsr
953 ld8 r28=[r17],16 // load cr.iip
955 ld8 r30=[r16],16 // load cr.ifs
956 ld8 r25=[r17],16 // load ar.unat
958 ld8 r26=[r16],16 // load ar.pfs
959 ld8 r27=[r17],16 // load ar.rsc
960 cmp.eq p9,p0=r0,r0 // set p9 to indicate that we should restore cr.ifs
962 ld8 r24=[r16],16 // load ar.rnat (may be garbage)
963 ld8 r23=[r17],16 // load ar.bspstore (may be garbage)
965 ld8 r31=[r16],16 // load predicates
966 ld8 r21=[r17],16 // load b0
968 ld8 r19=[r16],16 // load ar.rsc value for "loadrs"
969 ld8.fill r1=[r17],16 // load r1
971 ld8.fill r12=[r16],16
972 ld8.fill r13=[r17],16
973 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
974 (pUStk) adds r3=TI_AC_LEAVE+IA64_TASK_SIZE,r18
976 (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18
979 ld8 r20=[r16],16 // ar.fpsr
980 ld8.fill r15=[r17],16
981 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
982 (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18 // deferred
985 ld8.fill r14=[r16],16
989 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
990 // mmi_ : ld8 st1 shr;; mmi_ : st8 st1 shr;;
991 // mib : mov add br -> mib : ld8 add br
992 // bbb_ : br nop cover;; mbb_ : mov br cover;;
994 // no one require bsp in r16 if (pKStk) branch is selected.
995 (pUStk) st8 [r3]=r22 // save time at leave
996 (pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
997 shr.u r18=r19,16 // get byte size of existing "dirty" partition
999 ld8.fill r3=[r16] // deferred
1000 LOAD_PHYS_STACK_REG_SIZE(r17)
1001 (pKStk) br.cond.dpnt skip_rbs_switch
1002 mov r16=ar.bsp // get existing backing store pointer
1005 (pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
1006 shr.u r18=r19,16 // get byte size of existing "dirty" partition
1008 mov r16=ar.bsp // get existing backing store pointer
1009 LOAD_PHYS_STACK_REG_SIZE(r17)
1010 (pKStk) br.cond.dpnt skip_rbs_switch
1014 * Restore user backing store.
1016 * NOTE: alloc, loadrs, and cover can't be predicated.
1018 (pNonSys) br.cond.dpnt dont_preserve_current_frame
1019 COVER // add current frame into dirty partition and set cr.ifs
1021 mov r19=ar.bsp // get new backing store pointer
1023 sub r16=r16,r18 // krbs = old bsp - size of dirty partition
1024 cmp.ne p9,p0=r0,r0 // clear p9 to skip restore of cr.ifs
1026 sub r19=r19,r16 // calculate total byte size of dirty partition
1027 add r18=64,r18 // don't force in0-in7 into memory...
1029 shl r19=r19,16 // shift size of dirty partition into loadrs position
1031 dont_preserve_current_frame:
1033 * To prevent leaking bits between the kernel and user-space,
1034 * we must clear the stacked registers in the "invalid" partition here.
1035 * Not pretty, but at least it's fast (3.34 registers/cycle on Itanium,
1036 * 5 registers/cycle on McKinley).
1038 # define pRecurse p6
1040 #ifdef CONFIG_ITANIUM
1045 alloc loc0=ar.pfs,2,Nregs-2,2,0
1046 shr.u loc1=r18,9 // RNaTslots <= floor(dirtySize / (64*8))
1047 sub r17=r17,r18 // r17 = (physStackedSize + 8) - dirtySize
1049 mov ar.rsc=r19 // load ar.rsc to be used for "loadrs"
1050 shladd in0=loc1,3,r17
1055 #ifdef CONFIG_ITANIUM
1058 alloc loc0=ar.pfs,2,Nregs-2,2,0
1059 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1060 add out0=-Nregs*8,in0
1062 add out1=1,in1 // increment recursion count
1064 nop.b 0 // can't do br.call here because of alloc (WAW on CFM)
1073 (pRecurse) br.call.sptk.many b0=rse_clear_invalid
1078 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1082 (pReturn) br.ret.sptk.many b0
1084 #else /* !CONFIG_ITANIUM */
1085 alloc loc0=ar.pfs,2,Nregs-2,2,0
1086 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1087 add out0=-Nregs*8,in0
1088 add out1=1,in1 // increment recursion count
1097 (pRecurse) br.call.dptk.few b0=rse_clear_invalid
1101 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1104 (pReturn) br.ret.dptk.many b0
1105 #endif /* !CONFIG_ITANIUM */
1109 alloc r17=ar.pfs,0,0,0,0 // drop current register frame
1114 mov ar.unat=r25 // M2
1115 (pKStk) extr.u r22=r22,21,1 // I0 extract current value of psr.pp from r22
1116 (pLvSys)mov r19=r0 // A clear r19 for leave_syscall, no-op otherwise
1118 (pUStk) mov ar.bspstore=r23 // M2
1119 (pKStk) dep r29=r22,r29,21,1 // I0 update ipsr.pp with psr.pp
1120 (pLvSys)mov r16=r0 // A clear r16 for leave_syscall, no-op otherwise
1122 MOV_TO_IPSR(p0, r29, r25) // M2
1123 mov ar.pfs=r26 // I0
1124 (pLvSys)mov r17=r0 // A clear r17 for leave_syscall, no-op otherwise
1126 MOV_TO_IFS(p9, r30, r25)// M2
1128 (pLvSys)mov r18=r0 // A clear r18 for leave_syscall, no-op otherwise
1130 mov ar.fpsr=r20 // M2
1131 MOV_TO_IIP(r28, r25) // M2
1134 (pUStk) mov ar.rnat=r24 // M2 must happen with RSE in lazy mode
1138 mov ar.rsc=r27 // M2
1144 * r20 = ¤t->thread_info->pre_count (if CONFIG_PREEMPT)
1145 * r31 = current->thread_info->flags
1147 * p6 = TRUE if work-pending-check needs to be redone
1149 * Interrupts are disabled on entry, reenabled depend on work, and
1152 .work_pending_syscall:
1159 tbit.z p6,p0=r31,TIF_NEED_RESCHED // is resched not needed?
1160 (p6) br.cond.sptk.few .notify
1161 br.call.spnt.many rp=preempt_schedule_irq
1162 .ret9: cmp.eq p6,p0=r0,r0 // p6 <- 1 (re-check)
1163 (pLvSys)br.cond.sptk.few ia64_work_pending_syscall_end
1164 br.cond.sptk.many .work_processed_kernel
1167 (pUStk) br.call.spnt.many rp=notify_resume_user
1168 .ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0 (don't re-check)
1169 (pLvSys)br.cond.sptk.few ia64_work_pending_syscall_end
1170 br.cond.sptk.many .work_processed_kernel
1172 .global ia64_work_pending_syscall_end;
1173 ia64_work_pending_syscall_end:
1174 adds r2=PT(R8)+16,r12
1175 adds r3=PT(R10)+16,r12
1179 br.cond.sptk.many ia64_work_processed_syscall
1180 END(ia64_leave_kernel)
1182 ENTRY(handle_syscall_error)
1184 * Some system calls (e.g., ptrace, mmap) can return arbitrary values which could
1185 * lead us to mistake a negative return value as a failed syscall. Those syscall
1186 * must deposit a non-zero value in pt_regs.r8 to indicate an error. If
1187 * pt_regs.r8 is zero, we assume that the call completed successfully.
1189 PT_REGS_UNWIND_INFO(0)
1190 ld8 r3=[r2] // load pt_regs.r8
1192 cmp.eq p6,p7=r3,r0 // is pt_regs.r8==0?
1195 (p7) sub r8=0,r8 // negate return value to get errno
1196 br.cond.sptk ia64_leave_syscall
1197 END(handle_syscall_error)
1200 * Invoke schedule_tail(task) while preserving in0-in7, which may be needed
1201 * in case a system call gets restarted.
1203 GLOBAL_ENTRY(ia64_invoke_schedule_tail)
1204 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1205 alloc loc1=ar.pfs,8,2,1,0
1207 mov out0=r8 // Address of previous task
1209 br.call.sptk.many rp=schedule_tail
1210 .ret11: mov ar.pfs=loc1
1213 END(ia64_invoke_schedule_tail)
1216 * Setup stack and call do_notify_resume_user(), keeping interrupts
1219 * Note that pSys and pNonSys need to be set up by the caller.
1220 * We declare 8 input registers so the system call args get preserved,
1221 * in case we need to restart a system call.
1223 GLOBAL_ENTRY(notify_resume_user)
1224 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1225 alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart!
1227 mov loc0=rp // save return address
1228 mov out0=0 // there is no "oldset"
1229 adds out1=8,sp // out1=&sigscratch->ar_pfs
1230 (pSys) mov out2=1 // out2==1 => we're in a syscall
1232 (pNonSys) mov out2=0 // out2==0 => not a syscall
1234 .spillsp ar.unat, 16
1235 st8 [sp]=r9,-16 // allocate space for ar.unat and save it
1236 st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch
1238 br.call.sptk.many rp=do_notify_resume_user
1240 adds sp=16,sp // pop scratch stack space
1242 ld8 r9=[sp] // load new unat from sigscratch->scratch_unat
1248 END(notify_resume_user)
1250 ENTRY(sys_rt_sigreturn)
1251 PT_REGS_UNWIND_INFO(0)
1253 * Allocate 8 input registers since ptrace() may clobber them
1255 alloc r2=ar.pfs,8,0,1,0
1260 cmp.eq pNonSys,pSys=r0,r0 // sigreturn isn't a normal syscall...
1263 * leave_kernel() restores f6-f11 from pt_regs, but since the streamlined
1264 * syscall-entry path does not save them we save them here instead. Note: we
1265 * don't need to save any other registers that are not saved by the stream-lined
1266 * syscall path, because restore_sigcontext() restores them.
1268 adds r16=PT(F6)+32,sp
1269 adds r17=PT(F7)+32,sp
1271 stf.spill [r16]=f6,32
1272 stf.spill [r17]=f7,32
1274 stf.spill [r16]=f8,32
1275 stf.spill [r17]=f9,32
1279 adds out0=16,sp // out0 = &sigscratch
1280 br.call.sptk.many rp=ia64_rt_sigreturn
1281 .ret19: .restore sp,0
1284 ld8 r9=[sp] // load new ar.unat
1285 mov.sptk b7=r8,ia64_leave_kernel
1289 END(sys_rt_sigreturn)
1291 GLOBAL_ENTRY(ia64_prepare_handle_unaligned)
1294 * r16 = fake ar.pfs, we simply need to make sure privilege is still 0
1297 DO_SAVE_SWITCH_STACK
1298 br.call.sptk.many rp=ia64_handle_unaligned // stack frame setup in ivt
1300 DO_LOAD_SWITCH_STACK
1301 br.cond.sptk.many rp // goes to ia64_leave_kernel
1302 END(ia64_prepare_handle_unaligned)
1305 // unw_init_running(void (*callback)(info, arg), void *arg)
1307 # define EXTRA_FRAME_SIZE ((UNW_FRAME_INFO_SIZE+15)&~15)
1309 GLOBAL_ENTRY(unw_init_running)
1310 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1311 alloc loc1=ar.pfs,2,3,3,0
1316 DO_SAVE_SWITCH_STACK
1319 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1320 .fframe IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE
1321 SWITCH_STACK_SAVES(EXTRA_FRAME_SIZE)
1322 adds sp=-EXTRA_FRAME_SIZE,sp
1325 adds out0=16,sp // &info
1326 mov out1=r13 // current
1327 adds out2=16+EXTRA_FRAME_SIZE,sp // &switch_stack
1328 br.call.sptk.many rp=unw_init_frame_info
1329 1: adds out0=16,sp // &info
1331 mov loc2=gp // save gp across indirect function call
1335 br.call.sptk.many rp=b6 // invoke the callback function
1336 1: mov gp=loc2 // restore gp
1338 // For now, we don't allow changing registers from within
1339 // unw_init_running; if we ever want to allow that, we'd
1340 // have to do a load_switch_stack here:
1342 adds sp=IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE,sp
1347 END(unw_init_running)
1349 #ifdef CONFIG_FUNCTION_TRACER
1350 #ifdef CONFIG_DYNAMIC_FTRACE
1351 GLOBAL_ENTRY(_mcount)
1358 GLOBAL_ENTRY(ftrace_caller)
1359 alloc out0 = ar.pfs, 8, 0, 4, 0
1365 br.call.sptk.many b0 = ftrace_patch_gp
1366 //this might be called from module, so we must patch gp
1371 .global ftrace_call;
1378 alloc loc0 = ar.pfs, 4, 4, 2, 0
1385 adds out0 = -MCOUNT_INSN_SIZE, out0
1389 br.call.sptk.many b0 = b6
1400 GLOBAL_ENTRY(_mcount)
1401 movl r2 = ftrace_stub
1402 movl r3 = ftrace_trace_function;;
1405 cmp.eq p7,p0 = r2, r3
1406 (p7) br.sptk.many ftrace_stub
1409 alloc loc0 = ar.pfs, 4, 4, 2, 0
1416 adds out0 = -MCOUNT_INSN_SIZE, out0
1420 br.call.sptk.many b0 = b6
1431 GLOBAL_ENTRY(ftrace_stub)
1433 movl r2 = _mcount_ret_helper
1446 #endif /* CONFIG_FUNCTION_TRACER */
1450 .globl sys_call_table
1452 data8 sys_ni_syscall // This must be sys_ni_syscall! See ivt.S.
1453 data8 sys_exit // 1025
1458 data8 sys_creat // 1030
1463 data8 sys_fchdir // 1035
1468 data8 sys_lseek // 1040
1473 data8 sys_setuid // 1045
1478 data8 sys_sync // 1050
1483 data8 sys_mkdir // 1055
1488 data8 ia64_brk // 1060
1493 data8 sys_ioctl // 1065
1498 data8 sys_dup2 // 1070
1503 data8 sys_getresgid // 1075
1508 data8 sys_setpgid // 1080
1511 data8 sys_sethostname
1513 data8 sys_getrlimit // 1085
1515 data8 sys_gettimeofday
1516 data8 sys_settimeofday
1518 data8 sys_poll // 1090
1523 data8 sys_swapoff // 1095
1528 data8 sys_fchown // 1100
1529 data8 ia64_getpriority
1530 data8 sys_setpriority
1533 data8 sys_gettid // 1105
1538 data8 sys_msgsnd // 1110
1543 data8 sys_shmdt // 1115
1548 data8 sys_ni_syscall // 1120 /* was: ia64_oldstat */
1549 data8 sys_ni_syscall /* was: ia64_oldlstat */
1550 data8 sys_ni_syscall /* was: ia64_oldfstat */
1553 data8 sys_remap_file_pages // 1125
1557 data8 sys_setdomainname
1558 data8 sys_newuname // 1130
1560 data8 sys_ni_syscall /* was: ia64_create_module */
1561 data8 sys_init_module
1562 data8 sys_delete_module
1563 data8 sys_ni_syscall // 1135 /* was: sys_get_kernel_syms */
1564 data8 sys_ni_syscall /* was: sys_query_module */
1568 data8 sys_personality // 1140
1569 data8 sys_ni_syscall // sys_afs_syscall
1573 data8 sys_flock // 1145
1578 data8 sys_sysctl // 1150
1583 data8 sys_mprotect // 1155
1587 data8 sys_munlockall
1588 data8 sys_sched_getparam // 1160
1589 data8 sys_sched_setparam
1590 data8 sys_sched_getscheduler
1591 data8 sys_sched_setscheduler
1592 data8 sys_sched_yield
1593 data8 sys_sched_get_priority_max // 1165
1594 data8 sys_sched_get_priority_min
1595 data8 sys_sched_rr_get_interval
1597 data8 sys_ni_syscall // old nfsservctl
1598 data8 sys_prctl // 1170
1599 data8 sys_getpagesize
1601 data8 sys_pciconfig_read
1602 data8 sys_pciconfig_write
1603 data8 sys_perfmonctl // 1175
1604 data8 sys_sigaltstack
1605 data8 sys_rt_sigaction
1606 data8 sys_rt_sigpending
1607 data8 sys_rt_sigprocmask
1608 data8 sys_rt_sigqueueinfo // 1180
1609 data8 sys_rt_sigreturn
1610 data8 sys_rt_sigsuspend
1611 data8 sys_rt_sigtimedwait
1613 data8 sys_capget // 1185
1615 data8 sys_sendfile64
1616 data8 sys_ni_syscall // sys_getpmsg (STREAMS)
1617 data8 sys_ni_syscall // sys_putpmsg (STREAMS)
1618 data8 sys_socket // 1190
1623 data8 sys_getsockname // 1195
1624 data8 sys_getpeername
1625 data8 sys_socketpair
1628 data8 sys_recv // 1200
1631 data8 sys_setsockopt
1632 data8 sys_getsockopt
1633 data8 sys_sendmsg // 1205
1635 data8 sys_pivot_root
1638 data8 sys_newstat // 1210
1642 data8 sys_getdents64
1643 data8 sys_getunwind // 1215
1648 data8 sys_getxattr // 1220
1652 data8 sys_llistxattr
1653 data8 sys_flistxattr // 1225
1654 data8 sys_removexattr
1655 data8 sys_lremovexattr
1656 data8 sys_fremovexattr
1658 data8 sys_futex // 1230
1659 data8 sys_sched_setaffinity
1660 data8 sys_sched_getaffinity
1661 data8 sys_set_tid_address
1662 data8 sys_fadvise64_64
1663 data8 sys_tgkill // 1235
1664 data8 sys_exit_group
1665 data8 sys_lookup_dcookie
1667 data8 sys_io_destroy
1668 data8 sys_io_getevents // 1240
1671 data8 sys_epoll_create
1673 data8 sys_epoll_wait // 1245
1674 data8 sys_restart_syscall
1675 data8 sys_semtimedop
1676 data8 sys_timer_create
1677 data8 sys_timer_settime
1678 data8 sys_timer_gettime // 1250
1679 data8 sys_timer_getoverrun
1680 data8 sys_timer_delete
1681 data8 sys_clock_settime
1682 data8 sys_clock_gettime
1683 data8 sys_clock_getres // 1255
1684 data8 sys_clock_nanosleep
1688 data8 sys_get_mempolicy // 1260
1689 data8 sys_set_mempolicy
1692 data8 sys_mq_timedsend
1693 data8 sys_mq_timedreceive // 1265
1695 data8 sys_mq_getsetattr
1696 data8 sys_kexec_load
1697 data8 sys_ni_syscall // reserved for vserver
1698 data8 sys_waitid // 1270
1700 data8 sys_request_key
1702 data8 sys_ioprio_set
1703 data8 sys_ioprio_get // 1275
1704 data8 sys_move_pages
1705 data8 sys_inotify_init
1706 data8 sys_inotify_add_watch
1707 data8 sys_inotify_rm_watch
1708 data8 sys_migrate_pages // 1280
1713 data8 sys_futimesat // 1285
1714 data8 sys_newfstatat
1718 data8 sys_symlinkat // 1290
1719 data8 sys_readlinkat
1723 data8 sys_ppoll // 1295
1726 data8 sys_set_robust_list
1727 data8 sys_get_robust_list
1728 data8 sys_sync_file_range // 1300
1733 data8 sys_epoll_pwait // 1305
1736 data8 sys_ni_syscall
1738 data8 sys_timerfd_create // 1310
1739 data8 sys_timerfd_settime
1740 data8 sys_timerfd_gettime
1743 data8 sys_epoll_create1 // 1315
1746 data8 sys_inotify_init1
1748 data8 sys_pwritev // 1320
1749 data8 sys_rt_tgsigqueueinfo
1751 data8 sys_fanotify_init
1752 data8 sys_fanotify_mark
1753 data8 sys_prlimit64 // 1325
1754 data8 sys_name_to_handle_at
1755 data8 sys_open_by_handle_at
1756 data8 sys_clock_adjtime
1758 data8 sys_setns // 1330
1760 data8 sys_process_vm_readv
1761 data8 sys_process_vm_writev
1763 data8 sys_finit_module // 1335
1764 data8 sys_sched_setattr
1765 data8 sys_sched_getattr
1768 data8 sys_memfd_create // 1340
1771 data8 sys_userfaultfd
1772 data8 sys_membarrier
1773 data8 sys_kcmp // 1345
1776 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls