1 // SPDX-License-Identifier: GPL-2.0
3 * Emulation of the "brl" instruction for IA64 processors that
4 * don't support it in hardware.
5 * Author: Stephan Zeisset, Intel Corp. <Stephan.Zeisset@intel.com>
7 * 02/22/02 D. Mosberger Clear si_flgs, si_isr, and si_imm to avoid
11 #include <linux/kernel.h>
12 #include <linux/sched/signal.h>
13 #include <linux/uaccess.h>
14 #include <asm/processor.h>
16 extern char ia64_set_b1, ia64_set_b2, ia64_set_b3, ia64_set_b4, ia64_set_b5;
18 struct illegal_op_return {
19 unsigned long fkt, arg1, arg2, arg3;
23 * The unimplemented bits of a virtual address must be set
24 * to the value of the most significant implemented bit.
25 * unimpl_va_mask includes all unimplemented bits and
26 * the most significant implemented bit, so the result
27 * of an and operation with the mask must be all 0's
28 * or all 1's for the address to be valid.
30 #define unimplemented_virtual_address(va) ( \
31 ((va) & local_cpu_data->unimpl_va_mask) != 0 && \
32 ((va) & local_cpu_data->unimpl_va_mask) != local_cpu_data->unimpl_va_mask \
36 * The unimplemented bits of a physical address must be 0.
37 * unimpl_pa_mask includes all unimplemented bits, so the result
38 * of an and operation with the mask must be all 0's for the
39 * address to be valid.
41 #define unimplemented_physical_address(pa) ( \
42 ((pa) & local_cpu_data->unimpl_pa_mask) != 0 \
46 * Handle an illegal operation fault that was caused by an
47 * unimplemented "brl" instruction.
48 * If we are not successful (e.g because the illegal operation
49 * wasn't caused by a "brl" after all), we return -1.
50 * If we are successful, we return either 0 or the address
51 * of a "fixup" function for manipulating preserved register
55 struct illegal_op_return
56 ia64_emulate_brl (struct pt_regs *regs, unsigned long ar_ec)
58 unsigned long bundle[2];
59 unsigned long opcode, btype, qp, offset, cpl;
60 unsigned long next_ip;
61 struct siginfo siginfo;
62 struct illegal_op_return rv;
63 long tmp_taken, unimplemented_address;
65 clear_siginfo(&siginfo);
66 rv.fkt = (unsigned long) -1;
69 * Decode the instruction bundle.
72 if (copy_from_user(bundle, (void *) (regs->cr_iip), sizeof(bundle)))
75 next_ip = (unsigned long) regs->cr_iip + 16;
77 /* "brl" must be in slot 2. */
78 if (ia64_psr(regs)->ri != 1) return rv;
80 /* Must be "mlx" template */
81 if ((bundle[0] & 0x1e) != 0x4) return rv;
83 opcode = (bundle[1] >> 60);
84 btype = ((bundle[1] >> 29) & 0x7);
85 qp = ((bundle[1] >> 23) & 0x3f);
86 offset = ((bundle[1] & 0x0800000000000000L) << 4)
87 | ((bundle[1] & 0x00fffff000000000L) >> 32)
88 | ((bundle[1] & 0x00000000007fffffL) << 40)
89 | ((bundle[0] & 0xffff000000000000L) >> 24);
91 tmp_taken = regs->pr & (1L << qp);
99 if (btype != 0) return rv;
103 * Qualifying predicate is 0.
106 regs->cr_iip = next_ip;
107 ia64_psr(regs)->ri = 0;
119 * Qualifying predicate is 0.
122 regs->cr_iip = next_ip;
123 ia64_psr(regs)->ri = 0;
135 rv.fkt = (unsigned long) &ia64_set_b1;
138 rv.fkt = (unsigned long) &ia64_set_b2;
141 rv.fkt = (unsigned long) &ia64_set_b3;
144 rv.fkt = (unsigned long) &ia64_set_b4;
147 rv.fkt = (unsigned long) &ia64_set_b5;
160 * AR[PFS].pec = AR[EC]
161 * AR[PFS].ppl = PSR.cpl
163 cpl = ia64_psr(regs)->cpl;
164 regs->ar_pfs = ((regs->cr_ifs & 0x3fffffffff)
165 | (ar_ec << 52) | (cpl << 62));
175 regs->cr_ifs = ((regs->cr_ifs & 0xffffffc00000007f)
176 - ((regs->cr_ifs >> 7) & 0x7f));
188 regs->cr_iip += offset;
189 ia64_psr(regs)->ri = 0;
191 if (ia64_psr(regs)->it == 0)
192 unimplemented_address = unimplemented_physical_address(regs->cr_iip);
194 unimplemented_address = unimplemented_virtual_address(regs->cr_iip);
196 if (unimplemented_address) {
198 * The target address contains unimplemented bits.
200 printk(KERN_DEBUG "Woah! Unimplemented Instruction Address Trap!\n");
201 siginfo.si_signo = SIGILL;
202 siginfo.si_errno = 0;
203 siginfo.si_flags = 0;
206 siginfo.si_code = ILL_BADIADDR;
207 force_sig_info(SIGILL, &siginfo, current);
208 } else if (ia64_psr(regs)->tb) {
210 * Branch Tracing is enabled.
211 * Force a taken branch signal.
213 siginfo.si_signo = SIGTRAP;
214 siginfo.si_errno = 0;
215 siginfo.si_code = TRAP_BRANCH;
216 siginfo.si_flags = 0;
220 force_sig_info(SIGTRAP, &siginfo, current);
221 } else if (ia64_psr(regs)->ss) {
223 * Single Step is enabled.
224 * Force a trace signal.
226 siginfo.si_signo = SIGTRAP;
227 siginfo.si_errno = 0;
228 siginfo.si_code = TRAP_TRACE;
229 siginfo.si_flags = 0;
233 force_sig_info(SIGTRAP, &siginfo, current);