1 /* SPDX-License-Identifier: GPL-2.0 */
3 * R/W semaphores for ia64
5 * Copyright (C) 2003 Ken Chen <kenneth.w.chen@intel.com>
6 * Copyright (C) 2003 Asit Mallick <asit.k.mallick@intel.com>
7 * Copyright (C) 2005 Christoph Lameter <cl@linux.com>
9 * Based on asm-i386/rwsem.h and other architecture implementation.
11 * The MSW of the count is the negated number of active writers and
12 * waiting lockers, and the LSW is the total number of active locks.
14 * The lock count is initialized to 0 (no active and no waiting lockers).
16 * When a writer subtracts WRITE_BIAS, it'll get 0xffffffff00000001 for
17 * the case of an uncontended lock. Readers increment by 1 and see a positive
18 * value when uncontended, negative if there are writers (and maybe) readers
19 * waiting (in which case it goes to sleep).
22 #ifndef _ASM_IA64_RWSEM_H
23 #define _ASM_IA64_RWSEM_H
25 #ifndef _LINUX_RWSEM_H
26 #error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead."
29 #include <asm/intrinsics.h>
31 #define RWSEM_UNLOCKED_VALUE __IA64_UL_CONST(0x0000000000000000)
32 #define RWSEM_ACTIVE_BIAS (1L)
33 #define RWSEM_ACTIVE_MASK (0xffffffffL)
34 #define RWSEM_WAITING_BIAS (-0x100000000L)
35 #define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
36 #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
42 __down_read (struct rw_semaphore *sem)
44 long result = ia64_fetchadd8_acq((unsigned long *)&sem->count.counter, 1);
47 rwsem_down_read_failed(sem);
54 ___down_write (struct rw_semaphore *sem)
59 old = atomic_long_read(&sem->count);
60 new = old + RWSEM_ACTIVE_WRITE_BIAS;
61 } while (atomic_long_cmpxchg_acquire(&sem->count, old, new) != old);
67 __down_write (struct rw_semaphore *sem)
69 if (___down_write(sem))
70 rwsem_down_write_failed(sem);
74 __down_write_killable (struct rw_semaphore *sem)
76 if (___down_write(sem))
77 if (IS_ERR(rwsem_down_write_failed_killable(sem)))
84 * unlock after reading
87 __up_read (struct rw_semaphore *sem)
89 long result = ia64_fetchadd8_rel((unsigned long *)&sem->count.counter, -1);
91 if (result < 0 && (--result & RWSEM_ACTIVE_MASK) == 0)
96 * unlock after writing
99 __up_write (struct rw_semaphore *sem)
104 old = atomic_long_read(&sem->count);
105 new = old - RWSEM_ACTIVE_WRITE_BIAS;
106 } while (atomic_long_cmpxchg_release(&sem->count, old, new) != old);
108 if (new < 0 && (new & RWSEM_ACTIVE_MASK) == 0)
113 * trylock for reading -- returns 1 if successful, 0 if contention
116 __down_read_trylock (struct rw_semaphore *sem)
119 while ((tmp = atomic_long_read(&sem->count)) >= 0) {
120 if (tmp == atomic_long_cmpxchg_acquire(&sem->count, tmp, tmp+1)) {
128 * trylock for writing -- returns 1 if successful, 0 if contention
131 __down_write_trylock (struct rw_semaphore *sem)
133 long tmp = atomic_long_cmpxchg_acquire(&sem->count,
134 RWSEM_UNLOCKED_VALUE, RWSEM_ACTIVE_WRITE_BIAS);
135 return tmp == RWSEM_UNLOCKED_VALUE;
139 * downgrade write lock to read lock
142 __downgrade_write (struct rw_semaphore *sem)
147 old = atomic_long_read(&sem->count);
148 new = old - RWSEM_WAITING_BIAS;
149 } while (atomic_long_cmpxchg_release(&sem->count, old, new) != old);
152 rwsem_downgrade_wake(sem);
155 #endif /* _ASM_IA64_RWSEM_H */