1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_IA64_ATOMIC_H
3 #define _ASM_IA64_ATOMIC_H
6 * Atomic operations that C can't guarantee us. Useful for
7 * resource counting etc..
9 * NOTE: don't mess with the types below! The "unsigned long" and
10 * "int" types were carefully placed so as to ensure proper operation
13 * Copyright (C) 1998, 1999, 2002-2003 Hewlett-Packard Co
14 * David Mosberger-Tang <davidm@hpl.hp.com>
16 #include <linux/types.h>
18 #include <asm/intrinsics.h>
19 #include <asm/barrier.h>
22 #define ATOMIC_INIT(i) { (i) }
23 #define ATOMIC64_INIT(i) { (i) }
25 #define atomic_read(v) READ_ONCE((v)->counter)
26 #define atomic64_read(v) READ_ONCE((v)->counter)
28 #define atomic_set(v,i) WRITE_ONCE(((v)->counter), (i))
29 #define atomic64_set(v,i) WRITE_ONCE(((v)->counter), (i))
31 #define ATOMIC_OP(op, c_op) \
32 static __inline__ int \
33 ia64_atomic_##op (int i, atomic_t *v) \
36 CMPXCHG_BUGCHECK_DECL \
39 CMPXCHG_BUGCHECK(v); \
40 old = atomic_read(v); \
42 } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old); \
46 #define ATOMIC_FETCH_OP(op, c_op) \
47 static __inline__ int \
48 ia64_atomic_fetch_##op (int i, atomic_t *v) \
51 CMPXCHG_BUGCHECK_DECL \
54 CMPXCHG_BUGCHECK(v); \
55 old = atomic_read(v); \
57 } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old); \
61 #define ATOMIC_OPS(op, c_op) \
63 ATOMIC_FETCH_OP(op, c_op)
69 #define __ia64_atomic_const(i) \
70 static const int __ia64_atomic_p = __builtin_constant_p(i) ? \
71 ((i) == 1 || (i) == 4 || (i) == 8 || (i) == 16 || \
72 (i) == -1 || (i) == -4 || (i) == -8 || (i) == -16) : 0;\
75 #define __ia64_atomic_const(i) 0
78 #define atomic_add_return(i,v) \
80 int __ia64_aar_i = (i); \
81 __ia64_atomic_const(i) \
82 ? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter) \
83 : ia64_atomic_add(__ia64_aar_i, v); \
86 #define atomic_sub_return(i,v) \
88 int __ia64_asr_i = (i); \
89 __ia64_atomic_const(i) \
90 ? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter) \
91 : ia64_atomic_sub(__ia64_asr_i, v); \
94 #define atomic_fetch_add(i,v) \
96 int __ia64_aar_i = (i); \
97 __ia64_atomic_const(i) \
98 ? ia64_fetchadd(__ia64_aar_i, &(v)->counter, acq) \
99 : ia64_atomic_fetch_add(__ia64_aar_i, v); \
102 #define atomic_fetch_sub(i,v) \
104 int __ia64_asr_i = (i); \
105 __ia64_atomic_const(i) \
106 ? ia64_fetchadd(-__ia64_asr_i, &(v)->counter, acq) \
107 : ia64_atomic_fetch_sub(__ia64_asr_i, v); \
110 ATOMIC_FETCH_OP(and, &)
111 ATOMIC_FETCH_OP(or, |)
112 ATOMIC_FETCH_OP(xor, ^)
114 #define atomic_and(i,v) (void)ia64_atomic_fetch_and(i,v)
115 #define atomic_or(i,v) (void)ia64_atomic_fetch_or(i,v)
116 #define atomic_xor(i,v) (void)ia64_atomic_fetch_xor(i,v)
118 #define atomic_fetch_and(i,v) ia64_atomic_fetch_and(i,v)
119 #define atomic_fetch_or(i,v) ia64_atomic_fetch_or(i,v)
120 #define atomic_fetch_xor(i,v) ia64_atomic_fetch_xor(i,v)
123 #undef ATOMIC_FETCH_OP
126 #define ATOMIC64_OP(op, c_op) \
127 static __inline__ long \
128 ia64_atomic64_##op (__s64 i, atomic64_t *v) \
131 CMPXCHG_BUGCHECK_DECL \
134 CMPXCHG_BUGCHECK(v); \
135 old = atomic64_read(v); \
137 } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old); \
141 #define ATOMIC64_FETCH_OP(op, c_op) \
142 static __inline__ long \
143 ia64_atomic64_fetch_##op (__s64 i, atomic64_t *v) \
146 CMPXCHG_BUGCHECK_DECL \
149 CMPXCHG_BUGCHECK(v); \
150 old = atomic64_read(v); \
152 } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old); \
156 #define ATOMIC64_OPS(op, c_op) \
157 ATOMIC64_OP(op, c_op) \
158 ATOMIC64_FETCH_OP(op, c_op)
163 #define atomic64_add_return(i,v) \
165 long __ia64_aar_i = (i); \
166 __ia64_atomic_const(i) \
167 ? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter) \
168 : ia64_atomic64_add(__ia64_aar_i, v); \
171 #define atomic64_sub_return(i,v) \
173 long __ia64_asr_i = (i); \
174 __ia64_atomic_const(i) \
175 ? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter) \
176 : ia64_atomic64_sub(__ia64_asr_i, v); \
179 #define atomic64_fetch_add(i,v) \
181 long __ia64_aar_i = (i); \
182 __ia64_atomic_const(i) \
183 ? ia64_fetchadd(__ia64_aar_i, &(v)->counter, acq) \
184 : ia64_atomic64_fetch_add(__ia64_aar_i, v); \
187 #define atomic64_fetch_sub(i,v) \
189 long __ia64_asr_i = (i); \
190 __ia64_atomic_const(i) \
191 ? ia64_fetchadd(-__ia64_asr_i, &(v)->counter, acq) \
192 : ia64_atomic64_fetch_sub(__ia64_asr_i, v); \
195 ATOMIC64_FETCH_OP(and, &)
196 ATOMIC64_FETCH_OP(or, |)
197 ATOMIC64_FETCH_OP(xor, ^)
199 #define atomic64_and(i,v) (void)ia64_atomic64_fetch_and(i,v)
200 #define atomic64_or(i,v) (void)ia64_atomic64_fetch_or(i,v)
201 #define atomic64_xor(i,v) (void)ia64_atomic64_fetch_xor(i,v)
203 #define atomic64_fetch_and(i,v) ia64_atomic64_fetch_and(i,v)
204 #define atomic64_fetch_or(i,v) ia64_atomic64_fetch_or(i,v)
205 #define atomic64_fetch_xor(i,v) ia64_atomic64_fetch_xor(i,v)
208 #undef ATOMIC64_FETCH_OP
211 #define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new))
212 #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
214 #define atomic64_cmpxchg(v, old, new) \
215 (cmpxchg(&((v)->counter), old, new))
216 #define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
218 #define atomic_add(i,v) (void)atomic_add_return((i), (v))
219 #define atomic_sub(i,v) (void)atomic_sub_return((i), (v))
221 #define atomic64_add(i,v) (void)atomic64_add_return((i), (v))
222 #define atomic64_sub(i,v) (void)atomic64_sub_return((i), (v))
224 #endif /* _ASM_IA64_ATOMIC_H */