2 * Atomic operations for the Hexagon architecture
4 * Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
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8 * it under the terms of the GNU General Public License version 2 and
9 * only version 2 as published by the Free Software Foundation.
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13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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25 #include <linux/types.h>
26 #include <asm/cmpxchg.h>
27 #include <asm/barrier.h>
29 #define ATOMIC_INIT(i) { (i) }
31 /* Normal writes in our arch don't clear lock reservations */
33 static inline void atomic_set(atomic_t *v, int new)
36 "1: r6 = memw_locked(%0);\n"
37 " memw_locked(%0,p0) = %1;\n"
38 " if (!P0) jump 1b;\n"
40 : "r" (&v->counter), "r" (new)
41 : "memory", "p0", "r6"
45 #define atomic_set_release(v, i) atomic_set((v), (i))
48 * atomic_read - reads a word, atomically
49 * @v: pointer to atomic value
51 * Assumes all word reads on our architecture are atomic.
53 #define atomic_read(v) READ_ONCE((v)->counter)
56 * atomic_xchg - atomic
57 * @v: pointer to memory to change
58 * @new: new value (technically passed in a register -- see xchg)
60 #define atomic_xchg(v, new) (xchg(&((v)->counter), (new)))
64 * atomic_cmpxchg - atomic compare-and-exchange values
65 * @v: pointer to value to change
66 * @old: desired old value to match
67 * @new: new value to put in
69 * Parameters are then pointer, value-in-register, value-in-register,
70 * and the output is the old value.
72 * Apparently this is complicated for archs that don't support
73 * the memw_locked like we do (or it's broken or whatever).
75 * Kind of the lynchpin of the rest of the generically defined routines.
76 * Remember V2 had that bug with dotnew predicate set by memw_locked.
78 * "old" is "expected" old val, __oldval is actual old value
80 static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
85 "1: %0 = memw_locked(%1);\n"
86 " { P0 = cmp.eq(%0,%2);\n"
87 " if (!P0.new) jump:nt 2f; }\n"
88 " memw_locked(%1,P0) = %3;\n"
89 " if (!P0) jump 1b;\n"
92 : "r" (&v->counter), "r" (old), "r" (new)
99 #define ATOMIC_OP(op) \
100 static inline void atomic_##op(int i, atomic_t *v) \
104 __asm__ __volatile__ ( \
105 "1: %0 = memw_locked(%1);\n" \
106 " %0 = "#op "(%0,%2);\n" \
107 " memw_locked(%1,P3)=%0;\n" \
108 " if (!P3) jump 1b;\n" \
110 : "r" (&v->counter), "r" (i) \
115 #define ATOMIC_OP_RETURN(op) \
116 static inline int atomic_##op##_return(int i, atomic_t *v) \
120 __asm__ __volatile__ ( \
121 "1: %0 = memw_locked(%1);\n" \
122 " %0 = "#op "(%0,%2);\n" \
123 " memw_locked(%1,P3)=%0;\n" \
124 " if (!P3) jump 1b;\n" \
126 : "r" (&v->counter), "r" (i) \
132 #define ATOMIC_FETCH_OP(op) \
133 static inline int atomic_fetch_##op(int i, atomic_t *v) \
137 __asm__ __volatile__ ( \
138 "1: %0 = memw_locked(%2);\n" \
139 " %1 = "#op "(%0,%3);\n" \
140 " memw_locked(%2,P3)=%1;\n" \
141 " if (!P3) jump 1b;\n" \
142 : "=&r" (output), "=&r" (val) \
143 : "r" (&v->counter), "r" (i) \
149 #define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_OP_RETURN(op) ATOMIC_FETCH_OP(op)
155 #define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_FETCH_OP(op)
162 #undef ATOMIC_FETCH_OP
163 #undef ATOMIC_OP_RETURN
167 * __atomic_add_unless - add unless the number is a given value
168 * @v: pointer to value
170 * @u: unless value is equal to u
176 static inline int __atomic_add_unless(atomic_t *v, int a, int u)
182 "1: %0 = memw_locked(%2);"
184 " p3 = cmp.eq(%0, %4);"
185 " if (p3.new) jump:nt 2f;"
188 " memw_locked(%2, p3) = %1;"
193 : "=&r" (__oldval), "=&r" (tmp)
194 : "r" (v), "r" (a), "r" (u)
200 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
202 #define atomic_inc(v) atomic_add(1, (v))
203 #define atomic_dec(v) atomic_sub(1, (v))
205 #define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
206 #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
207 #define atomic_sub_and_test(i, v) (atomic_sub_return(i, (v)) == 0)
208 #define atomic_add_negative(i, v) (atomic_add_return(i, (v)) < 0)
210 #define atomic_inc_return(v) (atomic_add_return(1, v))
211 #define atomic_dec_return(v) (atomic_sub_return(1, v))