1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
4 #include <linux/init.h>
6 #include <linux/module.h>
7 #include <linux/sched.h>
9 #include <asm/mmu_context.h>
10 #include <asm/setup.h>
13 * One C-SKY MMU TLB entry contain two PFN/page entry, ie:
16 #define TLB_ENTRY_SIZE (PAGE_SIZE * 2)
17 #define TLB_ENTRY_SIZE_MASK (PAGE_MASK << 1)
19 void flush_tlb_all(void)
24 void flush_tlb_mm(struct mm_struct *mm)
26 #ifdef CONFIG_CPU_HAS_TLBI
40 * MMU operation regs only could invalid tlb entry in jtlb and we
41 * need change asid field to invalid I-utlb & D-utlb.
43 #ifndef CONFIG_CPU_HAS_TLBI
44 #define restore_asid_inv_utlb(oldpid, newpid) \
46 if (oldpid == newpid) \
47 write_mmu_entryhi(oldpid + 1); \
48 write_mmu_entryhi(oldpid); \
52 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
55 unsigned long newpid = cpu_asid(vma->vm_mm);
57 start &= TLB_ENTRY_SIZE_MASK;
58 end += TLB_ENTRY_SIZE - 1;
59 end &= TLB_ENTRY_SIZE_MASK;
61 #ifdef CONFIG_CPU_HAS_TLBI
67 : "r" (start | newpid)
72 asm volatile("sync.i\n");
75 unsigned long flags, oldpid;
77 local_irq_save(flags);
78 oldpid = read_mmu_entryhi() & ASID_MASK;
82 write_mmu_entryhi(start | newpid);
85 idx = read_mmu_index();
87 tlb_invalid_indexed();
89 restore_asid_inv_utlb(oldpid, newpid);
90 local_irq_restore(flags);
95 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
97 start &= TLB_ENTRY_SIZE_MASK;
98 end += TLB_ENTRY_SIZE - 1;
99 end &= TLB_ENTRY_SIZE_MASK;
101 #ifdef CONFIG_CPU_HAS_TLBI
103 while (start < end) {
110 start += 2*PAGE_SIZE;
112 asm volatile("sync.i\n");
115 unsigned long flags, oldpid;
117 local_irq_save(flags);
118 oldpid = read_mmu_entryhi() & ASID_MASK;
119 while (start < end) {
122 write_mmu_entryhi(start | oldpid);
123 start += 2*PAGE_SIZE;
125 idx = read_mmu_index();
127 tlb_invalid_indexed();
129 restore_asid_inv_utlb(oldpid, oldpid);
130 local_irq_restore(flags);
135 void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
137 int newpid = cpu_asid(vma->vm_mm);
139 addr &= TLB_ENTRY_SIZE_MASK;
141 #ifdef CONFIG_CPU_HAS_TLBI
147 : "r" (addr | newpid)
154 local_irq_save(flags);
155 oldpid = read_mmu_entryhi() & ASID_MASK;
156 write_mmu_entryhi(addr | newpid);
158 idx = read_mmu_index();
160 tlb_invalid_indexed();
162 restore_asid_inv_utlb(oldpid, newpid);
163 local_irq_restore(flags);
168 void flush_tlb_one(unsigned long addr)
170 addr &= TLB_ENTRY_SIZE_MASK;
172 #ifdef CONFIG_CPU_HAS_TLBI
185 local_irq_save(flags);
186 oldpid = read_mmu_entryhi() & ASID_MASK;
187 write_mmu_entryhi(addr | oldpid);
189 idx = read_mmu_index();
191 tlb_invalid_indexed();
193 restore_asid_inv_utlb(oldpid, oldpid);
194 local_irq_restore(flags);
198 EXPORT_SYMBOL(flush_tlb_one);