1 # SPDX-License-Identifier: GPL-2.0-only
4 select ARCH_32BIT_OFF_T
5 select ARCH_HAS_DMA_PREP_COHERENT
6 select ARCH_HAS_GCOV_PROFILE_ALL
7 select ARCH_HAS_SYNC_DMA_FOR_CPU
8 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
9 select ARCH_USE_BUILTIN_BSWAP
10 select ARCH_USE_QUEUED_RWLOCKS
11 select ARCH_USE_QUEUED_SPINLOCKS
12 select ARCH_INLINE_READ_LOCK if !PREEMPTION
13 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
14 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
15 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
16 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
17 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
18 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
19 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
20 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
21 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
22 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
23 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
24 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
25 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
26 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
27 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
28 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
29 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
30 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
31 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
32 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
33 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
34 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
35 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
36 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
37 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
38 select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
39 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
42 select CSKY_MPINTC if CPU_CK860
43 select CSKY_MP_TIMER if CPU_CK860
45 select DMA_DIRECT_REMAP
47 select DW_APB_TIMER_OF
48 select GENERIC_IOREMAP
49 select GENERIC_LIB_ASHLDI3
50 select GENERIC_LIB_ASHRDI3
51 select GENERIC_LIB_LSHRDI3
52 select GENERIC_LIB_MULDI3
53 select GENERIC_LIB_CMPDI2
54 select GENERIC_LIB_UCMPDI2
55 select GENERIC_ALLOCATOR
56 select GENERIC_ATOMIC64
57 select GENERIC_CPU_DEVICES
58 select GENERIC_IRQ_CHIP
59 select GENERIC_IRQ_PROBE
60 select GENERIC_IRQ_SHOW
61 select GENERIC_IRQ_MULTI_HANDLER
62 select GENERIC_SCHED_CLOCK
63 select GENERIC_SMP_IDLE_THREAD
64 select GENERIC_TIME_VSYSCALL
65 select GENERIC_VDSO_32
66 select GENERIC_GETTIMEOFDAY
67 select GX6605S_TIMER if CPU_CK610
68 select HAVE_ARCH_TRACEHOOK
69 select HAVE_ARCH_AUDITSYSCALL
70 select HAVE_ARCH_JUMP_LABEL if !CPU_CK610
71 select HAVE_ARCH_JUMP_LABEL_RELATIVE
72 select HAVE_ARCH_MMAP_RND_BITS
73 select HAVE_ARCH_SECCOMP_FILTER
74 select HAVE_CONTEXT_TRACKING_USER
75 select HAVE_VIRT_CPU_ACCOUNTING_GEN
76 select HAVE_DEBUG_BUGVERBOSE
77 select HAVE_DEBUG_KMEMLEAK
78 select HAVE_DYNAMIC_FTRACE
79 select HAVE_DYNAMIC_FTRACE_WITH_REGS
80 select HAVE_GENERIC_VDSO
81 select HAVE_FUNCTION_TRACER
82 select HAVE_FUNCTION_GRAPH_TRACER
83 select HAVE_FUNCTION_ERROR_INJECTION
84 select HAVE_FTRACE_MCOUNT_RECORD
85 select HAVE_KERNEL_GZIP
86 select HAVE_KERNEL_LZO
87 select HAVE_KERNEL_LZMA
88 select HAVE_KPROBES if !CPU_CK610
89 select HAVE_KPROBES_ON_FTRACE if !CPU_CK610
90 select HAVE_KRETPROBES if !CPU_CK610
91 select HAVE_PERF_EVENTS
93 select HAVE_PERF_USER_STACK_DUMP
94 select HAVE_DMA_CONTIGUOUS
95 select HAVE_REGS_AND_STACK_ACCESS_API
97 select HAVE_STACKPROTECTOR
98 select HAVE_SYSCALL_TRACEPOINTS
99 select LOCK_MM_AND_FIND_VMA
100 select MAY_HAVE_SPARSE_IRQ
101 select MODULES_USE_ELF_RELA if MODULES
103 select OF_EARLY_FLATTREE
104 select PERF_USE_VMALLOC if CPU_CK610
107 select GENERIC_PCI_IOMAP
109 select PCI_DOMAINS_GENERIC if PCI
110 select PCI_SYSCALL if PCI
111 select PCI_MSI if PCI
112 select TRACE_IRQFLAGS_SUPPORT
114 config LOCKDEP_SUPPORT
117 config ARCH_SUPPORTS_UPROBES
118 def_bool y if !CPU_CK610
120 config CPU_HAS_CACHEV2
132 config CPU_HAS_LDSTEX
135 For SMP, CPU needs "ldex&stex" instructions for atomic operations.
137 config CPU_NEED_TLBSYNC
140 config CPU_NEED_SOFTALIGN
143 config CPU_NO_USER_BKPT
146 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
147 abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
148 So we need a 16bit instruction as user space bkpt, and it will cause an illegal
149 instruction exception.
150 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
152 config GENERIC_CALIBRATE_DELAY
158 config GENERIC_HWEIGHT
164 config STACKTRACE_SUPPORT
172 default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
173 default "1024" if (CPU_CK860)
177 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
178 default "12" if (CPU_CK860)
180 config L1_CACHE_SHIFT
182 default "4" if (CPU_CK610)
183 default "5" if (CPU_CK807 || CPU_CK810)
184 default "6" if (CPU_CK860)
186 config ARCH_MMAP_RND_BITS_MIN
189 # max bits determined by the following formula:
190 # VA_BITS - PAGE_SHIFT - 3
191 config ARCH_MMAP_RND_BITS_MAX
194 menu "Processor type and features"
201 bool "CSKY CPU ck610"
202 select CPU_NEED_TLBSYNC
203 select CPU_NEED_SOFTALIGN
204 select CPU_NO_USER_BKPT
207 bool "CSKY CPU ck810"
209 select CPU_NEED_TLBSYNC
212 bool "CSKY CPU ck807"
216 bool "CSKY CPU ck860"
218 select CPU_HAS_CACHEV2
219 select CPU_HAS_LDSTEX
225 default PAGE_OFFSET_80000000
227 config PAGE_OFFSET_80000000
228 bool "PAGE OFFSET 2G (user:kernel = 2:2)"
230 config PAGE_OFFSET_A0000000
231 bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)"
236 default 0x80000000 if PAGE_OFFSET_80000000
237 default 0xa0000000 if PAGE_OFFSET_A0000000
240 prompt "C-SKY PMU type"
241 depends on PERF_EVENTS
242 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
248 bool "Performance Monitoring Unit Ver.1"
253 prompt "Power Manager Instruction (wait/doze/stop)"
270 bool "Tightly-Coupled/Sram Memory"
271 depends on !COMPILE_TEST
273 The implementation are not only used by TCM (Tightly-Coupled Meory)
274 but also used by sram on SOC bus. It follow existed linux tcm
275 software interface, so that old tcm application codes could be
284 int "Page count of ITCM size: NR*4KB"
297 int "Page count of DTCM size: NR*4KB"
304 bool "CPU has VDSP coprocessor"
305 depends on CPU_HAS_FPU && CPU_HAS_FPUV2
308 bool "CPU has FPU coprocessor"
309 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
311 config CPU_HAS_ICACHE_INS
312 bool "CPU has Icache invalidate instructions"
313 depends on CPU_HAS_CACHEV2
316 bool "CPU has Trusted Execution Environment"
320 bool "Symmetric Multi-Processing (SMP) support for C-SKY"
325 int "Maximum number of CPUs (2-32)"
331 bool "High Memory Support"
332 depends on !CPU_CK610
336 config ARCH_FORCE_MAX_ORDER
337 int "Maximum zone order"
341 hex "DRAM start addr (the same with memory-section in dts)"
345 bool "Support for hot-pluggable CPUs"
346 select GENERIC_IRQ_MIGRATION
349 Say Y here to allow turning CPUs off and on. CPUs can be
350 controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
352 Say N if you want to disable CPU hotplug.
354 config HAVE_EFFICIENT_UNALIGNED_STRING_OPS
355 bool "Enable EFFICIENT_UNALIGNED_STRING_OPS for abiv2"
356 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
358 Say Y here to enable EFFICIENT_UNALIGNED_STRING_OPS. Some CPU models could
359 deal with unaligned access by hardware.
363 source "arch/csky/Kconfig.platforms"
365 source "kernel/Kconfig.hz"