1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_ARCH_IRQ_H
3 #define _ASM_ARCH_IRQ_H
5 #include <hwregs/intr_vect.h>
7 /* Number of non-cpu interrupts. */
8 #define NR_IRQS (NBR_INTR_VECT + 256) /* Exceptions + IRQs */
9 #define FIRST_IRQ 0x31 /* Exception number for first IRQ */
10 #define NR_REAL_IRQS (NBR_INTR_VECT - FIRST_IRQ) /* IRQs */
18 /* Global IRQ vector. */
19 typedef void (*irqvectptr)(void);
21 struct etrax_interrupt_vector {
25 extern struct etrax_interrupt_vector *etrax_irv; /* head.S */
27 void crisv32_mask_irq(int irq);
28 void crisv32_unmask_irq(int irq);
30 void set_exception_vector(int n, irqvectptr addr);
32 /* Save registers so that they match pt_regs. */
35 "move $erp,[$sp]\n\t" \
37 "move $srp,[$sp]\n\t" \
39 "move $ccs,[$sp]\n\t" \
41 "move $spc,[$sp]\n\t" \
43 "move $mof,[$sp]\n\t" \
45 "move $srs,[$sp]\n\t" \
47 "move.d $acr,[$sp]\n\t" \
49 "movem $r13,[$sp]\n\t" \
54 #define STR(x) STR2(x)
56 #define IRQ_NAME2(nr) nr##_interrupt(void)
57 #define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr)
60 * The reason for setting the S-bit when debugging the kernel is that we want
61 * hardware breakpoints to remain active while we are in an exception handler.
62 * Note that we cannot simply copy S1, since we may come here from user-space,
63 * or any context where the S-bit wasn't set.
65 #ifdef CONFIG_ETRAX_KGDB
67 "move $ccs, $r10\n\t" \
68 "or.d (1<<9), $r10\n\t" \
75 * Make sure the causing IRQ is blocked, then call do_IRQ. After that, unblock
76 * and jump to ret_from_intr which is found in entry.S.
78 * The reason for blocking the IRQ is to allow an sti() before the handler,
79 * which will acknowledge the interrupt, is run. The actual blocking is made
82 #define BUILD_IRQ(nr) \
86 "IRQ" #nr "_interrupt:\n\t" \
89 "move.d "#nr",$r10\n\t" \
90 "move.d $sp, $r12\n\t" \
91 "jsr crisv32_do_IRQ\n\t" \
93 "jump ret_from_intr\n\t" \
96 * This is subtle. The timer interrupt is crucial and it should not be disabled
97 * for too long. However, if it had been a normal interrupt as per BUILD_IRQ, it
98 * would have been BLOCK'ed, and then softirq's are run before we return here to
99 * UNBLOCK. If the softirq's take too much time to run, the timer irq won't run
100 * and the watchdog will kill us.
102 * Furthermore, if a lot of other irq's occur before we return here, the
103 * multiple_irq handler is run and it prioritizes the timer interrupt. However
104 * if we had BLOCK'edit here, we would not get the multiple_irq at all.
106 * The non-blocking here is based on the knowledge that the timer interrupt runs
107 * with interrupts disabled, and therefore there will not be an sti() before the
108 * timer irq handler is run to acknowledge the interrupt.
110 #define BUILD_TIMER_IRQ(nr, mask) \
114 "IRQ" #nr "_interrupt:\n\t" \
117 "move.d "#nr",$r10\n\t" \
118 "move.d $sp,$r12\n\t" \
119 "jsr crisv32_do_IRQ\n\t" \
121 "jump ret_from_intr\n\t" \
124 #endif /* __ASSEMBLY__ */
125 #endif /* _ASM_ARCH_IRQ_H */