2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
6 * Licensed under the GPL-2 or later.
9 #include <linux/device.h>
10 #include <linux/export.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/flash.h>
18 #include <linux/i2c.h>
19 #include <linux/irq.h>
20 #include <linux/interrupt.h>
22 #include <asm/bfin5xx_spi.h>
23 #include <asm/reboot.h>
24 #include <asm/portmux.h>
26 #include <asm/bfin_sdh.h>
27 #include <linux/spi/ad7877.h>
31 * Name the Board for the /proc/cpuinfo
33 const char bfin_board_name[] = "ADI BF518F-EZBRD";
36 * Driver needs to know address, irq and flag pin.
39 #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
40 static struct mtd_partition ezbrd_partitions[] = {
42 .name = "bootloader(nor)",
46 .name = "linux kernel(nor)",
48 .offset = MTDPART_OFS_APPEND,
50 .name = "file system(nor)",
51 .size = MTDPART_SIZ_FULL,
52 .offset = MTDPART_OFS_APPEND,
56 static struct physmap_flash_data ezbrd_flash_data = {
58 .parts = ezbrd_partitions,
59 .nr_parts = ARRAY_SIZE(ezbrd_partitions),
62 static struct resource ezbrd_flash_resource = {
64 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
69 .flags = IORESOURCE_MEM,
72 static struct platform_device ezbrd_flash_device = {
73 .name = "physmap-flash",
76 .platform_data = &ezbrd_flash_data,
79 .resource = &ezbrd_flash_resource,
83 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
84 static struct platform_device rtc_device = {
90 #if IS_ENABLED(CONFIG_BFIN_MAC)
91 #include <linux/bfin_mac.h>
92 static const unsigned short bfin_mac_peripherals[] = {
106 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
108 #if IS_ENABLED(CONFIG_NET_DSA_KSZ8893M)
113 .irq = IRQ_MAC_PHYINT,
117 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
119 .phydev_data = bfin_phydev_data,
120 .phy_mode = PHY_INTERFACE_MODE_MII,
121 .mac_peripherals = bfin_mac_peripherals,
122 #if IS_ENABLED(CONFIG_NET_DSA_KSZ8893M)
123 .phy_mask = 0xfff7, /* Only probe the port phy connect to the on chip MAC */
129 static struct platform_device bfin_mii_bus = {
130 .name = "bfin_mii_bus",
132 .platform_data = &bfin_mii_bus_data,
136 static struct platform_device bfin_mac_device = {
139 .platform_data = &bfin_mii_bus,
143 #if IS_ENABLED(CONFIG_NET_DSA_KSZ8893M)
144 static struct dsa_chip_data ksz8893m_switch_chip_data = {
145 .mii_bus = &bfin_mii_bus.dev,
153 static struct dsa_platform_data ksz8893m_switch_data = {
155 .netdev = &bfin_mac_device.dev,
156 .chip = &ksz8893m_switch_chip_data,
159 static struct platform_device ksz8893m_switch_device = {
163 .dev.platform_data = &ksz8893m_switch_data,
168 #if IS_ENABLED(CONFIG_MTD_M25P80)
169 static struct mtd_partition bfin_spi_flash_partitions[] = {
171 .name = "bootloader(spi)",
174 .mask_flags = MTD_CAP_ROM
176 .name = "linux kernel(spi)",
177 .size = MTDPART_SIZ_FULL,
178 .offset = MTDPART_OFS_APPEND,
182 static struct flash_platform_data bfin_spi_flash_data = {
184 .parts = bfin_spi_flash_partitions,
185 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
189 /* SPI flash chip (m25p64) */
190 static struct bfin5xx_spi_chip spi_flash_chip_info = {
191 .enable_dma = 0, /* use dma transfer with this chip*/
195 #if IS_ENABLED(CONFIG_MMC_SPI)
196 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
201 #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
202 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
204 .vref_delay_usecs = 50, /* internal, no capacitor */
207 .pressure_max = 1000,
209 .stopacq_polarity = 1,
210 .first_conversion_delay = 3,
211 .acquisition_time = 1,
213 .pen_down_acc_interval = 1,
217 static struct spi_board_info bfin_spi_board_info[] __initdata = {
218 #if IS_ENABLED(CONFIG_MTD_M25P80)
220 /* the modalias must be the same as spi device driver name */
221 .modalias = "m25p80", /* Name of spi_driver for this device */
222 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
223 .bus_num = 0, /* Framework bus number */
224 .chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */
225 .platform_data = &bfin_spi_flash_data,
226 .controller_data = &spi_flash_chip_info,
231 #if IS_ENABLED(CONFIG_BFIN_MAC)
232 #if IS_ENABLED(CONFIG_NET_DSA_KSZ8893M)
234 .modalias = "ksz8893m",
235 .max_speed_hz = 5000000,
238 .platform_data = NULL,
244 #if IS_ENABLED(CONFIG_MMC_SPI)
246 .modalias = "mmc_spi",
247 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
250 .controller_data = &mmc_spi_chip_info,
254 #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
256 .modalias = "ad7877",
257 .platform_data = &bfin_ad7877_ts_info,
259 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
264 #if IS_ENABLED(CONFIG_SND_SOC_WM8731) \
265 && defined(CONFIG_SND_SOC_WM8731_SPI)
267 .modalias = "wm8731",
268 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
274 #if IS_ENABLED(CONFIG_SPI_SPIDEV)
276 .modalias = "spidev",
277 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
282 #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
284 .modalias = "bfin-lq035q1-spi",
285 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
288 .mode = SPI_CPHA | SPI_CPOL,
293 /* SPI controller data */
294 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
296 static struct bfin5xx_spi_master bfin_spi0_info = {
298 .enable_dma = 1, /* master has the ability to do dma transfer */
299 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
302 static struct resource bfin_spi0_resource[] = {
304 .start = SPI0_REGBASE,
305 .end = SPI0_REGBASE + 0xFF,
306 .flags = IORESOURCE_MEM,
311 .flags = IORESOURCE_DMA,
316 .flags = IORESOURCE_IRQ,
320 static struct platform_device bfin_spi0_device = {
322 .id = 0, /* Bus number */
323 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
324 .resource = bfin_spi0_resource,
326 .platform_data = &bfin_spi0_info, /* Passed to driver */
331 static struct bfin5xx_spi_master bfin_spi1_info = {
333 .enable_dma = 1, /* master has the ability to do dma transfer */
334 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
337 static struct resource bfin_spi1_resource[] = {
339 .start = SPI1_REGBASE,
340 .end = SPI1_REGBASE + 0xFF,
341 .flags = IORESOURCE_MEM,
346 .flags = IORESOURCE_DMA,
351 .flags = IORESOURCE_IRQ,
355 static struct platform_device bfin_spi1_device = {
357 .id = 1, /* Bus number */
358 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
359 .resource = bfin_spi1_resource,
361 .platform_data = &bfin_spi1_info, /* Passed to driver */
364 #endif /* spi master and devices */
366 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
367 #ifdef CONFIG_SERIAL_BFIN_UART0
368 static struct resource bfin_uart0_resources[] = {
372 .flags = IORESOURCE_MEM,
375 .start = IRQ_UART0_TX,
377 .flags = IORESOURCE_IRQ,
380 .start = IRQ_UART0_RX,
382 .flags = IORESOURCE_IRQ,
385 .start = IRQ_UART0_ERROR,
386 .end = IRQ_UART0_ERROR,
387 .flags = IORESOURCE_IRQ,
390 .start = CH_UART0_TX,
392 .flags = IORESOURCE_DMA,
395 .start = CH_UART0_RX,
397 .flags = IORESOURCE_DMA,
401 static unsigned short bfin_uart0_peripherals[] = {
402 P_UART0_TX, P_UART0_RX, 0
405 static struct platform_device bfin_uart0_device = {
408 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
409 .resource = bfin_uart0_resources,
411 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
415 #ifdef CONFIG_SERIAL_BFIN_UART1
416 static struct resource bfin_uart1_resources[] = {
420 .flags = IORESOURCE_MEM,
423 .start = IRQ_UART1_TX,
425 .flags = IORESOURCE_IRQ,
428 .start = IRQ_UART1_RX,
430 .flags = IORESOURCE_IRQ,
433 .start = IRQ_UART1_ERROR,
434 .end = IRQ_UART1_ERROR,
435 .flags = IORESOURCE_IRQ,
438 .start = CH_UART1_TX,
440 .flags = IORESOURCE_DMA,
443 .start = CH_UART1_RX,
445 .flags = IORESOURCE_DMA,
449 static unsigned short bfin_uart1_peripherals[] = {
450 P_UART1_TX, P_UART1_RX, 0
453 static struct platform_device bfin_uart1_device = {
456 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
457 .resource = bfin_uart1_resources,
459 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
465 #if IS_ENABLED(CONFIG_BFIN_SIR)
466 #ifdef CONFIG_BFIN_SIR0
467 static struct resource bfin_sir0_resources[] = {
471 .flags = IORESOURCE_MEM,
474 .start = IRQ_UART0_RX,
475 .end = IRQ_UART0_RX+1,
476 .flags = IORESOURCE_IRQ,
479 .start = CH_UART0_RX,
480 .end = CH_UART0_RX+1,
481 .flags = IORESOURCE_DMA,
485 static struct platform_device bfin_sir0_device = {
488 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
489 .resource = bfin_sir0_resources,
492 #ifdef CONFIG_BFIN_SIR1
493 static struct resource bfin_sir1_resources[] = {
497 .flags = IORESOURCE_MEM,
500 .start = IRQ_UART1_RX,
501 .end = IRQ_UART1_RX+1,
502 .flags = IORESOURCE_IRQ,
505 .start = CH_UART1_RX,
506 .end = CH_UART1_RX+1,
507 .flags = IORESOURCE_DMA,
511 static struct platform_device bfin_sir1_device = {
514 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
515 .resource = bfin_sir1_resources,
520 #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
521 static struct platform_device bfin_i2s = {
523 .id = CONFIG_SND_BF5XX_SPORT_NUM,
524 /* TODO: add platform data here */
528 #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
529 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
531 static struct resource bfin_twi0_resource[] = {
533 .start = TWI0_REGBASE,
535 .flags = IORESOURCE_MEM,
540 .flags = IORESOURCE_IRQ,
544 static struct platform_device i2c_bfin_twi_device = {
545 .name = "i2c-bfin-twi",
547 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
548 .resource = bfin_twi0_resource,
550 .platform_data = &bfin_twi0_pins,
555 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
556 #if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
558 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
561 #if IS_ENABLED(CONFIG_INPUT_PCF8574)
563 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
567 #if IS_ENABLED(CONFIG_SND_SOC_SSM2602)
569 I2C_BOARD_INFO("ssm2602", 0x1b),
574 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
575 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
576 static struct resource bfin_sport0_uart_resources[] = {
578 .start = SPORT0_TCR1,
579 .end = SPORT0_MRCS3+4,
580 .flags = IORESOURCE_MEM,
583 .start = IRQ_SPORT0_RX,
584 .end = IRQ_SPORT0_RX+1,
585 .flags = IORESOURCE_IRQ,
588 .start = IRQ_SPORT0_ERROR,
589 .end = IRQ_SPORT0_ERROR,
590 .flags = IORESOURCE_IRQ,
594 static unsigned short bfin_sport0_peripherals[] = {
595 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
596 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
599 static struct platform_device bfin_sport0_uart_device = {
600 .name = "bfin-sport-uart",
602 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
603 .resource = bfin_sport0_uart_resources,
605 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
609 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
610 static struct resource bfin_sport1_uart_resources[] = {
612 .start = SPORT1_TCR1,
613 .end = SPORT1_MRCS3+4,
614 .flags = IORESOURCE_MEM,
617 .start = IRQ_SPORT1_RX,
618 .end = IRQ_SPORT1_RX+1,
619 .flags = IORESOURCE_IRQ,
622 .start = IRQ_SPORT1_ERROR,
623 .end = IRQ_SPORT1_ERROR,
624 .flags = IORESOURCE_IRQ,
628 static unsigned short bfin_sport1_peripherals[] = {
629 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
630 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
633 static struct platform_device bfin_sport1_uart_device = {
634 .name = "bfin-sport-uart",
636 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
637 .resource = bfin_sport1_uart_resources,
639 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
645 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
646 #include <linux/input.h>
647 #include <linux/gpio_keys.h>
649 static struct gpio_keys_button bfin_gpio_keys_table[] = {
650 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
651 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
654 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
655 .buttons = bfin_gpio_keys_table,
656 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
659 static struct platform_device bfin_device_gpiokeys = {
662 .platform_data = &bfin_gpio_keys_data,
667 #if IS_ENABLED(CONFIG_SDH_BFIN)
669 static struct bfin_sd_host bfin_sdh_data = {
671 .irq_int0 = IRQ_RSI_INT0,
672 .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
675 static struct platform_device bf51x_sdh_device = {
679 .platform_data = &bfin_sdh_data,
684 static const unsigned int cclk_vlev_datasheet[] =
686 VRPAIR(VLEV_100, 400000000),
687 VRPAIR(VLEV_105, 426000000),
688 VRPAIR(VLEV_110, 500000000),
689 VRPAIR(VLEV_115, 533000000),
690 VRPAIR(VLEV_120, 600000000),
693 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
694 .tuple_tab = cclk_vlev_datasheet,
695 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
696 .vr_settling_time = 25 /* us */,
699 static struct platform_device bfin_dpmc = {
702 .platform_data = &bfin_dmpc_vreg_data,
706 static struct platform_device *stamp_devices[] __initdata = {
710 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
714 #if IS_ENABLED(CONFIG_BFIN_MAC)
717 #if IS_ENABLED(CONFIG_NET_DSA_KSZ8893M)
718 &ksz8893m_switch_device,
722 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
727 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
728 #ifdef CONFIG_SERIAL_BFIN_UART0
731 #ifdef CONFIG_SERIAL_BFIN_UART1
736 #if IS_ENABLED(CONFIG_BFIN_SIR)
737 #ifdef CONFIG_BFIN_SIR0
740 #ifdef CONFIG_BFIN_SIR1
745 #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
746 &i2c_bfin_twi_device,
749 #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
753 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
754 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
755 &bfin_sport0_uart_device,
757 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
758 &bfin_sport1_uart_device,
762 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
763 &bfin_device_gpiokeys,
766 #if IS_ENABLED(CONFIG_SDH_BFIN)
770 #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
775 static int __init ezbrd_init(void)
777 printk(KERN_INFO "%s(): registering device resources\n", __func__);
778 i2c_register_board_info(0, bfin_i2c_board_info,
779 ARRAY_SIZE(bfin_i2c_board_info));
780 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
781 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
782 /* setup BF518-EZBRD GPIO pin PG11 to AMS2, PG15 to AMS3. */
783 peripheral_request(P_AMS2, "ParaFlash");
784 #if !IS_ENABLED(CONFIG_SPI_BFIN5XX)
785 peripheral_request(P_AMS3, "ParaFlash");
790 arch_initcall(ezbrd_init);
792 static struct platform_device *ezbrd_early_devices[] __initdata = {
793 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
794 #ifdef CONFIG_SERIAL_BFIN_UART0
797 #ifdef CONFIG_SERIAL_BFIN_UART1
802 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
803 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
804 &bfin_sport0_uart_device,
806 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
807 &bfin_sport1_uart_device,
812 void __init native_machine_early_platform_add_devices(void)
814 printk(KERN_INFO "register early platform devices\n");
815 early_platform_add_devices(ezbrd_early_devices,
816 ARRAY_SIZE(ezbrd_early_devices));
819 void native_machine_restart(char *cmd)
821 /* workaround reboot hang when booting from SPI */
822 if ((bfin_read_SYSCR() & 0x7) == 0x3)
823 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
826 int bfin_get_ether_addr(char *addr)
828 /* the MAC is stored in OTP memory page 0xDF */
831 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
833 ret = otp_read(0xDF, 0x00, &otp_mac);
835 char *otp_mac_p = (char *)&otp_mac;
836 for (ret = 0; ret < 6; ++ret)
837 addr[ret] = otp_mac_p[5 - ret];
841 EXPORT_SYMBOL(bfin_get_ether_addr);