1 # SPDX-License-Identifier: GPL-2.0-only
3 # System register metadata
5 # Each System register is described by a Sysreg block:
7 # Sysreg <name> <op0> <op1> <crn> <crm> <op2>
12 # Within a Sysreg block, each field can be described as one of:
18 # Field <msb>[:<lsb>] <name>
20 # Enum <msb>[:<lsb>] <name>
21 # <enumval> <enumname>
25 # Alternatively if multiple registers share the same layout then
26 # a SysregFields block can be used to describe the shared layout
28 # SysregFields <fieldsname>
33 # and referenced from within the Sysreg:
35 # Sysreg <name> <op0> <op1> <crn> <crm> <op2>
39 # For ID registers we adopt a few conventions for translating the
40 # language in the ARM into defines:
42 # NI - Not implemented
45 # In general it is recommended that new enumeration items be named for the
46 # feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration
47 # item ACCDATA) though it may be more taseful to do something else.
49 Sysreg ID_AA64PFR0_EL1 3 0 0 4 0
125 Sysreg ID_AA64PFR1_EL1 3 0 0 4 1
170 Sysreg ID_AA64ZFR0_EL1 3 0 0 4 4
216 Sysreg ID_AA64SMFR0_EL1 3 0 0 4 5
255 Sysreg ID_AA64DFR0_EL1 3 0 0 5 0
271 Enum 47:44 TraceBuffer
279 Enum 39:36 DoubleLock
318 Sysreg ID_AA64DFR1_EL1 3 0 0 5 1
322 Sysreg ID_AA64AFR0_EL1 3 0 0 5 4
334 Sysreg ID_AA64AFR1_EL1 3 0 0 5 5
338 Sysreg ID_AA64ISAR0_EL1 3 0 0 6 0
406 Sysreg ID_AA64ISAR1_EL1 3 0 0 6 1
486 Sysreg ID_AA64ISAR2_EL1 3 0 0 6 2
526 Sysreg ID_AA64MMFR0_EL1 3 0 0 7 0
599 Sysreg ID_AA64MMFR1_EL1 3 0 0 7 1
670 Sysreg ID_AA64MMFR2_EL1 3 0 0 7 2
737 Sysreg SCTLR_EL1 3 0 1 0 0
808 SysregFields CPACR_ELx
820 Sysreg CPACR_EL1 3 0 1 0 2
824 Sysreg SMPRI_EL1 3 0 1 2 4
835 Sysreg ZCR_EL1 3 0 1 2 0
839 SysregFields SMCR_ELx
847 Sysreg SMCR_EL1 3 0 1 2 6
851 Sysreg ALLINT 3 0 4 3 0
857 Sysreg FAR_EL1 3 0 6 0 0
861 SysregFields CONTEXTIDR_ELx
866 Sysreg CONTEXTIDR_EL1 3 0 13 0 1
867 Fields CONTEXTIDR_ELx
870 Sysreg TPIDR_EL1 3 0 13 0 4
874 Sysreg SCXTNUM_EL1 3 0 13 0 7
875 Field 63:0 SoftwareContextNumber
878 Sysreg CLIDR_EL1 3 1 0 0 1
894 Sysreg GMID_EL1 3 1 0 0 4
899 Sysreg SMIDR_EL1 3 1 0 0 6
901 Field 31:24 IMPLEMENTER
908 Sysreg CSSELR_EL1 3 2 0 0 0
915 Sysreg CTR_EL0 3 3 0 0 1
927 # This is named as AIVIVT in the ARM but documented as reserved
936 Sysreg DCZID_EL0 3 3 0 0 7
942 Sysreg SVCR 3 3 4 2 2
948 Sysreg ZCR_EL2 3 4 1 2 0
952 Sysreg HCRX_EL2 3 4 1 2 2
968 Sysreg SMPRIMAP_EL2 3 4 1 2 5
987 Sysreg SMCR_EL2 3 4 1 2 6
991 Sysreg DACR32_EL2 3 4 3 0 0
1011 Sysreg FAR_EL2 3 4 6 0 0
1015 Sysreg CONTEXTIDR_EL2 3 4 13 0 1
1016 Fields CONTEXTIDR_ELx
1019 Sysreg CPACR_EL12 3 5 1 0 2
1023 Sysreg ZCR_EL12 3 5 1 2 0
1027 Sysreg SMCR_EL12 3 5 1 2 6
1031 Sysreg FAR_EL12 3 5 6 0 0
1035 Sysreg CONTEXTIDR_EL12 3 5 13 0 1
1036 Fields CONTEXTIDR_ELx
1039 SysregFields TTBRx_EL1
1045 Sysreg TTBR0_EL1 3 0 2 0 0
1049 Sysreg TTBR1_EL1 3 0 2 0 1
1053 Sysreg LORSA_EL1 3 0 10 4 0
1060 Sysreg LOREA_EL1 3 0 10 4 1
1062 Field 51:48 EA_51_48
1063 Field 47:16 EA_47_16
1067 Sysreg LORN_EL1 3 0 10 4 2
1072 Sysreg LORC_EL1 3 0 10 4 3
1079 Sysreg LORID_EL1 3 0 10 4 7