1 // SPDX-License-Identifier: GPL-2.0-only
3 * Based on arch/arm/mm/fault.c
5 * Copyright (C) 1995 Linus Torvalds
6 * Copyright (C) 1995-2004 Russell King
7 * Copyright (C) 2012 ARM Ltd.
10 #include <linux/acpi.h>
11 #include <linux/bitfield.h>
12 #include <linux/extable.h>
13 #include <linux/kfence.h>
14 #include <linux/signal.h>
16 #include <linux/hardirq.h>
17 #include <linux/init.h>
18 #include <linux/kasan.h>
19 #include <linux/kprobes.h>
20 #include <linux/uaccess.h>
21 #include <linux/page-flags.h>
22 #include <linux/sched/signal.h>
23 #include <linux/sched/debug.h>
24 #include <linux/highmem.h>
25 #include <linux/perf_event.h>
26 #include <linux/preempt.h>
27 #include <linux/hugetlb.h>
31 #include <asm/cmpxchg.h>
32 #include <asm/cpufeature.h>
34 #include <asm/exception.h>
35 #include <asm/daifflags.h>
36 #include <asm/debug-monitors.h>
38 #include <asm/kprobes.h>
40 #include <asm/processor.h>
41 #include <asm/sysreg.h>
42 #include <asm/system_misc.h>
43 #include <asm/tlbflush.h>
44 #include <asm/traps.h>
47 int (*fn)(unsigned long far, unsigned long esr,
48 struct pt_regs *regs);
54 static const struct fault_info fault_info[];
55 static struct fault_info debug_fault_info[];
57 static inline const struct fault_info *esr_to_fault_info(unsigned long esr)
59 return fault_info + (esr & ESR_ELx_FSC);
62 static inline const struct fault_info *esr_to_debug_fault_info(unsigned long esr)
64 return debug_fault_info + DBG_ESR_EVT(esr);
67 static void data_abort_decode(unsigned long esr)
69 pr_alert("Data abort info:\n");
71 if (esr & ESR_ELx_ISV) {
72 pr_alert(" Access size = %u byte(s)\n",
73 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT));
74 pr_alert(" SSE = %lu, SRT = %lu\n",
75 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT,
76 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT);
77 pr_alert(" SF = %lu, AR = %lu\n",
78 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT,
79 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT);
81 pr_alert(" ISV = 0, ISS = 0x%08lx\n", esr & ESR_ELx_ISS_MASK);
84 pr_alert(" CM = %lu, WnR = %lu\n",
85 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT,
86 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT);
89 static void mem_abort_decode(unsigned long esr)
91 pr_alert("Mem abort info:\n");
93 pr_alert(" ESR = 0x%016lx\n", esr);
94 pr_alert(" EC = 0x%02lx: %s, IL = %u bits\n",
95 ESR_ELx_EC(esr), esr_get_class_string(esr),
96 (esr & ESR_ELx_IL) ? 32 : 16);
97 pr_alert(" SET = %lu, FnV = %lu\n",
98 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT,
99 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT);
100 pr_alert(" EA = %lu, S1PTW = %lu\n",
101 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT,
102 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT);
103 pr_alert(" FSC = 0x%02lx: %s\n", (esr & ESR_ELx_FSC),
104 esr_to_fault_info(esr)->name);
106 if (esr_is_data_abort(esr))
107 data_abort_decode(esr);
110 static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm)
112 /* Either init_pg_dir or swapper_pg_dir */
114 return __pa_symbol(mm->pgd);
116 return (unsigned long)virt_to_phys(mm->pgd);
120 * Dump out the page tables associated with 'addr' in the currently active mm.
122 static void show_pte(unsigned long addr)
124 struct mm_struct *mm;
128 if (is_ttbr0_addr(addr)) {
130 mm = current->active_mm;
131 if (mm == &init_mm) {
132 pr_alert("[%016lx] user address but active_mm is swapper\n",
136 } else if (is_ttbr1_addr(addr)) {
140 pr_alert("[%016lx] address between user and kernel address ranges\n",
145 pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n",
146 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K,
147 vabits_actual, mm_to_pgd_phys(mm));
148 pgdp = pgd_offset(mm, addr);
149 pgd = READ_ONCE(*pgdp);
150 pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd));
158 if (pgd_none(pgd) || pgd_bad(pgd))
161 p4dp = p4d_offset(pgdp, addr);
162 p4d = READ_ONCE(*p4dp);
163 pr_cont(", p4d=%016llx", p4d_val(p4d));
164 if (p4d_none(p4d) || p4d_bad(p4d))
167 pudp = pud_offset(p4dp, addr);
168 pud = READ_ONCE(*pudp);
169 pr_cont(", pud=%016llx", pud_val(pud));
170 if (pud_none(pud) || pud_bad(pud))
173 pmdp = pmd_offset(pudp, addr);
174 pmd = READ_ONCE(*pmdp);
175 pr_cont(", pmd=%016llx", pmd_val(pmd));
176 if (pmd_none(pmd) || pmd_bad(pmd))
179 ptep = pte_offset_map(pmdp, addr);
180 pte = READ_ONCE(*ptep);
181 pr_cont(", pte=%016llx", pte_val(pte));
189 * This function sets the access flags (dirty, accessed), as well as write
190 * permission, and only to a more permissive setting.
192 * It needs to cope with hardware update of the accessed/dirty state by other
193 * agents in the system and can safely skip the __sync_icache_dcache() call as,
194 * like set_pte_at(), the PTE is never changed from no-exec to exec here.
196 * Returns whether or not the PTE actually changed.
198 int ptep_set_access_flags(struct vm_area_struct *vma,
199 unsigned long address, pte_t *ptep,
200 pte_t entry, int dirty)
202 pteval_t old_pteval, pteval;
203 pte_t pte = READ_ONCE(*ptep);
205 if (pte_same(pte, entry))
208 /* only preserve the access flags and write permission */
209 pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY;
212 * Setting the flags must be done atomically to avoid racing with the
213 * hardware update of the access/dirty state. The PTE_RDONLY bit must
214 * be set to the most permissive (lowest value) of *ptep and entry
215 * (calculated as: a & b == ~(~a | ~b)).
217 pte_val(entry) ^= PTE_RDONLY;
218 pteval = pte_val(pte);
221 pteval ^= PTE_RDONLY;
222 pteval |= pte_val(entry);
223 pteval ^= PTE_RDONLY;
224 pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval);
225 } while (pteval != old_pteval);
227 /* Invalidate a stale read-only entry */
229 flush_tlb_page(vma, address);
233 static bool is_el1_instruction_abort(unsigned long esr)
235 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR;
238 static bool is_el1_data_abort(unsigned long esr)
240 return ESR_ELx_EC(esr) == ESR_ELx_EC_DABT_CUR;
243 static inline bool is_el1_permission_fault(unsigned long addr, unsigned long esr,
244 struct pt_regs *regs)
246 unsigned long fsc_type = esr & ESR_ELx_FSC_TYPE;
248 if (!is_el1_data_abort(esr) && !is_el1_instruction_abort(esr))
251 if (fsc_type == ESR_ELx_FSC_PERM)
254 if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan())
255 return fsc_type == ESR_ELx_FSC_FAULT &&
256 (regs->pstate & PSR_PAN_BIT);
261 static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr,
263 struct pt_regs *regs)
268 if (!is_el1_data_abort(esr) ||
269 (esr & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT)
272 local_irq_save(flags);
273 asm volatile("at s1e1r, %0" :: "r" (addr));
275 par = read_sysreg_par();
276 local_irq_restore(flags);
279 * If we now have a valid translation, treat the translation fault as
282 if (!(par & SYS_PAR_EL1_F))
286 * If we got a different type of fault from the AT instruction,
287 * treat the translation fault as spurious.
289 dfsc = FIELD_GET(SYS_PAR_EL1_FST, par);
290 return (dfsc & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT;
293 static void die_kernel_fault(const char *msg, unsigned long addr,
294 unsigned long esr, struct pt_regs *regs)
298 pr_alert("Unable to handle kernel %s at virtual address %016lx\n", msg,
301 kasan_non_canonical_hook(addr);
303 mem_abort_decode(esr);
306 die("Oops", regs, esr);
308 make_task_dead(SIGKILL);
311 #ifdef CONFIG_KASAN_HW_TAGS
312 static void report_tag_fault(unsigned long addr, unsigned long esr,
313 struct pt_regs *regs)
316 * SAS bits aren't set for all faults reported in EL1, so we can't
317 * find out access size.
319 bool is_write = !!(esr & ESR_ELx_WNR);
320 kasan_report(addr, 0, is_write, regs->pc);
323 /* Tag faults aren't enabled without CONFIG_KASAN_HW_TAGS. */
324 static inline void report_tag_fault(unsigned long addr, unsigned long esr,
325 struct pt_regs *regs) { }
328 static void do_tag_recovery(unsigned long addr, unsigned long esr,
329 struct pt_regs *regs)
332 report_tag_fault(addr, esr, regs);
335 * Disable MTE Tag Checking on the local CPU for the current EL.
336 * It will be done lazily on the other CPUs when they will hit a
339 sysreg_clear_set(sctlr_el1, SCTLR_EL1_TCF_MASK,
340 SYS_FIELD_PREP_ENUM(SCTLR_EL1, TCF, NONE));
344 static bool is_el1_mte_sync_tag_check_fault(unsigned long esr)
346 unsigned long fsc = esr & ESR_ELx_FSC;
348 if (!is_el1_data_abort(esr))
351 if (fsc == ESR_ELx_FSC_MTE)
357 static bool is_translation_fault(unsigned long esr)
359 return (esr & ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_FAULT;
362 static void __do_kernel_fault(unsigned long addr, unsigned long esr,
363 struct pt_regs *regs)
368 * Are we prepared to handle this kernel fault?
369 * We are almost certainly not prepared to handle instruction faults.
371 if (!is_el1_instruction_abort(esr) && fixup_exception(regs))
374 if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs),
375 "Ignoring spurious kernel translation fault at virtual address %016lx\n", addr))
378 if (is_el1_mte_sync_tag_check_fault(esr)) {
379 do_tag_recovery(addr, esr, regs);
384 if (is_el1_permission_fault(addr, esr, regs)) {
385 if (esr & ESR_ELx_WNR)
386 msg = "write to read-only memory";
387 else if (is_el1_instruction_abort(esr))
388 msg = "execute from non-executable memory";
390 msg = "read from unreadable memory";
391 } else if (addr < PAGE_SIZE) {
392 msg = "NULL pointer dereference";
394 if (is_translation_fault(esr) &&
395 kfence_handle_page_fault(addr, esr & ESR_ELx_WNR, regs))
398 msg = "paging request";
401 if (efi_runtime_fixup_exception(regs, msg))
404 die_kernel_fault(msg, addr, esr, regs);
407 static void set_thread_esr(unsigned long address, unsigned long esr)
409 current->thread.fault_address = address;
412 * If the faulting address is in the kernel, we must sanitize the ESR.
413 * From userspace's point of view, kernel-only mappings don't exist
414 * at all, so we report them as level 0 translation faults.
415 * (This is not quite the way that "no mapping there at all" behaves:
416 * an alignment fault not caused by the memory type would take
417 * precedence over translation fault for a real access to empty
418 * space. Unfortunately we can't easily distinguish "alignment fault
419 * not caused by memory type" from "alignment fault caused by memory
420 * type", so we ignore this wrinkle and just return the translation
423 if (!is_ttbr0_addr(current->thread.fault_address)) {
424 switch (ESR_ELx_EC(esr)) {
425 case ESR_ELx_EC_DABT_LOW:
427 * These bits provide only information about the
428 * faulting instruction, which userspace knows already.
429 * We explicitly clear bits which are architecturally
430 * RES0 in case they are given meanings in future.
431 * We always report the ESR as if the fault was taken
432 * to EL1 and so ISV and the bits in ISS[23:14] are
433 * clear. (In fact it always will be a fault to EL1.)
435 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL |
436 ESR_ELx_CM | ESR_ELx_WNR;
437 esr |= ESR_ELx_FSC_FAULT;
439 case ESR_ELx_EC_IABT_LOW:
441 * Claim a level 0 translation fault.
442 * All other bits are architecturally RES0 for faults
443 * reported with that DFSC value, so we clear them.
445 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL;
446 esr |= ESR_ELx_FSC_FAULT;
450 * This should never happen (entry.S only brings us
451 * into this code for insn and data aborts from a lower
452 * exception level). Fail safe by not providing an ESR
453 * context record at all.
455 WARN(1, "ESR 0x%lx is not DABT or IABT from EL0\n", esr);
461 current->thread.fault_code = esr;
464 static void do_bad_area(unsigned long far, unsigned long esr,
465 struct pt_regs *regs)
467 unsigned long addr = untagged_addr(far);
470 * If we are in kernel mode at this point, we have no context to
471 * handle this fault with.
473 if (user_mode(regs)) {
474 const struct fault_info *inf = esr_to_fault_info(esr);
476 set_thread_esr(addr, esr);
477 arm64_force_sig_fault(inf->sig, inf->code, far, inf->name);
479 __do_kernel_fault(addr, esr, regs);
483 #define VM_FAULT_BADMAP ((__force vm_fault_t)0x010000)
484 #define VM_FAULT_BADACCESS ((__force vm_fault_t)0x020000)
486 static vm_fault_t __do_page_fault(struct mm_struct *mm,
487 struct vm_area_struct *vma, unsigned long addr,
488 unsigned int mm_flags, unsigned long vm_flags,
489 struct pt_regs *regs)
492 * Ok, we have a good vm_area for this memory access, so we can handle
494 * Check that the permissions on the VMA allow for the fault which
497 if (!(vma->vm_flags & vm_flags))
498 return VM_FAULT_BADACCESS;
499 return handle_mm_fault(vma, addr, mm_flags, regs);
502 static bool is_el0_instruction_abort(unsigned long esr)
504 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW;
508 * Note: not valid for EL1 DC IVAC, but we never use that such that it
509 * should fault. EL0 cannot issue DC IVAC (undef).
511 static bool is_write_abort(unsigned long esr)
513 return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM);
516 static int __kprobes do_page_fault(unsigned long far, unsigned long esr,
517 struct pt_regs *regs)
519 const struct fault_info *inf;
520 struct mm_struct *mm = current->mm;
522 unsigned long vm_flags;
523 unsigned int mm_flags = FAULT_FLAG_DEFAULT;
524 unsigned long addr = untagged_addr(far);
525 struct vm_area_struct *vma;
527 if (kprobe_page_fault(regs, esr))
531 * If we're in an interrupt or have no user context, we must not take
534 if (faulthandler_disabled() || !mm)
538 mm_flags |= FAULT_FLAG_USER;
541 * vm_flags tells us what bits we must have in vma->vm_flags
542 * for the fault to be benign, __do_page_fault() would check
543 * vma->vm_flags & vm_flags and returns an error if the
544 * intersection is empty
546 if (is_el0_instruction_abort(esr)) {
547 /* It was exec fault */
549 mm_flags |= FAULT_FLAG_INSTRUCTION;
550 } else if (is_write_abort(esr)) {
551 /* It was write fault */
553 mm_flags |= FAULT_FLAG_WRITE;
555 /* It was read fault */
557 /* Write implies read */
558 vm_flags |= VM_WRITE;
559 /* If EPAN is absent then exec implies read */
560 if (!cpus_have_const_cap(ARM64_HAS_EPAN))
564 if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) {
565 if (is_el1_instruction_abort(esr))
566 die_kernel_fault("execution of user memory",
569 if (!search_exception_tables(regs->pc))
570 die_kernel_fault("access to user memory outside uaccess routines",
574 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
577 vma = lock_mm_and_find_vma(mm, addr, regs);
578 if (unlikely(!vma)) {
579 fault = VM_FAULT_BADMAP;
583 fault = __do_page_fault(mm, vma, addr, mm_flags, vm_flags, regs);
585 /* Quick path to respond to signals */
586 if (fault_signal_pending(fault, regs)) {
587 if (!user_mode(regs))
592 /* The fault is fully completed (including releasing mmap lock) */
593 if (fault & VM_FAULT_COMPLETED)
596 if (fault & VM_FAULT_RETRY) {
597 mm_flags |= FAULT_FLAG_TRIED;
600 mmap_read_unlock(mm);
604 * Handle the "normal" (no error) case first.
606 if (likely(!(fault & (VM_FAULT_ERROR | VM_FAULT_BADMAP |
607 VM_FAULT_BADACCESS))))
611 * If we are in kernel mode at this point, we have no context to
612 * handle this fault with.
614 if (!user_mode(regs))
617 if (fault & VM_FAULT_OOM) {
619 * We ran out of memory, call the OOM killer, and return to
620 * userspace (which will retry the fault, or kill us if we got
623 pagefault_out_of_memory();
627 inf = esr_to_fault_info(esr);
628 set_thread_esr(addr, esr);
629 if (fault & VM_FAULT_SIGBUS) {
631 * We had some memory, but were unable to successfully fix up
634 arm64_force_sig_fault(SIGBUS, BUS_ADRERR, far, inf->name);
635 } else if (fault & (VM_FAULT_HWPOISON_LARGE | VM_FAULT_HWPOISON)) {
639 if (fault & VM_FAULT_HWPOISON_LARGE)
640 lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault));
642 arm64_force_sig_mceerr(BUS_MCEERR_AR, far, lsb, inf->name);
645 * Something tried to access memory that isn't in our memory
648 arm64_force_sig_fault(SIGSEGV,
649 fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR,
656 __do_kernel_fault(addr, esr, regs);
660 static int __kprobes do_translation_fault(unsigned long far,
662 struct pt_regs *regs)
664 unsigned long addr = untagged_addr(far);
666 if (is_ttbr0_addr(addr))
667 return do_page_fault(far, esr, regs);
669 do_bad_area(far, esr, regs);
673 static int do_alignment_fault(unsigned long far, unsigned long esr,
674 struct pt_regs *regs)
676 if (IS_ENABLED(CONFIG_COMPAT_ALIGNMENT_FIXUPS) &&
677 compat_user_mode(regs))
678 return do_compat_alignment_fixup(far, regs);
679 do_bad_area(far, esr, regs);
683 static int do_bad(unsigned long far, unsigned long esr, struct pt_regs *regs)
685 return 1; /* "fault" */
688 static int do_sea(unsigned long far, unsigned long esr, struct pt_regs *regs)
690 const struct fault_info *inf;
691 unsigned long siaddr;
693 inf = esr_to_fault_info(esr);
695 if (user_mode(regs) && apei_claim_sea(regs) == 0) {
697 * APEI claimed this as a firmware-first notification.
698 * Some processing deferred to task_work before ret_to_user().
703 if (esr & ESR_ELx_FnV) {
707 * The architecture specifies that the tag bits of FAR_EL1 are
708 * UNKNOWN for synchronous external aborts. Mask them out now
709 * so that userspace doesn't see them.
711 siaddr = untagged_addr(far);
713 arm64_notify_die(inf->name, regs, inf->sig, inf->code, siaddr, esr);
718 static int do_tag_check_fault(unsigned long far, unsigned long esr,
719 struct pt_regs *regs)
722 * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN
723 * for tag check faults. Set them to corresponding bits in the untagged
726 far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK);
727 do_bad_area(far, esr, regs);
731 static const struct fault_info fault_info[] = {
732 { do_bad, SIGKILL, SI_KERNEL, "ttbr address size fault" },
733 { do_bad, SIGKILL, SI_KERNEL, "level 1 address size fault" },
734 { do_bad, SIGKILL, SI_KERNEL, "level 2 address size fault" },
735 { do_bad, SIGKILL, SI_KERNEL, "level 3 address size fault" },
736 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" },
737 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" },
738 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" },
739 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" },
740 { do_bad, SIGKILL, SI_KERNEL, "unknown 8" },
741 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" },
742 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" },
743 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" },
744 { do_bad, SIGKILL, SI_KERNEL, "unknown 12" },
745 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" },
746 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" },
747 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" },
748 { do_sea, SIGBUS, BUS_OBJERR, "synchronous external abort" },
749 { do_tag_check_fault, SIGSEGV, SEGV_MTESERR, "synchronous tag check fault" },
750 { do_bad, SIGKILL, SI_KERNEL, "unknown 18" },
751 { do_bad, SIGKILL, SI_KERNEL, "unknown 19" },
752 { do_sea, SIGKILL, SI_KERNEL, "level 0 (translation table walk)" },
753 { do_sea, SIGKILL, SI_KERNEL, "level 1 (translation table walk)" },
754 { do_sea, SIGKILL, SI_KERNEL, "level 2 (translation table walk)" },
755 { do_sea, SIGKILL, SI_KERNEL, "level 3 (translation table walk)" },
756 { do_sea, SIGBUS, BUS_OBJERR, "synchronous parity or ECC error" }, // Reserved when RAS is implemented
757 { do_bad, SIGKILL, SI_KERNEL, "unknown 25" },
758 { do_bad, SIGKILL, SI_KERNEL, "unknown 26" },
759 { do_bad, SIGKILL, SI_KERNEL, "unknown 27" },
760 { do_sea, SIGKILL, SI_KERNEL, "level 0 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
761 { do_sea, SIGKILL, SI_KERNEL, "level 1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
762 { do_sea, SIGKILL, SI_KERNEL, "level 2 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
763 { do_sea, SIGKILL, SI_KERNEL, "level 3 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
764 { do_bad, SIGKILL, SI_KERNEL, "unknown 32" },
765 { do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" },
766 { do_bad, SIGKILL, SI_KERNEL, "unknown 34" },
767 { do_bad, SIGKILL, SI_KERNEL, "unknown 35" },
768 { do_bad, SIGKILL, SI_KERNEL, "unknown 36" },
769 { do_bad, SIGKILL, SI_KERNEL, "unknown 37" },
770 { do_bad, SIGKILL, SI_KERNEL, "unknown 38" },
771 { do_bad, SIGKILL, SI_KERNEL, "unknown 39" },
772 { do_bad, SIGKILL, SI_KERNEL, "unknown 40" },
773 { do_bad, SIGKILL, SI_KERNEL, "unknown 41" },
774 { do_bad, SIGKILL, SI_KERNEL, "unknown 42" },
775 { do_bad, SIGKILL, SI_KERNEL, "unknown 43" },
776 { do_bad, SIGKILL, SI_KERNEL, "unknown 44" },
777 { do_bad, SIGKILL, SI_KERNEL, "unknown 45" },
778 { do_bad, SIGKILL, SI_KERNEL, "unknown 46" },
779 { do_bad, SIGKILL, SI_KERNEL, "unknown 47" },
780 { do_bad, SIGKILL, SI_KERNEL, "TLB conflict abort" },
781 { do_bad, SIGKILL, SI_KERNEL, "Unsupported atomic hardware update fault" },
782 { do_bad, SIGKILL, SI_KERNEL, "unknown 50" },
783 { do_bad, SIGKILL, SI_KERNEL, "unknown 51" },
784 { do_bad, SIGKILL, SI_KERNEL, "implementation fault (lockdown abort)" },
785 { do_bad, SIGBUS, BUS_OBJERR, "implementation fault (unsupported exclusive)" },
786 { do_bad, SIGKILL, SI_KERNEL, "unknown 54" },
787 { do_bad, SIGKILL, SI_KERNEL, "unknown 55" },
788 { do_bad, SIGKILL, SI_KERNEL, "unknown 56" },
789 { do_bad, SIGKILL, SI_KERNEL, "unknown 57" },
790 { do_bad, SIGKILL, SI_KERNEL, "unknown 58" },
791 { do_bad, SIGKILL, SI_KERNEL, "unknown 59" },
792 { do_bad, SIGKILL, SI_KERNEL, "unknown 60" },
793 { do_bad, SIGKILL, SI_KERNEL, "section domain fault" },
794 { do_bad, SIGKILL, SI_KERNEL, "page domain fault" },
795 { do_bad, SIGKILL, SI_KERNEL, "unknown 63" },
798 void do_mem_abort(unsigned long far, unsigned long esr, struct pt_regs *regs)
800 const struct fault_info *inf = esr_to_fault_info(esr);
801 unsigned long addr = untagged_addr(far);
803 if (!inf->fn(far, esr, regs))
806 if (!user_mode(regs))
807 die_kernel_fault(inf->name, addr, esr, regs);
810 * At this point we have an unrecognized fault type whose tag bits may
811 * have been defined as UNKNOWN. Therefore we only expose the untagged
812 * address to the signal handler.
814 arm64_notify_die(inf->name, regs, inf->sig, inf->code, addr, esr);
816 NOKPROBE_SYMBOL(do_mem_abort);
818 void do_sp_pc_abort(unsigned long addr, unsigned long esr, struct pt_regs *regs)
820 arm64_notify_die("SP/PC alignment exception", regs, SIGBUS, BUS_ADRALN,
823 NOKPROBE_SYMBOL(do_sp_pc_abort);
825 int __init early_brk64(unsigned long addr, unsigned long esr,
826 struct pt_regs *regs);
829 * __refdata because early_brk64 is __init, but the reference to it is
830 * clobbered at arch_initcall time.
831 * See traps.c and debug-monitors.c:debug_traps_init().
833 static struct fault_info __refdata debug_fault_info[] = {
834 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware breakpoint" },
835 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware single-step" },
836 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware watchpoint" },
837 { do_bad, SIGKILL, SI_KERNEL, "unknown 3" },
838 { do_bad, SIGTRAP, TRAP_BRKPT, "aarch32 BKPT" },
839 { do_bad, SIGKILL, SI_KERNEL, "aarch32 vector catch" },
840 { early_brk64, SIGTRAP, TRAP_BRKPT, "aarch64 BRK" },
841 { do_bad, SIGKILL, SI_KERNEL, "unknown 7" },
844 void __init hook_debug_fault_code(int nr,
845 int (*fn)(unsigned long, unsigned long, struct pt_regs *),
846 int sig, int code, const char *name)
848 BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info));
850 debug_fault_info[nr].fn = fn;
851 debug_fault_info[nr].sig = sig;
852 debug_fault_info[nr].code = code;
853 debug_fault_info[nr].name = name;
857 * In debug exception context, we explicitly disable preemption despite
858 * having interrupts disabled.
859 * This serves two purposes: it makes it much less likely that we would
860 * accidentally schedule in exception context and it will force a warning
861 * if we somehow manage to schedule by accident.
863 static void debug_exception_enter(struct pt_regs *regs)
867 /* This code is a bit fragile. Test it. */
868 RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work");
870 NOKPROBE_SYMBOL(debug_exception_enter);
872 static void debug_exception_exit(struct pt_regs *regs)
874 preempt_enable_no_resched();
876 NOKPROBE_SYMBOL(debug_exception_exit);
878 void do_debug_exception(unsigned long addr_if_watchpoint, unsigned long esr,
879 struct pt_regs *regs)
881 const struct fault_info *inf = esr_to_debug_fault_info(esr);
882 unsigned long pc = instruction_pointer(regs);
884 debug_exception_enter(regs);
886 if (user_mode(regs) && !is_ttbr0_addr(pc))
887 arm64_apply_bp_hardening();
889 if (inf->fn(addr_if_watchpoint, esr, regs)) {
890 arm64_notify_die(inf->name, regs, inf->sig, inf->code, pc, esr);
893 debug_exception_exit(regs);
895 NOKPROBE_SYMBOL(do_debug_exception);
898 * Used during anonymous page fault handling.
900 struct page *alloc_zeroed_user_highpage_movable(struct vm_area_struct *vma,
903 gfp_t flags = GFP_HIGHUSER_MOVABLE | __GFP_ZERO;
906 * If the page is mapped with PROT_MTE, initialise the tags at the
907 * point of allocation and page zeroing as this is usually faster than
908 * separate DC ZVA and STGM.
910 if (vma->vm_flags & VM_MTE)
911 flags |= __GFP_ZEROTAGS;
913 return alloc_page_vma(flags, vma, vaddr);
916 void tag_clear_highpage(struct page *page)
918 mte_zero_clear_page_tags(page_address(page));
919 set_page_mte_tagged(page);