1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2001 Deep Blue Solutions Ltd.
6 * Copyright (C) 2012 ARM Ltd.
9 #include <linux/errno.h>
10 #include <linux/linkage.h>
11 #include <linux/init.h>
12 #include <asm/assembler.h>
13 #include <asm/cpufeature.h>
14 #include <asm/alternative.h>
15 #include <asm/asm-uaccess.h>
18 * caches_clean_inval_pou_macro(start,end) [fixup]
20 * Ensure that the I and D caches are coherent within specified region.
21 * This is typically used when code has been written to a memory region,
22 * and will be executed.
24 * - start - virtual start address of region
25 * - end - virtual end address of region
26 * - fixup - optional label to branch to on user fault
28 .macro caches_clean_inval_pou_macro, fixup
29 alternative_if ARM64_HAS_CACHE_IDC
32 alternative_else_nop_endif
35 dcache_by_line_op cvau, ish, x2, x3, x4, x5, \fixup
37 alternative_if ARM64_HAS_CACHE_DIC
40 alternative_else_nop_endif
41 invalidate_icache_by_line x0, x1, x2, x3, \fixup
46 * caches_clean_inval_pou(start,end)
48 * Ensure that the I and D caches are coherent within specified region.
49 * This is typically used when code has been written to a memory region,
50 * and will be executed.
52 * - start - virtual start address of region
53 * - end - virtual end address of region
55 SYM_FUNC_START(caches_clean_inval_pou)
56 caches_clean_inval_pou_macro
58 SYM_FUNC_END(caches_clean_inval_pou)
61 * caches_clean_inval_user_pou(start,end)
63 * Ensure that the I and D caches are coherent within specified region.
64 * This is typically used when code has been written to a memory region,
65 * and will be executed.
67 * - start - virtual start address of region
68 * - end - virtual end address of region
70 SYM_FUNC_START(caches_clean_inval_user_pou)
71 uaccess_ttbr0_enable x2, x3, x4
73 caches_clean_inval_pou_macro 2f
76 uaccess_ttbr0_disable x1, x2
81 SYM_FUNC_END(caches_clean_inval_user_pou)
84 * icache_inval_pou(start,end)
86 * Ensure that the I cache is invalid within specified region.
88 * - start - virtual start address of region
89 * - end - virtual end address of region
91 SYM_FUNC_START(icache_inval_pou)
92 alternative_if ARM64_HAS_CACHE_DIC
95 alternative_else_nop_endif
97 invalidate_icache_by_line x0, x1, x2, x3
99 SYM_FUNC_END(icache_inval_pou)
102 * dcache_clean_inval_poc(start, end)
104 * Ensure that any D-cache lines for the interval [start, end)
105 * are cleaned and invalidated to the PoC.
107 * - start - virtual start address of region
108 * - end - virtual end address of region
110 SYM_FUNC_START(__pi_dcache_clean_inval_poc)
111 dcache_by_line_op civac, sy, x0, x1, x2, x3
113 SYM_FUNC_END(__pi_dcache_clean_inval_poc)
114 SYM_FUNC_ALIAS(dcache_clean_inval_poc, __pi_dcache_clean_inval_poc)
117 * dcache_clean_pou(start, end)
119 * Ensure that any D-cache lines for the interval [start, end)
120 * are cleaned to the PoU.
122 * - start - virtual start address of region
123 * - end - virtual end address of region
125 SYM_FUNC_START(dcache_clean_pou)
126 alternative_if ARM64_HAS_CACHE_IDC
129 alternative_else_nop_endif
130 dcache_by_line_op cvau, ish, x0, x1, x2, x3
132 SYM_FUNC_END(dcache_clean_pou)
135 * dcache_inval_poc(start, end)
137 * Ensure that any D-cache lines for the interval [start, end)
138 * are invalidated. Any partial lines at the ends of the interval are
139 * also cleaned to PoC to prevent data loss.
141 * - start - kernel start address of region
142 * - end - kernel end address of region
144 SYM_FUNC_START(__pi_dcache_inval_poc)
145 dcache_line_size x2, x3
147 tst x1, x3 // end cache line aligned?
150 dc civac, x1 // clean & invalidate D / U line
151 1: tst x0, x3 // start cache line aligned?
154 dc civac, x0 // clean & invalidate D / U line
156 2: dc ivac, x0 // invalidate D / U line
162 SYM_FUNC_END(__pi_dcache_inval_poc)
163 SYM_FUNC_ALIAS(dcache_inval_poc, __pi_dcache_inval_poc)
166 * dcache_clean_poc(start, end)
168 * Ensure that any D-cache lines for the interval [start, end)
169 * are cleaned to the PoC.
171 * - start - virtual start address of region
172 * - end - virtual end address of region
174 SYM_FUNC_START(__pi_dcache_clean_poc)
175 dcache_by_line_op cvac, sy, x0, x1, x2, x3
177 SYM_FUNC_END(__pi_dcache_clean_poc)
178 SYM_FUNC_ALIAS(dcache_clean_poc, __pi_dcache_clean_poc)
181 * dcache_clean_pop(start, end)
183 * Ensure that any D-cache lines for the interval [start, end)
184 * are cleaned to the PoP.
186 * - start - virtual start address of region
187 * - end - virtual end address of region
189 SYM_FUNC_START(__pi_dcache_clean_pop)
190 alternative_if_not ARM64_HAS_DCPOP
192 alternative_else_nop_endif
193 dcache_by_line_op cvap, sy, x0, x1, x2, x3
195 SYM_FUNC_END(__pi_dcache_clean_pop)
196 SYM_FUNC_ALIAS(dcache_clean_pop, __pi_dcache_clean_pop)