2 * Copyright (C) 2015 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 #include <asm/kvm_hyp.h>
20 static void __hyp_text __tlb_switch_to_guest_vhe(struct kvm *kvm)
25 * With VHE enabled, we have HCR_EL2.{E2H,TGE} = {1,1}, and
26 * most TLB operations target EL2/EL0. In order to affect the
27 * guest TLBs (EL1/EL0), we need to change one of these two
28 * bits. Changing E2H is impossible (goodbye TTBR1_EL2), so
29 * let's flip TGE before executing the TLB operation.
31 write_sysreg(kvm->arch.vttbr, vttbr_el2);
32 val = read_sysreg(hcr_el2);
34 write_sysreg(val, hcr_el2);
38 static void __hyp_text __tlb_switch_to_guest_nvhe(struct kvm *kvm)
40 write_sysreg(kvm->arch.vttbr, vttbr_el2);
44 static hyp_alternate_select(__tlb_switch_to_guest,
45 __tlb_switch_to_guest_nvhe,
46 __tlb_switch_to_guest_vhe,
47 ARM64_HAS_VIRT_HOST_EXTN);
49 static void __hyp_text __tlb_switch_to_host_vhe(struct kvm *kvm)
52 * We're done with the TLB operation, let's restore the host's
55 write_sysreg(0, vttbr_el2);
56 write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2);
59 static void __hyp_text __tlb_switch_to_host_nvhe(struct kvm *kvm)
61 write_sysreg(0, vttbr_el2);
64 static hyp_alternate_select(__tlb_switch_to_host,
65 __tlb_switch_to_host_nvhe,
66 __tlb_switch_to_host_vhe,
67 ARM64_HAS_VIRT_HOST_EXTN);
69 void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
73 /* Switch to requested VMID */
74 kvm = kern_hyp_va(kvm);
75 __tlb_switch_to_guest()(kvm);
78 * We could do so much better if we had the VA as well.
79 * Instead, we invalidate Stage-2 for this IPA, and the
80 * whole of Stage-1. Weep...
83 asm volatile("tlbi ipas2e1is, %0" : : "r" (ipa));
86 * We have to ensure completion of the invalidation at Stage-2,
87 * since a table walk on another CPU could refill a TLB with a
88 * complete (S1 + S2) walk based on the old Stage-2 mapping if
89 * the Stage-1 invalidation happened first.
92 asm volatile("tlbi vmalle1is" : : );
96 __tlb_switch_to_host()(kvm);
99 void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm)
103 /* Switch to requested VMID */
104 kvm = kern_hyp_va(kvm);
105 __tlb_switch_to_guest()(kvm);
107 asm volatile("tlbi vmalls12e1is" : : );
111 __tlb_switch_to_host()(kvm);
114 void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
116 struct kvm *kvm = kern_hyp_va(kern_hyp_va(vcpu)->kvm);
118 /* Switch to requested VMID */
119 __tlb_switch_to_guest()(kvm);
121 asm volatile("tlbi vmalle1" : : );
125 __tlb_switch_to_host()(kvm);
128 void __hyp_text __kvm_flush_vm_context(void)
131 asm volatile("tlbi alle1is \n"