GNU Linux-libre 4.19.245-gnu1
[releases.git] / arch / arm64 / kvm / hyp / sysreg-sr.c
1 /*
2  * Copyright (C) 2012-2015 - ARM Ltd
3  * Author: Marc Zyngier <marc.zyngier@arm.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
16  */
17
18 #include <linux/compiler.h>
19 #include <linux/kvm_host.h>
20
21 #include <asm/kprobes.h>
22 #include <asm/kvm_asm.h>
23 #include <asm/kvm_emulate.h>
24 #include <asm/kvm_hyp.h>
25
26 /*
27  * Non-VHE: Both host and guest must save everything.
28  *
29  * VHE: Host and guest must save mdscr_el1 and sp_el0 (and the PC and pstate,
30  * which are handled as part of the el2 return state) on every switch.
31  * tpidr_el0 and tpidrro_el0 only need to be switched when going
32  * to host userspace or a different VCPU.  EL1 registers only need to be
33  * switched when potentially going to run a different VCPU.  The latter two
34  * classes are handled as part of kvm_arch_vcpu_load and kvm_arch_vcpu_put.
35  */
36
37 static void __hyp_text __sysreg_save_common_state(struct kvm_cpu_context *ctxt)
38 {
39         ctxt->sys_regs[MDSCR_EL1]       = read_sysreg(mdscr_el1);
40
41         /*
42          * The host arm64 Linux uses sp_el0 to point to 'current' and it must
43          * therefore be saved/restored on every entry/exit to/from the guest.
44          */
45         ctxt->gp_regs.regs.sp           = read_sysreg(sp_el0);
46 }
47
48 static void __hyp_text __sysreg_save_user_state(struct kvm_cpu_context *ctxt)
49 {
50         ctxt->sys_regs[TPIDR_EL0]       = read_sysreg(tpidr_el0);
51         ctxt->sys_regs[TPIDRRO_EL0]     = read_sysreg(tpidrro_el0);
52 }
53
54 static void __hyp_text __sysreg_save_el1_state(struct kvm_cpu_context *ctxt)
55 {
56         ctxt->sys_regs[MPIDR_EL1]       = read_sysreg(vmpidr_el2);
57         ctxt->sys_regs[CSSELR_EL1]      = read_sysreg(csselr_el1);
58         ctxt->sys_regs[SCTLR_EL1]       = read_sysreg_el1(sctlr);
59         ctxt->sys_regs[ACTLR_EL1]       = read_sysreg(actlr_el1);
60         ctxt->sys_regs[CPACR_EL1]       = read_sysreg_el1(cpacr);
61         ctxt->sys_regs[TTBR0_EL1]       = read_sysreg_el1(ttbr0);
62         ctxt->sys_regs[TTBR1_EL1]       = read_sysreg_el1(ttbr1);
63         ctxt->sys_regs[TCR_EL1]         = read_sysreg_el1(tcr);
64         ctxt->sys_regs[ESR_EL1]         = read_sysreg_el1(esr);
65         ctxt->sys_regs[AFSR0_EL1]       = read_sysreg_el1(afsr0);
66         ctxt->sys_regs[AFSR1_EL1]       = read_sysreg_el1(afsr1);
67         ctxt->sys_regs[FAR_EL1]         = read_sysreg_el1(far);
68         ctxt->sys_regs[MAIR_EL1]        = read_sysreg_el1(mair);
69         ctxt->sys_regs[VBAR_EL1]        = read_sysreg_el1(vbar);
70         ctxt->sys_regs[CONTEXTIDR_EL1]  = read_sysreg_el1(contextidr);
71         ctxt->sys_regs[AMAIR_EL1]       = read_sysreg_el1(amair);
72         ctxt->sys_regs[CNTKCTL_EL1]     = read_sysreg_el1(cntkctl);
73         ctxt->sys_regs[PAR_EL1]         = read_sysreg(par_el1);
74         ctxt->sys_regs[TPIDR_EL1]       = read_sysreg(tpidr_el1);
75
76         ctxt->gp_regs.sp_el1            = read_sysreg(sp_el1);
77         ctxt->gp_regs.elr_el1           = read_sysreg_el1(elr);
78         ctxt->gp_regs.spsr[KVM_SPSR_EL1]= read_sysreg_el1(spsr);
79 }
80
81 static void __hyp_text __sysreg_save_el2_return_state(struct kvm_cpu_context *ctxt)
82 {
83         ctxt->gp_regs.regs.pc           = read_sysreg_el2(elr);
84         ctxt->gp_regs.regs.pstate       = read_sysreg_el2(spsr);
85
86         if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN))
87                 ctxt->sys_regs[DISR_EL1] = read_sysreg_s(SYS_VDISR_EL2);
88 }
89
90 void __hyp_text __sysreg_save_state_nvhe(struct kvm_cpu_context *ctxt)
91 {
92         __sysreg_save_el1_state(ctxt);
93         __sysreg_save_common_state(ctxt);
94         __sysreg_save_user_state(ctxt);
95         __sysreg_save_el2_return_state(ctxt);
96 }
97
98 void sysreg_save_host_state_vhe(struct kvm_cpu_context *ctxt)
99 {
100         __sysreg_save_common_state(ctxt);
101 }
102 NOKPROBE_SYMBOL(sysreg_save_host_state_vhe);
103
104 void sysreg_save_guest_state_vhe(struct kvm_cpu_context *ctxt)
105 {
106         __sysreg_save_common_state(ctxt);
107         __sysreg_save_el2_return_state(ctxt);
108 }
109 NOKPROBE_SYMBOL(sysreg_save_guest_state_vhe);
110
111 static void __hyp_text __sysreg_restore_common_state(struct kvm_cpu_context *ctxt)
112 {
113         write_sysreg(ctxt->sys_regs[MDSCR_EL1],   mdscr_el1);
114
115         /*
116          * The host arm64 Linux uses sp_el0 to point to 'current' and it must
117          * therefore be saved/restored on every entry/exit to/from the guest.
118          */
119         write_sysreg(ctxt->gp_regs.regs.sp,       sp_el0);
120 }
121
122 static void __hyp_text __sysreg_restore_user_state(struct kvm_cpu_context *ctxt)
123 {
124         write_sysreg(ctxt->sys_regs[TPIDR_EL0],         tpidr_el0);
125         write_sysreg(ctxt->sys_regs[TPIDRRO_EL0],       tpidrro_el0);
126 }
127
128 static void __hyp_text __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt)
129 {
130         write_sysreg(ctxt->sys_regs[MPIDR_EL1],         vmpidr_el2);
131         write_sysreg(ctxt->sys_regs[CSSELR_EL1],        csselr_el1);
132         write_sysreg_el1(ctxt->sys_regs[SCTLR_EL1],     sctlr);
133         write_sysreg(ctxt->sys_regs[ACTLR_EL1],         actlr_el1);
134         write_sysreg_el1(ctxt->sys_regs[CPACR_EL1],     cpacr);
135         write_sysreg_el1(ctxt->sys_regs[TTBR0_EL1],     ttbr0);
136         write_sysreg_el1(ctxt->sys_regs[TTBR1_EL1],     ttbr1);
137         write_sysreg_el1(ctxt->sys_regs[TCR_EL1],       tcr);
138         write_sysreg_el1(ctxt->sys_regs[ESR_EL1],       esr);
139         write_sysreg_el1(ctxt->sys_regs[AFSR0_EL1],     afsr0);
140         write_sysreg_el1(ctxt->sys_regs[AFSR1_EL1],     afsr1);
141         write_sysreg_el1(ctxt->sys_regs[FAR_EL1],       far);
142         write_sysreg_el1(ctxt->sys_regs[MAIR_EL1],      mair);
143         write_sysreg_el1(ctxt->sys_regs[VBAR_EL1],      vbar);
144         write_sysreg_el1(ctxt->sys_regs[CONTEXTIDR_EL1],contextidr);
145         write_sysreg_el1(ctxt->sys_regs[AMAIR_EL1],     amair);
146         write_sysreg_el1(ctxt->sys_regs[CNTKCTL_EL1],   cntkctl);
147         write_sysreg(ctxt->sys_regs[PAR_EL1],           par_el1);
148         write_sysreg(ctxt->sys_regs[TPIDR_EL1],         tpidr_el1);
149
150         write_sysreg(ctxt->gp_regs.sp_el1,              sp_el1);
151         write_sysreg_el1(ctxt->gp_regs.elr_el1,         elr);
152         write_sysreg_el1(ctxt->gp_regs.spsr[KVM_SPSR_EL1],spsr);
153 }
154
155 static void __hyp_text
156 __sysreg_restore_el2_return_state(struct kvm_cpu_context *ctxt)
157 {
158         write_sysreg_el2(ctxt->gp_regs.regs.pc,         elr);
159         write_sysreg_el2(ctxt->gp_regs.regs.pstate,     spsr);
160
161         if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN))
162                 write_sysreg_s(ctxt->sys_regs[DISR_EL1], SYS_VDISR_EL2);
163 }
164
165 void __hyp_text __sysreg_restore_state_nvhe(struct kvm_cpu_context *ctxt)
166 {
167         __sysreg_restore_el1_state(ctxt);
168         __sysreg_restore_common_state(ctxt);
169         __sysreg_restore_user_state(ctxt);
170         __sysreg_restore_el2_return_state(ctxt);
171 }
172
173 void sysreg_restore_host_state_vhe(struct kvm_cpu_context *ctxt)
174 {
175         __sysreg_restore_common_state(ctxt);
176 }
177 NOKPROBE_SYMBOL(sysreg_restore_host_state_vhe);
178
179 void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt)
180 {
181         __sysreg_restore_common_state(ctxt);
182         __sysreg_restore_el2_return_state(ctxt);
183 }
184 NOKPROBE_SYMBOL(sysreg_restore_guest_state_vhe);
185
186 void __hyp_text __sysreg32_save_state(struct kvm_vcpu *vcpu)
187 {
188         u64 *spsr, *sysreg;
189
190         if (!vcpu_el1_is_32bit(vcpu))
191                 return;
192
193         spsr = vcpu->arch.ctxt.gp_regs.spsr;
194         sysreg = vcpu->arch.ctxt.sys_regs;
195
196         spsr[KVM_SPSR_ABT] = read_sysreg(spsr_abt);
197         spsr[KVM_SPSR_UND] = read_sysreg(spsr_und);
198         spsr[KVM_SPSR_IRQ] = read_sysreg(spsr_irq);
199         spsr[KVM_SPSR_FIQ] = read_sysreg(spsr_fiq);
200
201         sysreg[DACR32_EL2] = read_sysreg(dacr32_el2);
202         sysreg[IFSR32_EL2] = read_sysreg(ifsr32_el2);
203
204         if (has_vhe() || vcpu->arch.flags & KVM_ARM64_DEBUG_DIRTY)
205                 sysreg[DBGVCR32_EL2] = read_sysreg(dbgvcr32_el2);
206 }
207
208 void __hyp_text __sysreg32_restore_state(struct kvm_vcpu *vcpu)
209 {
210         u64 *spsr, *sysreg;
211
212         if (!vcpu_el1_is_32bit(vcpu))
213                 return;
214
215         spsr = vcpu->arch.ctxt.gp_regs.spsr;
216         sysreg = vcpu->arch.ctxt.sys_regs;
217
218         write_sysreg(spsr[KVM_SPSR_ABT], spsr_abt);
219         write_sysreg(spsr[KVM_SPSR_UND], spsr_und);
220         write_sysreg(spsr[KVM_SPSR_IRQ], spsr_irq);
221         write_sysreg(spsr[KVM_SPSR_FIQ], spsr_fiq);
222
223         write_sysreg(sysreg[DACR32_EL2], dacr32_el2);
224         write_sysreg(sysreg[IFSR32_EL2], ifsr32_el2);
225
226         if (has_vhe() || vcpu->arch.flags & KVM_ARM64_DEBUG_DIRTY)
227                 write_sysreg(sysreg[DBGVCR32_EL2], dbgvcr32_el2);
228 }
229
230 /**
231  * kvm_vcpu_load_sysregs - Load guest system registers to the physical CPU
232  *
233  * @vcpu: The VCPU pointer
234  *
235  * Load system registers that do not affect the host's execution, for
236  * example EL1 system registers on a VHE system where the host kernel
237  * runs at EL2.  This function is called from KVM's vcpu_load() function
238  * and loading system register state early avoids having to load them on
239  * every entry to the VM.
240  */
241 void kvm_vcpu_load_sysregs(struct kvm_vcpu *vcpu)
242 {
243         struct kvm_cpu_context *host_ctxt = vcpu->arch.host_cpu_context;
244         struct kvm_cpu_context *guest_ctxt = &vcpu->arch.ctxt;
245
246         if (!has_vhe())
247                 return;
248
249         __sysreg_save_user_state(host_ctxt);
250
251         /*
252          * Load guest EL1 and user state
253          *
254          * We must restore the 32-bit state before the sysregs, thanks
255          * to erratum #852523 (Cortex-A57) or #853709 (Cortex-A72).
256          */
257         __sysreg32_restore_state(vcpu);
258         __sysreg_restore_user_state(guest_ctxt);
259         __sysreg_restore_el1_state(guest_ctxt);
260
261         vcpu->arch.sysregs_loaded_on_cpu = true;
262
263         activate_traps_vhe_load(vcpu);
264 }
265
266 /**
267  * kvm_vcpu_put_sysregs - Restore host system registers to the physical CPU
268  *
269  * @vcpu: The VCPU pointer
270  *
271  * Save guest system registers that do not affect the host's execution, for
272  * example EL1 system registers on a VHE system where the host kernel
273  * runs at EL2.  This function is called from KVM's vcpu_put() function
274  * and deferring saving system register state until we're no longer running the
275  * VCPU avoids having to save them on every exit from the VM.
276  */
277 void kvm_vcpu_put_sysregs(struct kvm_vcpu *vcpu)
278 {
279         struct kvm_cpu_context *host_ctxt = vcpu->arch.host_cpu_context;
280         struct kvm_cpu_context *guest_ctxt = &vcpu->arch.ctxt;
281
282         if (!has_vhe())
283                 return;
284
285         deactivate_traps_vhe_put();
286
287         __sysreg_save_el1_state(guest_ctxt);
288         __sysreg_save_user_state(guest_ctxt);
289         __sysreg32_save_state(vcpu);
290
291         /* Restore host user state */
292         __sysreg_restore_user_state(host_ctxt);
293
294         vcpu->arch.sysregs_loaded_on_cpu = false;
295 }
296
297 void __hyp_text __kvm_enable_ssbs(void)
298 {
299         u64 tmp;
300
301         asm volatile(
302         "mrs    %0, sctlr_el2\n"
303         "orr    %0, %0, %1\n"
304         "msr    sctlr_el2, %0"
305         : "=&r" (tmp) : "L" (SCTLR_ELx_DSSBS));
306 }