1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2012,2013 - ARM Ltd
4 * Author: Marc Zyngier <marc.zyngier@arm.com>
7 #include <linux/arm-smccc.h>
8 #include <linux/linkage.h>
10 #include <asm/alternative.h>
11 #include <asm/assembler.h>
12 #include <asm/el2_setup.h>
13 #include <asm/kvm_arm.h>
14 #include <asm/kvm_asm.h>
15 #include <asm/kvm_mmu.h>
16 #include <asm/pgtable-hwdef.h>
17 #include <asm/sysreg.h>
21 .pushsection .idmap.text, "ax"
25 SYM_CODE_START(__kvm_hyp_init)
26 ventry __invalid // Synchronous EL2t
27 ventry __invalid // IRQ EL2t
28 ventry __invalid // FIQ EL2t
29 ventry __invalid // Error EL2t
31 ventry __invalid // Synchronous EL2h
32 ventry __invalid // IRQ EL2h
33 ventry __invalid // FIQ EL2h
34 ventry __invalid // Error EL2h
36 ventry __do_hyp_init // Synchronous 64-bit EL1
37 ventry __invalid // IRQ 64-bit EL1
38 ventry __invalid // FIQ 64-bit EL1
39 ventry __invalid // Error 64-bit EL1
41 ventry __invalid // Synchronous 32-bit EL1
42 ventry __invalid // IRQ 32-bit EL1
43 ventry __invalid // FIQ 32-bit EL1
44 ventry __invalid // Error 32-bit EL1
50 * Only uses x0..x3 so as to not clobber callee-saved SMCCC registers.
52 * x0: SMCCC function ID
53 * x1: struct kvm_nvhe_init_params PA
56 /* Check for a stub HVC call */
57 cmp x0, #HVC_STUB_HCALL_NR
58 b.lo __kvm_handle_stub_hvc
60 bic x0, x0, #ARM_SMCCC_CALL_HINTS
61 mov x3, #KVM_HOST_SMCCC_FUNC(__kvm_hyp_init)
65 mov x0, #SMCCC_RET_NOT_SUPPORTED
70 bl ___kvm_hyp_init // Clobbers x0..x2
74 mov x0, #SMCCC_RET_SUCCESS
76 SYM_CODE_END(__kvm_hyp_init)
79 * Initialize the hypervisor in EL2.
81 * Only uses x0..x2 so as to not clobber callee-saved SMCCC registers
82 * and leave x3 for the caller.
84 * x0: struct kvm_nvhe_init_params PA
86 SYM_CODE_START_LOCAL(___kvm_hyp_init)
87 ldr x1, [x0, #NVHE_INIT_STACK_HYP_VA]
90 ldr x1, [x0, #NVHE_INIT_MAIR_EL2]
93 ldr x1, [x0, #NVHE_INIT_HCR_EL2]
100 // hVHE: Replay the EL2 setup to account for the E2H bit
101 // TPIDR_EL2 is used to preserve x0 across the macro maze...
109 ldr x1, [x0, #NVHE_INIT_TPIDR_EL2]
112 ldr x1, [x0, #NVHE_INIT_VTTBR]
115 ldr x1, [x0, #NVHE_INIT_VTCR]
118 ldr x1, [x0, #NVHE_INIT_PGD_PA]
120 alternative_if ARM64_HAS_CNP
121 orr x2, x2, #TTBR_CNP_BIT
122 alternative_else_nop_endif
126 * Set the PS bits in TCR_EL2.
128 ldr x0, [x0, #NVHE_INIT_TCR_EL2]
129 tcr_compute_pa_size x0, #TCR_EL2_PS_SHIFT, x1, x2
134 /* Invalidate the stale TLBs from Bootloader */
139 mov_q x0, INIT_SCTLR_EL2_MMU_ON
140 alternative_if ARM64_HAS_ADDRESS_AUTH
141 mov_q x1, (SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | \
142 SCTLR_ELx_ENDA | SCTLR_ELx_ENDB)
144 alternative_else_nop_endif
146 #ifdef CONFIG_ARM64_BTI_KERNEL
147 alternative_if ARM64_BTI
148 orr x0, x0, #SCTLR_EL2_BT
149 alternative_else_nop_endif
150 #endif /* CONFIG_ARM64_BTI_KERNEL */
155 /* Set the host vector */
156 ldr x0, =__kvm_hyp_host_vector
160 SYM_CODE_END(___kvm_hyp_init)
163 * PSCI CPU_ON entry point
165 * x0: struct kvm_nvhe_init_params PA
167 SYM_CODE_START(kvm_hyp_cpu_entry)
168 mov x1, #1 // is_cpu_on = true
170 SYM_CODE_END(kvm_hyp_cpu_entry)
173 * PSCI CPU_SUSPEND / SYSTEM_SUSPEND entry point
175 * x0: struct kvm_nvhe_init_params PA
177 SYM_CODE_START(kvm_hyp_cpu_resume)
178 mov x1, #0 // is_cpu_on = false
180 SYM_CODE_END(kvm_hyp_cpu_resume)
183 * Common code for CPU entry points. Initializes EL2 state and
184 * installs the hypervisor before handing over to a C handler.
186 * x0: struct kvm_nvhe_init_params PA
189 SYM_CODE_START_LOCAL(__kvm_hyp_init_cpu)
190 mov x28, x0 // Stash arguments
193 /* Check that the core was booted in EL2. */
195 cmp x0, #CurrentEL_EL2
198 /* The core booted in EL1. KVM cannot be initialized on it. */
203 2: msr SPsel, #1 // We want to use SP_EL{1,2}
205 /* Initialize EL2 CPU state to sane values. */
206 init_el2_state // Clobbers x0..x2
208 __init_el2_nvhe_prepare_eret
210 /* Enable MMU, set vectors and stack. */
212 bl ___kvm_hyp_init // Clobbers x0..x2
216 ldr x1, =kvm_host_psci_cpu_entry
218 SYM_CODE_END(__kvm_hyp_init_cpu)
220 SYM_CODE_START(__kvm_handle_stub_hvc)
222 * __kvm_handle_stub_hvc called from __host_hvc through branch instruction(br) so
223 * we need bti j at beginning.
226 cmp x0, #HVC_SOFT_RESTART
229 /* This is where we're about to jump, staying at EL2 */
231 mov x0, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT | PSR_MODE_EL2h)
234 /* Shuffle the arguments, and don't come back */
240 1: cmp x0, #HVC_RESET_VECTORS
244 * Set the HVC_RESET_VECTORS return code before entering the common
245 * path so that we do not clobber x0-x2 in case we are coming via
250 /* Reset kvm back to the hyp stub. */
251 mov_q x5, INIT_SCTLR_EL2_MMU_OFF
252 pre_disable_mmu_workaround
256 alternative_if ARM64_KVM_PROTECTED_MODE
257 mov_q x5, HCR_HOST_NVHE_FLAGS
259 alternative_else_nop_endif
261 /* Install stub vectors */
262 adr_l x5, __hyp_stub_vectors
266 1: /* Bad stub call */
267 mov_q x0, HVC_STUB_ERR
270 SYM_CODE_END(__kvm_handle_stub_hvc)
272 SYM_FUNC_START(__pkvm_init_switch_pgd)
273 /* Turn the MMU off */
274 pre_disable_mmu_workaround
276 bic x3, x2, #SCTLR_ELx_M
282 /* Install the new pgtables */
283 ldr x3, [x0, #NVHE_INIT_PGD_PA]
285 alternative_if ARM64_HAS_CNP
286 orr x4, x4, #TTBR_CNP_BIT
287 alternative_else_nop_endif
290 /* Set the new stack pointer */
291 ldr x0, [x0, #NVHE_INIT_STACK_HYP_VA]
294 /* And turn the MMU back on! */
297 SYM_FUNC_END(__pkvm_init_switch_pgd)