2 * Copyright (C) 2012,2013 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
5 * Derived from arch/arm/kvm/guest.c:
6 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
7 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #include <linux/errno.h>
23 #include <linux/err.h>
24 #include <linux/kvm_host.h>
25 #include <linux/module.h>
26 #include <linux/vmalloc.h>
28 #include <kvm/arm_psci.h>
29 #include <asm/cputype.h>
30 #include <linux/uaccess.h>
32 #include <asm/kvm_emulate.h>
33 #include <asm/kvm_coproc.h>
37 #define VM_STAT(x) { #x, offsetof(struct kvm, stat.x), KVM_STAT_VM }
38 #define VCPU_STAT(x) { #x, offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU }
40 struct kvm_stats_debugfs_item debugfs_entries[] = {
41 VCPU_STAT(hvc_exit_stat),
42 VCPU_STAT(wfe_exit_stat),
43 VCPU_STAT(wfi_exit_stat),
44 VCPU_STAT(mmio_exit_user),
45 VCPU_STAT(mmio_exit_kernel),
50 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
55 static u64 core_reg_offset_from_id(u64 id)
57 return id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_CORE);
60 static int core_reg_size_from_offset(u64 off)
65 case KVM_REG_ARM_CORE_REG(regs.regs[0]) ...
66 KVM_REG_ARM_CORE_REG(regs.regs[30]):
67 case KVM_REG_ARM_CORE_REG(regs.sp):
68 case KVM_REG_ARM_CORE_REG(regs.pc):
69 case KVM_REG_ARM_CORE_REG(regs.pstate):
70 case KVM_REG_ARM_CORE_REG(sp_el1):
71 case KVM_REG_ARM_CORE_REG(elr_el1):
72 case KVM_REG_ARM_CORE_REG(spsr[0]) ...
73 KVM_REG_ARM_CORE_REG(spsr[KVM_NR_SPSR - 1]):
77 case KVM_REG_ARM_CORE_REG(fp_regs.vregs[0]) ...
78 KVM_REG_ARM_CORE_REG(fp_regs.vregs[31]):
79 size = sizeof(__uint128_t);
82 case KVM_REG_ARM_CORE_REG(fp_regs.fpsr):
83 case KVM_REG_ARM_CORE_REG(fp_regs.fpcr):
91 if (!IS_ALIGNED(off, size / sizeof(__u32)))
97 static int validate_core_offset(const struct kvm_one_reg *reg)
99 u64 off = core_reg_offset_from_id(reg->id);
100 int size = core_reg_size_from_offset(off);
105 if (KVM_REG_SIZE(reg->id) != size)
111 static int get_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
114 * Because the kvm_regs structure is a mix of 32, 64 and
115 * 128bit fields, we index it as if it was a 32bit
116 * array. Hence below, nr_regs is the number of entries, and
117 * off the index in the "array".
119 __u32 __user *uaddr = (__u32 __user *)(unsigned long)reg->addr;
120 struct kvm_regs *regs = vcpu_gp_regs(vcpu);
121 int nr_regs = sizeof(*regs) / sizeof(__u32);
124 /* Our ID is an index into the kvm_regs struct. */
125 off = core_reg_offset_from_id(reg->id);
126 if (off >= nr_regs ||
127 (off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
130 if (validate_core_offset(reg))
133 if (copy_to_user(uaddr, ((u32 *)regs) + off, KVM_REG_SIZE(reg->id)))
139 static int set_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
141 __u32 __user *uaddr = (__u32 __user *)(unsigned long)reg->addr;
142 struct kvm_regs *regs = vcpu_gp_regs(vcpu);
143 int nr_regs = sizeof(*regs) / sizeof(__u32);
149 /* Our ID is an index into the kvm_regs struct. */
150 off = core_reg_offset_from_id(reg->id);
151 if (off >= nr_regs ||
152 (off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
155 if (validate_core_offset(reg))
158 if (KVM_REG_SIZE(reg->id) > sizeof(tmp))
161 if (copy_from_user(valp, uaddr, KVM_REG_SIZE(reg->id))) {
166 if (off == KVM_REG_ARM_CORE_REG(regs.pstate)) {
167 u64 mode = (*(u64 *)valp) & PSR_AA32_MODE_MASK;
169 case PSR_AA32_MODE_USR:
170 if (!system_supports_32bit_el0())
173 case PSR_AA32_MODE_FIQ:
174 case PSR_AA32_MODE_IRQ:
175 case PSR_AA32_MODE_SVC:
176 case PSR_AA32_MODE_ABT:
177 case PSR_AA32_MODE_UND:
178 if (!vcpu_el1_is_32bit(vcpu))
184 if (vcpu_el1_is_32bit(vcpu))
193 memcpy((u32 *)regs + off, valp, KVM_REG_SIZE(reg->id));
195 if (*vcpu_cpsr(vcpu) & PSR_MODE32_BIT) {
198 for (i = 0; i < 16; i++)
199 *vcpu_reg32(vcpu, i) = (u32)*vcpu_reg32(vcpu, i);
205 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
210 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
215 static int kvm_arm_copy_core_reg_indices(u64 __user *uindices)
220 for (i = 0; i < sizeof(struct kvm_regs) / sizeof(__u32); i++) {
221 u64 reg = KVM_REG_ARM64 | KVM_REG_ARM_CORE | i;
222 int size = core_reg_size_from_offset(i);
229 reg |= KVM_REG_SIZE_U32;
233 reg |= KVM_REG_SIZE_U64;
236 case sizeof(__uint128_t):
237 reg |= KVM_REG_SIZE_U128;
246 if (put_user(reg, uindices))
257 static unsigned long num_core_regs(void)
259 return kvm_arm_copy_core_reg_indices(NULL);
263 * ARM64 versions of the TIMER registers, always available on arm64
266 #define NUM_TIMER_REGS 3
268 static bool is_timer_reg(u64 index)
271 case KVM_REG_ARM_TIMER_CTL:
272 case KVM_REG_ARM_TIMER_CNT:
273 case KVM_REG_ARM_TIMER_CVAL:
279 static int copy_timer_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
281 if (put_user(KVM_REG_ARM_TIMER_CTL, uindices))
284 if (put_user(KVM_REG_ARM_TIMER_CNT, uindices))
287 if (put_user(KVM_REG_ARM_TIMER_CVAL, uindices))
293 static int set_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
295 void __user *uaddr = (void __user *)(long)reg->addr;
299 ret = copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id));
303 return kvm_arm_timer_set_reg(vcpu, reg->id, val);
306 static int get_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
308 void __user *uaddr = (void __user *)(long)reg->addr;
311 val = kvm_arm_timer_get_reg(vcpu, reg->id);
312 return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)) ? -EFAULT : 0;
316 * kvm_arm_num_regs - how many registers do we present via KVM_GET_ONE_REG
318 * This is for all registers.
320 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu)
322 return num_core_regs() + kvm_arm_num_sys_reg_descs(vcpu)
323 + kvm_arm_get_fw_num_regs(vcpu) + NUM_TIMER_REGS;
327 * kvm_arm_copy_reg_indices - get indices of all registers.
329 * We do core registers right here, then we append system regs.
331 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
335 ret = kvm_arm_copy_core_reg_indices(uindices);
340 ret = kvm_arm_copy_fw_reg_indices(vcpu, uindices);
343 uindices += kvm_arm_get_fw_num_regs(vcpu);
345 ret = copy_timer_indices(vcpu, uindices);
348 uindices += NUM_TIMER_REGS;
350 return kvm_arm_copy_sys_reg_indices(vcpu, uindices);
353 int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
355 /* We currently use nothing arch-specific in upper 32 bits */
356 if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
359 /* Register group 16 means we want a core register. */
360 if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
361 return get_core_reg(vcpu, reg);
363 if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_FW)
364 return kvm_arm_get_fw_reg(vcpu, reg);
366 if (is_timer_reg(reg->id))
367 return get_timer_reg(vcpu, reg);
369 return kvm_arm_sys_reg_get_reg(vcpu, reg);
372 int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
374 /* We currently use nothing arch-specific in upper 32 bits */
375 if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
378 /* Register group 16 means we set a core register. */
379 if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
380 return set_core_reg(vcpu, reg);
382 if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_FW)
383 return kvm_arm_set_fw_reg(vcpu, reg);
385 if (is_timer_reg(reg->id))
386 return set_timer_reg(vcpu, reg);
388 return kvm_arm_sys_reg_set_reg(vcpu, reg);
391 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
392 struct kvm_sregs *sregs)
397 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
398 struct kvm_sregs *sregs)
403 int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu,
404 struct kvm_vcpu_events *events)
406 events->exception.serror_pending = !!(vcpu->arch.hcr_el2 & HCR_VSE);
407 events->exception.serror_has_esr = cpus_have_const_cap(ARM64_HAS_RAS_EXTN);
409 if (events->exception.serror_pending && events->exception.serror_has_esr)
410 events->exception.serror_esr = vcpu_get_vsesr(vcpu);
415 int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,
416 struct kvm_vcpu_events *events)
418 bool serror_pending = events->exception.serror_pending;
419 bool has_esr = events->exception.serror_has_esr;
421 if (serror_pending && has_esr) {
422 if (!cpus_have_const_cap(ARM64_HAS_RAS_EXTN))
425 if (!((events->exception.serror_esr) & ~ESR_ELx_ISS_MASK))
426 kvm_set_sei_esr(vcpu, events->exception.serror_esr);
429 } else if (serror_pending) {
430 kvm_inject_vabt(vcpu);
436 int __attribute_const__ kvm_target_cpu(void)
438 unsigned long implementor = read_cpuid_implementor();
439 unsigned long part_number = read_cpuid_part_number();
441 switch (implementor) {
442 case ARM_CPU_IMP_ARM:
443 switch (part_number) {
444 case ARM_CPU_PART_AEM_V8:
445 return KVM_ARM_TARGET_AEM_V8;
446 case ARM_CPU_PART_FOUNDATION:
447 return KVM_ARM_TARGET_FOUNDATION_V8;
448 case ARM_CPU_PART_CORTEX_A53:
449 return KVM_ARM_TARGET_CORTEX_A53;
450 case ARM_CPU_PART_CORTEX_A57:
451 return KVM_ARM_TARGET_CORTEX_A57;
454 case ARM_CPU_IMP_APM:
455 switch (part_number) {
456 case APM_CPU_PART_POTENZA:
457 return KVM_ARM_TARGET_XGENE_POTENZA;
462 /* Return a default generic target */
463 return KVM_ARM_TARGET_GENERIC_V8;
466 int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init)
468 int target = kvm_target_cpu();
473 memset(init, 0, sizeof(*init));
476 * For now, we don't return any features.
477 * In future, we might use features to return target
478 * specific features available for the preferred
481 init->target = (__u32)target;
486 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
491 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
496 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
497 struct kvm_translation *tr)
502 #define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE | \
503 KVM_GUESTDBG_USE_SW_BP | \
504 KVM_GUESTDBG_USE_HW | \
505 KVM_GUESTDBG_SINGLESTEP)
508 * kvm_arch_vcpu_ioctl_set_guest_debug - set up guest debugging
509 * @kvm: pointer to the KVM struct
510 * @kvm_guest_debug: the ioctl data buffer
512 * This sets up and enables the VM for guest debugging. Userspace
513 * passes in a control flag to enable different debug types and
514 * potentially other architecture specific information in the rest of
517 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
518 struct kvm_guest_debug *dbg)
522 trace_kvm_set_guest_debug(vcpu, dbg->control);
524 if (dbg->control & ~KVM_GUESTDBG_VALID_MASK) {
529 if (dbg->control & KVM_GUESTDBG_ENABLE) {
530 vcpu->guest_debug = dbg->control;
532 /* Hardware assisted Break and Watch points */
533 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW) {
534 vcpu->arch.external_debug_state = dbg->arch;
538 /* If not enabled clear all flags */
539 vcpu->guest_debug = 0;
546 int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
547 struct kvm_device_attr *attr)
551 switch (attr->group) {
552 case KVM_ARM_VCPU_PMU_V3_CTRL:
553 ret = kvm_arm_pmu_v3_set_attr(vcpu, attr);
555 case KVM_ARM_VCPU_TIMER_CTRL:
556 ret = kvm_arm_timer_set_attr(vcpu, attr);
566 int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
567 struct kvm_device_attr *attr)
571 switch (attr->group) {
572 case KVM_ARM_VCPU_PMU_V3_CTRL:
573 ret = kvm_arm_pmu_v3_get_attr(vcpu, attr);
575 case KVM_ARM_VCPU_TIMER_CTRL:
576 ret = kvm_arm_timer_get_attr(vcpu, attr);
586 int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
587 struct kvm_device_attr *attr)
591 switch (attr->group) {
592 case KVM_ARM_VCPU_PMU_V3_CTRL:
593 ret = kvm_arm_pmu_v3_has_attr(vcpu, attr);
595 case KVM_ARM_VCPU_TIMER_CTRL:
596 ret = kvm_arm_timer_has_attr(vcpu, attr);