2 * Based on arch/arm/kernel/traps.c
4 * Copyright (C) 1995-2009 Russell King
5 * Copyright (C) 2012 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/bug.h>
21 #include <linux/signal.h>
22 #include <linux/personality.h>
23 #include <linux/kallsyms.h>
24 #include <linux/spinlock.h>
25 #include <linux/uaccess.h>
26 #include <linux/hardirq.h>
27 #include <linux/kdebug.h>
28 #include <linux/module.h>
29 #include <linux/kexec.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/sched/signal.h>
33 #include <linux/sched/debug.h>
34 #include <linux/sched/task_stack.h>
35 #include <linux/sizes.h>
36 #include <linux/syscalls.h>
37 #include <linux/mm_types.h>
39 #include <asm/atomic.h>
41 #include <asm/cpufeature.h>
42 #include <asm/daifflags.h>
43 #include <asm/debug-monitors.h>
46 #include <asm/traps.h>
48 #include <asm/stack_pointer.h>
49 #include <asm/stacktrace.h>
50 #include <asm/exception.h>
51 #include <asm/system_misc.h>
52 #include <asm/sysreg.h>
54 static const char *handler[]= {
61 int show_unhandled_signals = 0;
63 static void dump_backtrace_entry(unsigned long where)
65 printk(" %pS\n", (void *)where);
68 static void __dump_instr(const char *lvl, struct pt_regs *regs)
70 unsigned long addr = instruction_pointer(regs);
71 char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
74 for (i = -4; i < 1; i++) {
75 unsigned int val, bad;
77 bad = get_user(val, &((u32 *)addr)[i]);
80 p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);
82 p += sprintf(p, "bad PC value");
86 printk("%sCode: %s\n", lvl, str);
89 static void dump_instr(const char *lvl, struct pt_regs *regs)
91 if (!user_mode(regs)) {
92 mm_segment_t fs = get_fs();
94 __dump_instr(lvl, regs);
97 __dump_instr(lvl, regs);
101 void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
103 struct stackframe frame;
106 pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
117 if (!try_get_task_stack(tsk))
120 if (tsk == current) {
121 frame.fp = (unsigned long)__builtin_frame_address(0);
122 frame.pc = (unsigned long)dump_backtrace;
125 * task blocked in __switch_to
127 frame.fp = thread_saved_fp(tsk);
128 frame.pc = thread_saved_pc(tsk);
130 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
131 frame.graph = tsk->curr_ret_stack;
134 printk("Call trace:\n");
136 /* skip until specified stack frame */
138 dump_backtrace_entry(frame.pc);
139 } else if (frame.fp == regs->regs[29]) {
142 * Mostly, this is the case where this function is
143 * called in panic/abort. As exception handler's
144 * stack frame does not contain the corresponding pc
145 * at which an exception has taken place, use regs->pc
148 dump_backtrace_entry(regs->pc);
150 } while (!unwind_frame(tsk, &frame));
155 void show_stack(struct task_struct *tsk, unsigned long *sp)
157 dump_backtrace(NULL, tsk);
161 #ifdef CONFIG_PREEMPT
162 #define S_PREEMPT " PREEMPT"
168 static int __die(const char *str, int err, struct pt_regs *regs)
170 struct task_struct *tsk = current;
171 static int die_counter;
174 pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
175 str, err, ++die_counter);
177 /* trap and error numbers are mostly meaningless on ARM */
178 ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV);
179 if (ret == NOTIFY_STOP)
183 pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n",
184 TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk),
188 if (!user_mode(regs))
189 dump_instr(KERN_EMERG, regs);
194 static DEFINE_RAW_SPINLOCK(die_lock);
197 * This function is protected against re-entrancy.
199 void die(const char *str, struct pt_regs *regs, int err)
204 raw_spin_lock_irqsave(&die_lock, flags);
210 ret = __die(str, err, regs);
212 if (regs && kexec_should_crash(current))
216 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
220 panic("Fatal exception in interrupt");
222 panic("Fatal exception");
224 raw_spin_unlock_irqrestore(&die_lock, flags);
226 if (ret != NOTIFY_STOP)
230 static bool show_unhandled_signals_ratelimited(void)
232 static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL,
233 DEFAULT_RATELIMIT_BURST);
234 return show_unhandled_signals && __ratelimit(&rs);
237 void arm64_force_sig_info(struct siginfo *info, const char *str,
238 struct task_struct *tsk)
240 unsigned int esr = tsk->thread.fault_code;
241 struct pt_regs *regs = task_pt_regs(tsk);
243 if (!unhandled_signal(tsk, info->si_signo))
246 if (!show_unhandled_signals_ratelimited())
249 pr_info("%s[%d]: unhandled exception: ", tsk->comm, task_pid_nr(tsk));
251 pr_cont("%s, ESR 0x%08x, ", esr_get_class_string(esr), esr);
254 print_vma_addr(KERN_CONT " in ", regs->pc);
259 force_sig_info(info->si_signo, info, tsk);
262 void arm64_notify_die(const char *str, struct pt_regs *regs,
263 struct siginfo *info, int err)
265 if (user_mode(regs)) {
266 WARN_ON(regs != current_pt_regs());
267 current->thread.fault_address = 0;
268 current->thread.fault_code = err;
269 arm64_force_sig_info(info, str, current);
275 void arm64_skip_faulting_instruction(struct pt_regs *regs, unsigned long size)
280 * If we were single stepping, we want to get the step exception after
281 * we return from the trap.
284 user_fastforward_single_step(current);
287 static LIST_HEAD(undef_hook);
288 static DEFINE_RAW_SPINLOCK(undef_lock);
290 void register_undef_hook(struct undef_hook *hook)
294 raw_spin_lock_irqsave(&undef_lock, flags);
295 list_add(&hook->node, &undef_hook);
296 raw_spin_unlock_irqrestore(&undef_lock, flags);
299 void unregister_undef_hook(struct undef_hook *hook)
303 raw_spin_lock_irqsave(&undef_lock, flags);
304 list_del(&hook->node);
305 raw_spin_unlock_irqrestore(&undef_lock, flags);
308 static int call_undef_hook(struct pt_regs *regs)
310 struct undef_hook *hook;
313 int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
314 void __user *pc = (void __user *)instruction_pointer(regs);
316 if (!user_mode(regs)) {
318 if (probe_kernel_address((__force __le32 *)pc, instr_le))
320 instr = le32_to_cpu(instr_le);
321 } else if (compat_thumb_mode(regs)) {
322 /* 16-bit Thumb instruction */
324 if (get_user(instr_le, (__le16 __user *)pc))
326 instr = le16_to_cpu(instr_le);
327 if (aarch32_insn_is_wide(instr)) {
330 if (get_user(instr_le, (__le16 __user *)(pc + 2)))
332 instr2 = le16_to_cpu(instr_le);
333 instr = (instr << 16) | instr2;
336 /* 32-bit ARM instruction */
338 if (get_user(instr_le, (__le32 __user *)pc))
340 instr = le32_to_cpu(instr_le);
343 raw_spin_lock_irqsave(&undef_lock, flags);
344 list_for_each_entry(hook, &undef_hook, node)
345 if ((instr & hook->instr_mask) == hook->instr_val &&
346 (regs->pstate & hook->pstate_mask) == hook->pstate_val)
349 raw_spin_unlock_irqrestore(&undef_lock, flags);
351 return fn ? fn(regs, instr) : 1;
354 void force_signal_inject(int signal, int code, unsigned long address)
358 struct pt_regs *regs = current_pt_regs();
360 clear_siginfo(&info);
364 desc = "undefined instruction";
367 desc = "illegal memory access";
370 desc = "unknown or unrecoverable error";
374 /* Force signals we don't understand to SIGKILL */
375 if (WARN_ON(signal != SIGKILL &&
376 siginfo_layout(signal, code) != SIL_FAULT)) {
380 info.si_signo = signal;
383 info.si_addr = (void __user *)address;
385 arm64_notify_die(desc, regs, &info, 0);
389 * Set up process info to signal segmentation fault - called on access error.
391 void arm64_notify_segfault(unsigned long addr)
395 down_read(¤t->mm->mmap_sem);
396 if (find_vma(current->mm, addr) == NULL)
400 up_read(¤t->mm->mmap_sem);
402 force_signal_inject(SIGSEGV, code, addr);
405 asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
407 /* check for AArch32 breakpoint instructions */
408 if (!aarch32_break_handler(regs))
411 if (call_undef_hook(regs) == 0)
414 force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc);
415 BUG_ON(!user_mode(regs));
418 void cpu_enable_cache_maint_trap(const struct arm64_cpu_capabilities *__unused)
420 sysreg_clear_set(sctlr_el1, SCTLR_EL1_UCI, 0);
423 #define __user_cache_maint(insn, address, res) \
424 if (address >= user_addr_max()) { \
427 uaccess_ttbr0_enable(); \
429 "1: " insn ", %1\n" \
432 " .pushsection .fixup,\"ax\"\n" \
434 "3: mov %w0, %w2\n" \
437 _ASM_EXTABLE(1b, 3b) \
439 : "r" (address), "i" (-EFAULT)); \
440 uaccess_ttbr0_disable(); \
443 static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
445 unsigned long address;
446 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
447 int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;
450 address = untagged_addr(pt_regs_read_reg(regs, rt));
453 case ESR_ELx_SYS64_ISS_CRM_DC_CVAU: /* DC CVAU, gets promoted */
454 __user_cache_maint("dc civac", address, ret);
456 case ESR_ELx_SYS64_ISS_CRM_DC_CVAC: /* DC CVAC, gets promoted */
457 __user_cache_maint("dc civac", address, ret);
459 case ESR_ELx_SYS64_ISS_CRM_DC_CVAP: /* DC CVAP */
460 __user_cache_maint("sys 3, c7, c12, 1", address, ret);
462 case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC: /* DC CIVAC */
463 __user_cache_maint("dc civac", address, ret);
465 case ESR_ELx_SYS64_ISS_CRM_IC_IVAU: /* IC IVAU */
466 __user_cache_maint("ic ivau", address, ret);
469 force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc);
474 arm64_notify_segfault(address);
476 arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
479 static void ctr_read_handler(unsigned int esr, struct pt_regs *regs)
481 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
482 unsigned long val = arm64_ftr_reg_user_value(&arm64_ftr_reg_ctrel0);
484 if (cpus_have_const_cap(ARM64_WORKAROUND_1542419)) {
485 /* Hide DIC so that we can trap the unnecessary maintenance...*/
486 val &= ~BIT(CTR_DIC_SHIFT);
488 /* ... and fake IminLine to reduce the number of traps. */
489 val &= ~CTR_IMINLINE_MASK;
490 val |= (PAGE_SHIFT - 2) & CTR_IMINLINE_MASK;
493 pt_regs_write_reg(regs, rt, val);
495 arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
498 static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
500 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
502 pt_regs_write_reg(regs, rt, arch_counter_get_cntvct());
503 arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
506 static void cntfrq_read_handler(unsigned int esr, struct pt_regs *regs)
508 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
510 pt_regs_write_reg(regs, rt, arch_timer_get_rate());
511 arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
515 unsigned int esr_mask;
516 unsigned int esr_val;
517 void (*handler)(unsigned int esr, struct pt_regs *regs);
520 static struct sys64_hook sys64_hooks[] = {
522 .esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK,
523 .esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL,
524 .handler = user_cache_maint_handler,
527 /* Trap read access to CTR_EL0 */
528 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
529 .esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ,
530 .handler = ctr_read_handler,
533 /* Trap read access to CNTVCT_EL0 */
534 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
535 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCT,
536 .handler = cntvct_read_handler,
539 /* Trap read access to CNTFRQ_EL0 */
540 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
541 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTFRQ,
542 .handler = cntfrq_read_handler,
547 asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs)
549 struct sys64_hook *hook;
551 for (hook = sys64_hooks; hook->handler; hook++)
552 if ((hook->esr_mask & esr) == hook->esr_val) {
553 hook->handler(esr, regs);
558 * New SYS instructions may previously have been undefined at EL0. Fall
559 * back to our usual undefined instruction handler so that we handle
560 * these consistently.
565 static const char *esr_class_str[] = {
566 [0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
567 [ESR_ELx_EC_UNKNOWN] = "Unknown/Uncategorized",
568 [ESR_ELx_EC_WFx] = "WFI/WFE",
569 [ESR_ELx_EC_CP15_32] = "CP15 MCR/MRC",
570 [ESR_ELx_EC_CP15_64] = "CP15 MCRR/MRRC",
571 [ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC",
572 [ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC",
573 [ESR_ELx_EC_FP_ASIMD] = "ASIMD",
574 [ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS",
575 [ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC",
576 [ESR_ELx_EC_ILL] = "PSTATE.IL",
577 [ESR_ELx_EC_SVC32] = "SVC (AArch32)",
578 [ESR_ELx_EC_HVC32] = "HVC (AArch32)",
579 [ESR_ELx_EC_SMC32] = "SMC (AArch32)",
580 [ESR_ELx_EC_SVC64] = "SVC (AArch64)",
581 [ESR_ELx_EC_HVC64] = "HVC (AArch64)",
582 [ESR_ELx_EC_SMC64] = "SMC (AArch64)",
583 [ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)",
584 [ESR_ELx_EC_SVE] = "SVE",
585 [ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF",
586 [ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)",
587 [ESR_ELx_EC_IABT_CUR] = "IABT (current EL)",
588 [ESR_ELx_EC_PC_ALIGN] = "PC Alignment",
589 [ESR_ELx_EC_DABT_LOW] = "DABT (lower EL)",
590 [ESR_ELx_EC_DABT_CUR] = "DABT (current EL)",
591 [ESR_ELx_EC_SP_ALIGN] = "SP Alignment",
592 [ESR_ELx_EC_FP_EXC32] = "FP (AArch32)",
593 [ESR_ELx_EC_FP_EXC64] = "FP (AArch64)",
594 [ESR_ELx_EC_SERROR] = "SError",
595 [ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)",
596 [ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)",
597 [ESR_ELx_EC_SOFTSTP_LOW] = "Software Step (lower EL)",
598 [ESR_ELx_EC_SOFTSTP_CUR] = "Software Step (current EL)",
599 [ESR_ELx_EC_WATCHPT_LOW] = "Watchpoint (lower EL)",
600 [ESR_ELx_EC_WATCHPT_CUR] = "Watchpoint (current EL)",
601 [ESR_ELx_EC_BKPT32] = "BKPT (AArch32)",
602 [ESR_ELx_EC_VECTOR32] = "Vector catch (AArch32)",
603 [ESR_ELx_EC_BRK64] = "BRK (AArch64)",
606 const char *esr_get_class_string(u32 esr)
608 return esr_class_str[ESR_ELx_EC(esr)];
612 * bad_mode handles the impossible case in the exception vector. This is always
615 asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
619 pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n",
620 handler[reason], smp_processor_id(), esr,
621 esr_get_class_string(esr));
628 * bad_el0_sync handles unexpected, but potentially recoverable synchronous
629 * exceptions taken from EL0. Unlike bad_mode, this returns.
631 asmlinkage void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr)
634 void __user *pc = (void __user *)instruction_pointer(regs);
636 clear_siginfo(&info);
637 info.si_signo = SIGILL;
639 info.si_code = ILL_ILLOPC;
642 current->thread.fault_address = 0;
643 current->thread.fault_code = esr;
645 arm64_force_sig_info(&info, "Bad EL0 synchronous exception", current);
648 #ifdef CONFIG_VMAP_STACK
650 DEFINE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE/sizeof(long)], overflow_stack)
653 asmlinkage void handle_bad_stack(struct pt_regs *regs)
655 unsigned long tsk_stk = (unsigned long)current->stack;
656 unsigned long irq_stk = (unsigned long)this_cpu_read(irq_stack_ptr);
657 unsigned long ovf_stk = (unsigned long)this_cpu_ptr(overflow_stack);
658 unsigned int esr = read_sysreg(esr_el1);
659 unsigned long far = read_sysreg(far_el1);
662 pr_emerg("Insufficient stack space to handle exception!");
664 pr_emerg("ESR: 0x%08x -- %s\n", esr, esr_get_class_string(esr));
665 pr_emerg("FAR: 0x%016lx\n", far);
667 pr_emerg("Task stack: [0x%016lx..0x%016lx]\n",
668 tsk_stk, tsk_stk + THREAD_SIZE);
669 pr_emerg("IRQ stack: [0x%016lx..0x%016lx]\n",
670 irq_stk, irq_stk + THREAD_SIZE);
671 pr_emerg("Overflow stack: [0x%016lx..0x%016lx]\n",
672 ovf_stk, ovf_stk + OVERFLOW_STACK_SIZE);
677 * We use nmi_panic to limit the potential for recusive overflows, and
678 * to get a better stack trace.
680 nmi_panic(NULL, "kernel stack overflow");
685 void __noreturn arm64_serror_panic(struct pt_regs *regs, u32 esr)
689 pr_crit("SError Interrupt on CPU%d, code 0x%08x -- %s\n",
690 smp_processor_id(), esr, esr_get_class_string(esr));
694 nmi_panic(regs, "Asynchronous SError Interrupt");
700 bool arm64_is_fatal_ras_serror(struct pt_regs *regs, unsigned int esr)
702 u32 aet = arm64_ras_serror_get_severity(esr);
705 case ESR_ELx_AET_CE: /* corrected error */
706 case ESR_ELx_AET_UEO: /* restartable, not yet consumed */
708 * The CPU can make progress. We may take UEO again as
709 * a more severe error.
713 case ESR_ELx_AET_UEU: /* Uncorrected Unrecoverable */
714 case ESR_ELx_AET_UER: /* Uncorrected Recoverable */
716 * The CPU can't make progress. The exception may have
721 case ESR_ELx_AET_UC: /* Uncontainable or Uncategorized error */
723 /* Error has been silently propagated */
724 arm64_serror_panic(regs, esr);
728 asmlinkage void do_serror(struct pt_regs *regs, unsigned int esr)
732 /* non-RAS errors are not containable */
733 if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(regs, esr))
734 arm64_serror_panic(regs, esr);
739 void __pte_error(const char *file, int line, unsigned long val)
741 pr_err("%s:%d: bad pte %016lx.\n", file, line, val);
744 void __pmd_error(const char *file, int line, unsigned long val)
746 pr_err("%s:%d: bad pmd %016lx.\n", file, line, val);
749 void __pud_error(const char *file, int line, unsigned long val)
751 pr_err("%s:%d: bad pud %016lx.\n", file, line, val);
754 void __pgd_error(const char *file, int line, unsigned long val)
756 pr_err("%s:%d: bad pgd %016lx.\n", file, line, val);
759 /* GENERIC_BUG traps */
761 int is_valid_bugaddr(unsigned long addr)
764 * bug_handler() only called for BRK #BUG_BRK_IMM.
765 * So the answer is trivial -- any spurious instances with no
766 * bug table entry will be rejected by report_bug() and passed
767 * back to the debug-monitors code and handled as a fatal
768 * unexpected debug exception.
773 static int bug_handler(struct pt_regs *regs, unsigned int esr)
776 return DBG_HOOK_ERROR;
778 switch (report_bug(regs->pc, regs)) {
779 case BUG_TRAP_TYPE_BUG:
780 die("Oops - BUG", regs, 0);
783 case BUG_TRAP_TYPE_WARN:
787 /* unknown/unrecognised bug trap type */
788 return DBG_HOOK_ERROR;
791 /* If thread survives, skip over the BUG instruction and continue: */
792 arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
793 return DBG_HOOK_HANDLED;
796 static struct break_hook bug_break_hook = {
797 .esr_val = 0xf2000000 | BUG_BRK_IMM,
798 .esr_mask = 0xffffffff,
803 * Initial handler for AArch64 BRK exceptions
804 * This handler only used until debug_traps_init().
806 int __init early_brk64(unsigned long addr, unsigned int esr,
807 struct pt_regs *regs)
809 return bug_handler(regs, esr) != DBG_HOOK_HANDLED;
812 /* This registration must happen early, before debug_traps_init(). */
813 void __init trap_init(void)
815 register_break_hook(&bug_break_hook);