2 * Based on arch/arm/kernel/traps.c
4 * Copyright (C) 1995-2009 Russell King
5 * Copyright (C) 2012 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/bug.h>
21 #include <linux/signal.h>
22 #include <linux/personality.h>
23 #include <linux/kallsyms.h>
24 #include <linux/spinlock.h>
25 #include <linux/uaccess.h>
26 #include <linux/hardirq.h>
27 #include <linux/kdebug.h>
28 #include <linux/module.h>
29 #include <linux/kexec.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/sched.h>
33 #include <linux/syscalls.h>
35 #include <asm/atomic.h>
37 #include <asm/cpufeature.h>
38 #include <asm/debug-monitors.h>
41 #include <asm/traps.h>
42 #include <asm/stacktrace.h>
43 #include <asm/exception.h>
44 #include <asm/system_misc.h>
45 #include <asm/sysreg.h>
47 static const char *handler[]= {
54 int show_unhandled_signals = 0;
57 * Dump out the contents of some kernel memory nicely...
59 static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
67 * We need to switch to kernel mode so that we can use __get_user
68 * to safely read from kernel space.
73 printk("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top);
75 for (first = bottom & ~31; first < top; first += 32) {
77 char str[sizeof(" 12345678") * 8 + 1];
79 memset(str, ' ', sizeof(str));
80 str[sizeof(str) - 1] = '\0';
82 for (p = first, i = 0; i < (32 / 8)
83 && p < top; i++, p += 8) {
84 if (p >= bottom && p < top) {
87 if (__get_user(val, (unsigned long *)p) == 0)
88 sprintf(str + i * 17, " %016lx", val);
90 sprintf(str + i * 17, " ????????????????");
93 printk("%s%04lx:%s\n", lvl, first & 0xffff, str);
99 static void dump_backtrace_entry(unsigned long where)
102 * Note that 'where' can have a physical address, but it's not handled.
107 static void __dump_instr(const char *lvl, struct pt_regs *regs)
109 unsigned long addr = instruction_pointer(regs);
110 char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
113 for (i = -4; i < 1; i++) {
114 unsigned int val, bad;
116 bad = get_user(val, &((u32 *)addr)[i]);
119 p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);
121 p += sprintf(p, "bad PC value");
125 printk("%sCode: %s\n", lvl, str);
128 static void dump_instr(const char *lvl, struct pt_regs *regs)
130 if (!user_mode(regs)) {
131 mm_segment_t fs = get_fs();
133 __dump_instr(lvl, regs);
136 __dump_instr(lvl, regs);
140 static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
142 struct stackframe frame;
143 unsigned long irq_stack_ptr;
146 pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
152 * Switching between stacks is valid when tracing current and in
153 * non-preemptible context.
155 if (tsk == current && !preemptible())
156 irq_stack_ptr = IRQ_STACK_PTR(smp_processor_id());
160 if (tsk == current) {
161 frame.fp = (unsigned long)__builtin_frame_address(0);
162 frame.sp = current_stack_pointer;
163 frame.pc = (unsigned long)dump_backtrace;
166 * task blocked in __switch_to
168 frame.fp = thread_saved_fp(tsk);
169 frame.sp = thread_saved_sp(tsk);
170 frame.pc = thread_saved_pc(tsk);
172 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
173 frame.graph = tsk->curr_ret_stack;
177 printk("Call trace:\n");
179 unsigned long where = frame.pc;
183 /* skip until specified stack frame */
185 dump_backtrace_entry(where);
186 } else if (frame.fp == regs->regs[29]) {
189 * Mostly, this is the case where this function is
190 * called in panic/abort. As exception handler's
191 * stack frame does not contain the corresponding pc
192 * at which an exception has taken place, use regs->pc
195 dump_backtrace_entry(regs->pc);
197 ret = unwind_frame(tsk, &frame);
201 if (in_exception_text(where)) {
203 * If we switched to the irq_stack before calling this
204 * exception handler, then the pt_regs will be on the
205 * task stack. The easiest way to tell is if the large
206 * pt_regs would overlap with the end of the irq_stack.
208 if (stack < irq_stack_ptr &&
209 (stack + sizeof(struct pt_regs)) > irq_stack_ptr)
210 stack = IRQ_STACK_TO_TASK_STACK(irq_stack_ptr);
212 dump_mem("", "Exception stack", stack,
213 stack + sizeof(struct pt_regs));
218 void show_stack(struct task_struct *tsk, unsigned long *sp)
220 dump_backtrace(NULL, tsk);
224 #ifdef CONFIG_PREEMPT
225 #define S_PREEMPT " PREEMPT"
231 static int __die(const char *str, int err, struct thread_info *thread,
232 struct pt_regs *regs)
234 struct task_struct *tsk = thread->task;
235 static int die_counter;
238 pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
239 str, err, ++die_counter);
241 /* trap and error numbers are mostly meaningless on ARM */
242 ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV);
243 if (ret == NOTIFY_STOP)
248 pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n",
249 TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), thread + 1);
251 if (!user_mode(regs)) {
252 dump_mem(KERN_EMERG, "Stack: ", regs->sp,
253 THREAD_SIZE + (unsigned long)task_stack_page(tsk));
254 dump_backtrace(regs, tsk);
255 dump_instr(KERN_EMERG, regs);
261 static DEFINE_RAW_SPINLOCK(die_lock);
264 * This function is protected against re-entrancy.
266 void die(const char *str, struct pt_regs *regs, int err)
268 struct thread_info *thread = current_thread_info();
272 raw_spin_lock_irqsave(&die_lock, flags);
278 ret = __die(str, err, thread, regs);
280 if (regs && kexec_should_crash(thread->task))
284 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
288 panic("Fatal exception in interrupt");
290 panic("Fatal exception");
292 raw_spin_unlock_irqrestore(&die_lock, flags);
294 if (ret != NOTIFY_STOP)
298 void arm64_notify_die(const char *str, struct pt_regs *regs,
299 struct siginfo *info, int err)
301 if (user_mode(regs)) {
302 current->thread.fault_address = 0;
303 current->thread.fault_code = err;
304 force_sig_info(info->si_signo, info, current);
310 static LIST_HEAD(undef_hook);
311 static DEFINE_RAW_SPINLOCK(undef_lock);
313 void register_undef_hook(struct undef_hook *hook)
317 raw_spin_lock_irqsave(&undef_lock, flags);
318 list_add(&hook->node, &undef_hook);
319 raw_spin_unlock_irqrestore(&undef_lock, flags);
322 void unregister_undef_hook(struct undef_hook *hook)
326 raw_spin_lock_irqsave(&undef_lock, flags);
327 list_del(&hook->node);
328 raw_spin_unlock_irqrestore(&undef_lock, flags);
331 static int call_undef_hook(struct pt_regs *regs)
333 struct undef_hook *hook;
336 int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
337 void __user *pc = (void __user *)instruction_pointer(regs);
339 if (!user_mode(regs))
342 if (compat_thumb_mode(regs)) {
343 /* 16-bit Thumb instruction */
344 if (get_user(instr, (u16 __user *)pc))
346 instr = le16_to_cpu(instr);
347 if (aarch32_insn_is_wide(instr)) {
350 if (get_user(instr2, (u16 __user *)(pc + 2)))
352 instr2 = le16_to_cpu(instr2);
353 instr = (instr << 16) | instr2;
356 /* 32-bit ARM instruction */
357 if (get_user(instr, (u32 __user *)pc))
359 instr = le32_to_cpu(instr);
362 raw_spin_lock_irqsave(&undef_lock, flags);
363 list_for_each_entry(hook, &undef_hook, node)
364 if ((instr & hook->instr_mask) == hook->instr_val &&
365 (regs->pstate & hook->pstate_mask) == hook->pstate_val)
368 raw_spin_unlock_irqrestore(&undef_lock, flags);
370 return fn ? fn(regs, instr) : 1;
373 static void force_signal_inject(int signal, int code, struct pt_regs *regs,
374 unsigned long address)
377 void __user *pc = (void __user *)instruction_pointer(regs);
382 desc = "undefined instruction";
385 desc = "illegal memory access";
392 if (unhandled_signal(current, signal) &&
393 show_unhandled_signals_ratelimited()) {
394 pr_info("%s[%d]: %s: pc=%p\n",
395 current->comm, task_pid_nr(current), desc, pc);
396 dump_instr(KERN_INFO, regs);
399 info.si_signo = signal;
404 arm64_notify_die(desc, regs, &info, 0);
408 * Set up process info to signal segmentation fault - called on access error.
410 void arm64_notify_segfault(struct pt_regs *regs, unsigned long addr)
414 down_read(¤t->mm->mmap_sem);
415 if (find_vma(current->mm, addr) == NULL)
419 up_read(¤t->mm->mmap_sem);
421 force_signal_inject(SIGSEGV, code, regs, addr);
424 asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
426 /* check for AArch32 breakpoint instructions */
427 if (!aarch32_break_handler(regs))
430 if (call_undef_hook(regs) == 0)
433 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
436 void cpu_enable_cache_maint_trap(const struct arm64_cpu_capabilities *__unused)
438 config_sctlr_el1(SCTLR_EL1_UCI, 0);
441 #define __user_cache_maint(insn, address, res) \
442 if (address >= user_addr_max()) \
446 "1: " insn ", %1\n" \
449 " .pushsection .fixup,\"ax\"\n" \
451 "3: mov %w0, %w2\n" \
454 _ASM_EXTABLE(1b, 3b) \
456 : "r" (address), "i" (-EFAULT) )
458 static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
460 unsigned long address;
461 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
462 int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;
465 address = (rt == 31) ? 0 : untagged_addr(regs->regs[rt]);
468 case ESR_ELx_SYS64_ISS_CRM_DC_CVAU: /* DC CVAU, gets promoted */
469 __user_cache_maint("dc civac", address, ret);
471 case ESR_ELx_SYS64_ISS_CRM_DC_CVAC: /* DC CVAC, gets promoted */
472 __user_cache_maint("dc civac", address, ret);
474 case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC: /* DC CIVAC */
475 __user_cache_maint("dc civac", address, ret);
477 case ESR_ELx_SYS64_ISS_CRM_IC_IVAU: /* IC IVAU */
478 __user_cache_maint("ic ivau", address, ret);
481 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
486 arm64_notify_segfault(regs, address);
491 static void ctr_read_handler(unsigned int esr, struct pt_regs *regs)
493 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
495 regs->regs[rt] = arm64_ftr_reg_ctrel0.sys_val;
500 unsigned int esr_mask;
501 unsigned int esr_val;
502 void (*handler)(unsigned int esr, struct pt_regs *regs);
505 static struct sys64_hook sys64_hooks[] = {
507 .esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK,
508 .esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL,
509 .handler = user_cache_maint_handler,
512 /* Trap read access to CTR_EL0 */
513 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
514 .esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ,
515 .handler = ctr_read_handler,
520 asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs)
522 struct sys64_hook *hook;
524 for (hook = sys64_hooks; hook->handler; hook++)
525 if ((hook->esr_mask & esr) == hook->esr_val) {
526 hook->handler(esr, regs);
530 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
533 long compat_arm_syscall(struct pt_regs *regs);
535 asmlinkage long do_ni_syscall(struct pt_regs *regs)
539 if (is_compat_task()) {
540 ret = compat_arm_syscall(regs);
546 return sys_ni_syscall();
549 static const char *esr_class_str[] = {
550 [0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
551 [ESR_ELx_EC_UNKNOWN] = "Unknown/Uncategorized",
552 [ESR_ELx_EC_WFx] = "WFI/WFE",
553 [ESR_ELx_EC_CP15_32] = "CP15 MCR/MRC",
554 [ESR_ELx_EC_CP15_64] = "CP15 MCRR/MRRC",
555 [ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC",
556 [ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC",
557 [ESR_ELx_EC_FP_ASIMD] = "ASIMD",
558 [ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS",
559 [ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC",
560 [ESR_ELx_EC_ILL] = "PSTATE.IL",
561 [ESR_ELx_EC_SVC32] = "SVC (AArch32)",
562 [ESR_ELx_EC_HVC32] = "HVC (AArch32)",
563 [ESR_ELx_EC_SMC32] = "SMC (AArch32)",
564 [ESR_ELx_EC_SVC64] = "SVC (AArch64)",
565 [ESR_ELx_EC_HVC64] = "HVC (AArch64)",
566 [ESR_ELx_EC_SMC64] = "SMC (AArch64)",
567 [ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)",
568 [ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF",
569 [ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)",
570 [ESR_ELx_EC_IABT_CUR] = "IABT (current EL)",
571 [ESR_ELx_EC_PC_ALIGN] = "PC Alignment",
572 [ESR_ELx_EC_DABT_LOW] = "DABT (lower EL)",
573 [ESR_ELx_EC_DABT_CUR] = "DABT (current EL)",
574 [ESR_ELx_EC_SP_ALIGN] = "SP Alignment",
575 [ESR_ELx_EC_FP_EXC32] = "FP (AArch32)",
576 [ESR_ELx_EC_FP_EXC64] = "FP (AArch64)",
577 [ESR_ELx_EC_SERROR] = "SError",
578 [ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)",
579 [ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)",
580 [ESR_ELx_EC_SOFTSTP_LOW] = "Software Step (lower EL)",
581 [ESR_ELx_EC_SOFTSTP_CUR] = "Software Step (current EL)",
582 [ESR_ELx_EC_WATCHPT_LOW] = "Watchpoint (lower EL)",
583 [ESR_ELx_EC_WATCHPT_CUR] = "Watchpoint (current EL)",
584 [ESR_ELx_EC_BKPT32] = "BKPT (AArch32)",
585 [ESR_ELx_EC_VECTOR32] = "Vector catch (AArch32)",
586 [ESR_ELx_EC_BRK64] = "BRK (AArch64)",
589 const char *esr_get_class_string(u32 esr)
591 return esr_class_str[ESR_ELx_EC(esr)];
595 * bad_mode handles the impossible case in the exception vector. This is always
598 asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
602 pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n",
603 handler[reason], smp_processor_id(), esr,
604 esr_get_class_string(esr));
611 * bad_el0_sync handles unexpected, but potentially recoverable synchronous
612 * exceptions taken from EL0. Unlike bad_mode, this returns.
614 asmlinkage void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr)
617 void __user *pc = (void __user *)instruction_pointer(regs);
620 pr_crit("Bad EL0 synchronous exception detected on CPU%d, code 0x%08x -- %s\n",
621 smp_processor_id(), esr, esr_get_class_string(esr));
624 info.si_signo = SIGILL;
626 info.si_code = ILL_ILLOPC;
629 current->thread.fault_address = 0;
630 current->thread.fault_code = 0;
632 force_sig_info(info.si_signo, &info, current);
635 void __pte_error(const char *file, int line, unsigned long val)
637 pr_err("%s:%d: bad pte %016lx.\n", file, line, val);
640 void __pmd_error(const char *file, int line, unsigned long val)
642 pr_err("%s:%d: bad pmd %016lx.\n", file, line, val);
645 void __pud_error(const char *file, int line, unsigned long val)
647 pr_err("%s:%d: bad pud %016lx.\n", file, line, val);
650 void __pgd_error(const char *file, int line, unsigned long val)
652 pr_err("%s:%d: bad pgd %016lx.\n", file, line, val);
655 /* GENERIC_BUG traps */
657 int is_valid_bugaddr(unsigned long addr)
660 * bug_handler() only called for BRK #BUG_BRK_IMM.
661 * So the answer is trivial -- any spurious instances with no
662 * bug table entry will be rejected by report_bug() and passed
663 * back to the debug-monitors code and handled as a fatal
664 * unexpected debug exception.
669 static int bug_handler(struct pt_regs *regs, unsigned int esr)
672 return DBG_HOOK_ERROR;
674 switch (report_bug(regs->pc, regs)) {
675 case BUG_TRAP_TYPE_BUG:
676 die("Oops - BUG", regs, 0);
679 case BUG_TRAP_TYPE_WARN:
680 /* Ideally, report_bug() should backtrace for us... but no. */
681 dump_backtrace(regs, NULL);
685 /* unknown/unrecognised bug trap type */
686 return DBG_HOOK_ERROR;
689 /* If thread survives, skip over the BUG instruction and continue: */
690 regs->pc += AARCH64_INSN_SIZE; /* skip BRK and resume */
691 return DBG_HOOK_HANDLED;
694 static struct break_hook bug_break_hook = {
695 .esr_val = 0xf2000000 | BUG_BRK_IMM,
696 .esr_mask = 0xffffffff,
701 * Initial handler for AArch64 BRK exceptions
702 * This handler only used until debug_traps_init().
704 int __init early_brk64(unsigned long addr, unsigned int esr,
705 struct pt_regs *regs)
707 return bug_handler(regs, esr) != DBG_HOOK_HANDLED;
710 /* This registration must happen early, before debug_traps_init(). */
711 void __init trap_init(void)
713 register_break_hook(&bug_break_hook);